LT4180 Virtual Remote Sense Controller Features Description Tight Load Regulation with Highly Resistive Cables without Requiring Remote Sense Wiring n Compatible with Isolated and Nonisolated Power Supplies n±1% Internal Voltage Reference n5mA Sink Current Capability n Soft-Correct Reduces Turn-On Transients n Undervoltage and Overvoltage Protection n Pin-Programmable Dither Frequency n Optional Spread Spectrum Dither n Wide V Range: 3.1V to 50V IN n24-Lead SSOP Package The LT®4180 solves the problem of providing tight load regulation over long, highly resistive cables without requiring an additional pair of remote sense wires. This Virtual Remote Sense™ device continuously interrogates the line impedance and corrects the power supply output voltage via its feedback loop to maintain a steady voltage at the load regardless of current changes. n Applications 12V High Intensity Lamps n28V Industrial Systems n High Power (>40 Watts) CAT5 Cable Systems n Wiring Drop Cancellation for Notebook Computer Battery Charging n AC and DC Adaptors n Well-Logging and Other Remote Instrumentation n Surveillance Equipment n The LT4180 is a full-featured controller with 5mA optoisolator sink capability, under/overvoltage lockout, soft-start and a ±1% internal voltage reference. The Virtual Remote Sense feature set includes user-programmable dither frequency and optional spread spectrum dither. The LT4180 works with any topology and type of isolated or nonisolated power supply, including DC/DC converters and adjustable linear regulators. The LT4180 is available in a 24-lead, SSOP package. L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and Virtual Remote Sense is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. Typical Application Isolated Power Supply with Virtual Remote Sense RSENSE + CAT5E CABLE 5.00 LINE 4.99 CL 4.98 RL 4.97 LINE VLOAD (V) SWITCHING REGULATOR VC – VLOAD vs VWIRE SENSE DIV0 DIV1 DIV2 SPREAD CHOLD1 CHOLD2 CHOLD3 CHOLD4 LT4180 ROSC DRAIN VIRTUAL REMOTE SENSE COMP COSC OV RUN FB VIN 4.96 4.95 4.94 4.93 4.92 4180 TA01a 4.91 0 0.5 1 1.5 2 2.5 3 VWIRING (V) 4180 TAO1b 4180fb For more information www.linear.com/4180 1 LT4180 Absolute Maximum Ratings Pin Configuration (Note 1) VIN.............................................................. –0.3V to 52V SENSE.......................................................VIN – 0.3V to VIN INTVCC, RUN, FB, OV, ROSC, OSC, DIV0, DIV1, DIV2, SPREAD, CHOLD1, CHOLD2, CHOLD3, CHOLD4, DRAIN, COMP, GUARD2, GUARD3, GUARD4, VPP............. –0.3V to 5.5V VIN Pin Current........................................................10mA INTVCC Pin Current..............................................–10mA COSC Pin Current...................................................3.3mA Maximum Junction Temperature........................... 125°C Operating Junction Temperature Range (Note 2) E-, I-Grades........................................ –40°C to 125°C MP-Grade........................................... –55°C to 125°C Storage Temperature Range................... –65°C to 125°C TOP VIEW INTVCC 1 24 VIN DRAIN 2 23 VPP COMP 3 22 SENSE CHOLD1 4 21 RUN GUARD2 5 20 OV CHOLD2 6 19 SPREAD GUARD3 7 18 DIV0 CHOLD3 8 17 DIV1 GUARD4 9 16 DIV2 CHOLD4 10 15 OSC FB 11 14 ROSC GND 12 13 COSC GN PACKAGE 24-LEAD NARROW PLASTIC SSOP TJMAX = 150°C, θJA = 85°C/W Order Information LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LT4180EGN#PBF LT4180EGN#TRPBF LT4180GN 24-Lead Narrow Plastic SSOP –40°C to 125°C LT4180IGN#PBF LT4180IGN#TRPBF LT4180GN 24-Lead Narrow Plastic SSOP –40°C to 125°C LT4180MPGN#PBF LT4180MPGN#TRPBF LT4180GN 24-Lead Narrow Plastic SSOP –55°C to 125°C Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ Electrical Characteristics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C, VIN = SENSE = 5V, unless otherwise noted. SYMBOL PARAMETER CONDITIONS VIN Operating Supply Voltage IVIN Input Quiescent Current ROSC Open, COSC Open, SENSE = VIN VREF Reference Voltage VCHOLD2 = VCHOLD3 = 1.2V, Measured at CHOLD4 During Track ∆VOUT Clock Phase MIN l ILIM Open-Drain Current Limit With FB = VREF + 200mV, OSC Stopped with Voltage Feedback Loop Closed VOL DRAIN Low Voltage VIN = 3V VINTVCC LDO Regulator Output Voltage VIN = 5V 3.10 MAX UNITS 50 V mA 1 2 1.209 1.197 1.221 1.221 1.233 1.245 5 12 17 mA 0.3 V l l TYP 3.15 V V V 4180fb 2 For more information www.linear.com/4180 LT4180 Electrical Characteristics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C, VIN = SENSE = 5V, unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN VINTVCC LDO Regulator Output Voltage in Dropout VIN = 2.5V 2.2 VOV Overvoltage Threshold Rising VOHYST Overvoltage Input Hysteresis VRISING – VFALLING VRUN Run Threshold Falling VRHYST Run Input Hysteresis VRISING – VFALLING IFB Input Bias Current A V(RATIO) Current Amplifier Gain Ratio A VL/A VH, A V Measured in V/V ISENSE Current Amplifier Input Bias Current Measured at SENSE with SENSE = VIN AV ∆VFB Amplifier Gain TYP MAX UNITS V 1.21 15 V 80 mV 1.21 V 15 80 mV –0.2 0.2 µA 0.891 0.9 –1 9.7 10 0.909 1 µA 10.3 V/V ICHOLD1 Track/Hold Charging Current Measured at CHOLD1 with VCHOLD1 = 1.2V ±60 µA ICHOLD2 Track/Hold Charging Current Measured at CHOLD2 with VCHOLD2 = 1.2V ±25 µA ICHOLD3 Track/Hold Charging Current Measured at CHOLD3 with VCHOLD3 = 1.2V ±25 µA ICHOLD4 Track/Hold Charging Current Measured at CHOLD4 with VCHOLD4 = 1.5V, VCHOLD2 = 1V, VCHOLD3 = 1.2V 10 µA Measured at CHOLD4 with VCHOLD4 = 1.5V, VCHOLD2 = 1.4V, VCHOLD3 = 1.2V –200 µA ISC Soft-Correct Current Measured at CHOLD4 ±1.5 µA ILKG1 Track/Hold Leakage Current Measured at CHOLD1 with VCHOLD1 = 1.2V ±1 µA ILKG2 Track/Hold Leakage Current Measured at CHOLD2 with VCHOLD2 = 1.2V ±1 µA ILKG3 Track/Hold Leakage Current Measured at CHOLD3 with VCHOLD3 = 1.2V ±1 µA ILKG4 Track/Hold Leakage Current Measured at CHOLD4 with VCHOLD4 = 1.2V ±1 µA fOSC Oscillator Frequency ROSC = 20k, COSC = 1nF 230 kHz gmFB Voltage Error Amplifier Transconductance Measured from FB to COMP, VCOMP = 2V, OSC Stopped with Voltage Feedback Loop Closed 120 µmho gmIAMP Current Amplifier Transconductance Measured from SENSE to COMP, VCOMP = 2V, OSC Stopped with Current Feedback Loop Closed 700 µmho Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2. The LT4180E is guaranteed to meet performance specifications from 0°C to 125°C junction temperature. Specifications over the –40°C 170 200 to 125°C operating junction temperature range are assured by design characterization and correlation with statistical process controls. The LT4180I is guaranteed over the full –40°C to 125°C operating junction temperature range. The LT4180MP is guaranteed over the full –55°C to 125°C operating junction temperature range. Note 3. Positive current is defined as flowing into a pin. 4180fb For more information www.linear.com/4180 3 LT4180 Typical Performance Characteristics VREF vs Temperature 1.2215 204.0 3.165 3.160 3.155 INTVCC (V) 1.2205 1.2200 3.150 3.145 1.2195 5 25 45 65 85 105 125 TEMPERATURE (°C) 3.135 –55 –35 –15 4108 G01 203.0 202.5 202.0 3.140 1.2190 –55 –35 –15 ROSC = 20k COSC = 1nF 203.5 FREQUENCY (kHz) 1.2210 VREF (V) Oscillator Frequency vs Temperature INTVCC vs Temperature 5 25 45 65 85 105 125 TEMPERATURE (°C) 201.5 –55 –35 –15 4108 G03 4108 G02 IDRAIN vs VDRAIN 5 25 45 65 85 105 125 TEMPERATURE (°C) Normal Timing Spread Spectrum Timing 14 12 IDRAIN (mA) 10 500mV/DIV CHOLD1 WITH 15k PULL-DOWN 500mV/DIV CHOLD1 WITH 15k PULL-DOWN 2V/DIV OSC 2V/DIV OSC 8 6 4 2 0 4180 G05 5µs/DIV 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 VDRAIN (V) 4180 G06 1µs/DIV TRIGGERED ON CHOLD1 TRIGGERED ON OSC Load Step in 12V Linear Application Load Step in Buck Application 1 4180 G04 VLOAD vs VWIRE 5.00 VSENSE 2V/DIV 4.99 4.98 VLOAD 2V/DIV 4.97 VLOAD (V) VSENSE 2V/DIV VLOAD 2V/DIV 500mA 4.96 ILOAD 200mA/DIV 4.95 1.5A 200mA ILOAD 500mA/DIV 4.94 RWIRE = 8Ω 4.93 4.92 4.91 0 0.5 1 1.5 2 2.5 3 5ms/DIV 200mA TO 500mA LOAD TRANSIENT 100µF LOAD CAP 4180 G08 500mA RWIRE = 2.5Ω 10ms/DIV 500mA TO 1.5A LOAD TRANSIENT 470µF LOAD CAP 4180 G09 VWIRING (V) 4180 G07 4180fb 4 For more information www.linear.com/4180 LT4180 Pin Functions INTVCC (Pin 1): The LDO Output. A low ESR ceramic capacitor provides decoupling and output compensation. 1µF or more should be used. Virtual Remote Sense. This is a high current output capable of driving opto-isolators. Other isolation methods may also be used with this output. DRAIN (Pin 2): Open-Drain of the Output Transistor. This pin drives either the LED in an opto-isolator, or pulls down on the regulator control pin. DIV2 (Pin 16): Dither Division Ratio Programming Pin. COMP (Pin 3): Gate of the Output Transistor. This pin allows additional compensation. It must be left open if unused. CHOLD1 (Pin 4): Connects to track/hold amplifier hold capacitor. The other end of this capacitor should be Kelvin connected to GND. GUARD2 (Pin 5): Guard Ring Drive for CHOLD2. CHOLD2 (Pin 6): Connects to track/hold amplifier hold capacitor. The other end of this capacitor should be Kelvin connected to GND. GUARD3 (Pin 7): Guard Ring Drive for CHOLD3. CHOLD3 (Pin 8): Connects to track/hold amplifier hold capacitor. The other end of this capacitor should be Kelvin connected to GND. GUARD4 (Pin 9): Guard Ring Drive for CHOLD4. CHOLD4 (Pin 10): Connects to track/hold amplifier hold capacitor. The other end of this capacitor should be Kelvin connected to GND. FB (Pin 11): Receives the feedback voltage from an external resistor divider across the main output. An (optional) capacitor to ground may be added to eliminate high frequency noise. The time constant for this RC network should be no greater than 0.1 times the dither frequency. For example, with fDITHER = 1kHz, t = 0.1ms. GND (Pin 12): Ground. COSC (Pin 13): Oscillator Timing Capacitor. Oscillator frequency is set by this capacitor and ROSC. For best accuracy, the minimum recommended capacitance is 100pF. ROSC (Pin 14): Oscillator Timing Resistor. Oscillator frequency is set by this resistor and COSC. OSC (Pin 15): Oscillator Output. This output may be used to synchronize the switching regulator to the DIV1 (Pin 17): Dither Division Ratio Programming Pin. DIV0 (Pin 18): Dither Division Ratio Programming Pin. Use the following table to program the dither division ratio (fOSC /fDITHER) Table 1. Programming the Dither Division Ratio (fOSC /fDITHER) DIV2 DIV1 DIV0 DIVISION RATIO 0 0 0 8 0 0 1 16 0 1 0 32 0 1 1 64 1 0 0 128 1 0 1 256 1 1 0 512 1 1 1 1024 For example, fDITHER = fOSC /128 with DIV2 = 1 and DIV1 = DIV0 = 0. SPREAD (Pin 19): Spread Spectrum Enable Input. Dither phasing is pseudo-randomly adjusted when SPREAD is tied high. OV (Pin 20): Overvoltage Comparator Input. This prevents line drop correction when wiring drops would cause excessive switching power supply output voltage. Set OV so VREG(MAX) ≤ 1.50VLOAD. RUN (Pin 21): The RUN pin provides the user with an accurate means for sensing the input voltage and programming the start-up threshold for the line drop corrector. SENSE (Pin 22): Current Sense Input. This input connects to the current sense resistor. Kelvin connect to RSENSE. VPP (Pin 23): Connect this pin to INTVCC. VIN (Pin 24): Main Supply Pin. VIN must be locally bypassed to ground. Kelvin connect the current sense resistor to this pin and minimize interconnect resistance. 4180fb For more information www.linear.com/4180 5 LT4180 Block Diagram 1 24 VIN INTVCC 4 – + 5 BANDGAP REF TRACK/ HOLD TRACK_HI_I CHOLD1 6 8 7 10 3 9 FB GUARD2 CHOLD2 CHOLD3 GUARD3 TRIM CIRCUIT REF_OK GND + 11 23 VPP HI_GAIN IAMP LDO 12 22 SENSE TRACK/ HOLD TRACK/ HOLD TRACK_HI_FB + – + GM2 – INST AMP TRACK/ HOLD – SPREAD GM1 SPREAD SPECTRUM CLOCK GENERATOR FB_SELECT CORRECTED _REF 20 21 DIV1 DIV2 19 18 17 16 REF TRACK_LOW_FB TRACK_DELTA_FB CHOLD4 COMP CLK MOD GUARD4 OSC 2 DIV0 OSC DRAIN OV + OV – RUN – UV + OVERVOLTAGE 15 RLIM UNDERVOLTAGE COSC ROSC 14 4180 BD 13 4180fb 6 For more information www.linear.com/4180 LT4180 Operation Voltage drops in wiring can produce considerable load regulation errors in electrical systems (Figure 1). As load current, IL , increases the voltage drop in the wiring (IL • RW) increases and the voltage delivered to the system (VL) drops. The traditional approach to solving this problem, remote sensing, regulates the voltage at the load, increasing the power supply voltage (VOUT) to compensate for voltage drops in the wiring. While remote sensing works well, it does require an additional pair of wires to measure at the load, which may not always be practical. The LT4180 eliminates the need for a pair of remote sense wires by creating a Virtual Remote Sense. Virtual remote sensing is achieved by measuring the incremental change in voltage that occurs with an incremental change in current in the wiring (Figure 2). This measurement can then be used to infer the total DC voltage drop in the wiring, which can then be compensated for. The Virtual Remote Sense takes over control of the power supply via the feedback pin (VFB) of the power supply maintaining tight regulation of load voltage, VL. The LT4180 operates by modulating the output current of the regulator and looking at the resulting voltage change. A large output capacitor is placed across the load so the AC impedance at the load is low. [Normally, a capacitor appears across the load in remote sensing situations to keep the impedance low at that point]. This capacitor is large enough that the AC impedance at the load is very low compared to the line resistance. When the output current is modulated, any voltage change that appears across the terminals of the LT4180 is due to the resistance in the line since the AC resistance at the load is very low. There are four sample-and-hold capacitors in the LT4180. The operation cycles through several stages to obtain the correction voltage. First, the output voltage is regulated and the control point is sampled and held. The control loop is then switched to a current regulating control loop and the output current is changed by 10%. Two sampleand-hold currents store the voltage at the high current and low current level of the modulation. This voltage change is the result of a 10% change in current, making the voltage change 10% of the total drop in the line. The voltage change is amplified by a factor of 10. The amplified voltage change that occurs with the current is again sampled and held and is used as the correction voltage. The correction voltage is summed into the output and this corrects for the line drop. Since this correction is actually open-loop, the actual voltage at the load is not measured. The ability of the LT4180 to correct for line drops is dependent upon the accuracy of the computations. The LT4180 can correct better than 50 to 1 for line drops. For example, a 10V drop in the line becomes a 200mV change at the load. The frequency of the correction cycle can be set from over 32kHz down to less than 250Hz, depending on the size of the capacitors in the system. For very large capacitors in high current systems, the dither correction clock would be run more slowly. In simpler systems with smaller output capacitors, the dither can be run at a higher frequency. If the load contains frequencies similar to the dither, beat notes can result between the load and the LT4180. A spread spectrum option on the LT4180 allows the device to change phasing during the correction cycle so that it will not interfere with load pulses. Finally, the LT4180 takes into account all resistances between the LT4180 and the load capacitor. It can correct for cable connections, line resistances and varying contact resistances. By measuring the peak change at the output of the LT4180 one can monitor the impedance between the LT4180 and the load, and detect increasing impedances IL IL POWER SUPPLY + RW VOUT POWER WIRING – + POWER SUPPLY SYSTEM + VOUT VL VFB – – RW POWER WIRING + SYSTEM VL – 4180 F02 4180 F01 REMOTE SENSE WIRING VIRTUAL REMOTE SENSE Figure 1. Traditional Remote Sensing Figure 2. Virtual Remote Sensing 4180fb For more information www.linear.com/4180 7 LT4180 Operation from degrading contacts. Making the capacitor larger can minimize the voltage ripple at the load due to a combination of load regulation and the dither frequency of the LT4180. Figure 3 shows the timing diagram for Virtual Remote Sense. A new cycle begins when the power supply and Virtual Remote Sense close the loop around VOUT (regulate VOUT = H). Both VOUT and IOUT slew and settle to a new value, and these values are stored in the Virtual Remote Sense (track VOUT high = L and track IOUT = L). The VOUT feedback loop is opened and a new feedback loop is set up commanding the power supply to deliver 90% of the previously measured current (0.9IOUT). VOUT drops to a new value as the power supply reaches a new steady state, and this information is also stored in the Virtual Remote Sense. At this point, the change in output voltage (∆VOUT) for a –10% change in output current has been measured and is stored in the Virtual Remote Sense. This voltage is used during the next Virtual Remote Sense cycle to compensate for voltage drops due to wiring resistance. VOUT REGULATE VOUT TRACK VOUT HIGH TRACK IOUT REGULATE IOUT LOW TRACK VOUT LOW TRACK ∆VOUT 4180 F03 Figure 3. Simplified Timing Diagram, Virtual Remote Sense Applications Information INTRODUCTION The LT4180 is designed to interface with a variety of power supplies and regulators having either an external feedback or control pin. In Figure 4, the regulator error amplifier (which is a gm amplifier) is disabled by tying its inverting input to ground. This converts the error amplifier into a constant-current source which is then controlled by the drain pin of the LT4180. This is the preferred method of interfacing because it eliminates the regulator error amplifier from the control loop which simplifies compensation and provides best control loop response. Isolated power supplies and regulators may also be used by adding an opto-coupler (Figure 5). LT4180 output voltage INTVCC supplies power to the opto-coupler LED. In situations where the control pin VC of the regulator may exceed 5V, a cascode may be added to keep the DRAIN pin of the LT4180 below 5V (Figure 6). Use a low VT MOSFET for the cascode transistor. REGULATOR + – VC INTVCC OPTO-COUPLER LT4180 DRAIN REGULATOR + – ITH OR VC LT4180 4180 F05 DRAIN Figure 5. Isolated Power Supply Interface 4180 F04 TO VC > 5V Figure 4. Nonisolated Regulator Interface For proper operation, increasing control voltage should correspond to increasing regulator output. For example, in the case of a current mode switching power supply, the control pin ITH should produce higher peak currents as the ITH pin voltage is made more positive. 8 COMP LT4180 INTVCC DRAIN 4180 F06 Figure 6. Cascoded DRAIN Pin for Isolated Supplies For more information www.linear.com/4180 4180fb LT4180 Applications Information DESIGN PROCEDURE The first step in the design procedure is to determine whether the LT4180 will control a linear or switching supply/ regulator. If using a switching power supply or regulator, it is recommended that the supply be synchronized to the LT4180 by connecting the OSC pin to the SYNC pin (or equivalent) of the supply. If the power supply is synchronized to the LT4180, the power supply switching frequency is determined by: f OSC = 4 ROSC • COSC Recommended values for ROSC are between 20k and 100k (with 30.1k the optimum for best accuracy) and greater than 100pF for COSC. COSC may be reduced to as low as 50pF, but oscillator frequency accuracy will be somewhat degraded. The following example synchronizes a 250kHz switching power supply to the LT4180. In this example, start with ROSC = 30.1k: 4 COSC = = 531pF 250kHz • 30.1k This example uses 470pF. For 250kHz: ROSC = For example, if the power supply takes 1ms to settle (worst-case) to within 1% of final value: 1 F1 = = 500Hz 2 • 1e – 3 Next, determine the propagation time of the wiring. In order to ignore transmission line effects, the dither period should be approximately twenty times longer than this. This will limit dither frequency to: VF F2 = Hz 20 • 1.017ns/ft • L Where VF is the velocity factor (or velocity of propagation), and L is the length of the wiring (in feet). For example, assume the load is connected to a power supply with 1000ft of CAT5 cable. Nominal velocity of propagation is approximately 70%. 0.7 F2 = = 34.4kHz 20 • 1.017e – 9 • 1000 The maximum dither frequency should not exceed F1 or F2 (whichever is less): fDITHER < min (F1, F2). Continuing this example, the dither frequency should be less than 500Hz (limited by the power supply). 4 = 34.04k 250kHz • 470pF The closest standard 1% value is 34k. The next step is to determine the highest practical dither frequency. This may be limited either by the response time of the power supply or regulator, or by the propagation time of the wiring connecting the load to the power supply or regulator. First determine the settling time (to 1% of final value) of the power supply. The settling time should be the worst-case value (over the whole operating envelope: VIN, ILOAD, etc.). 1 F1 = Hz 2 • t SETTLING With the dither frequency known, the division ratio can be determined: f 250,000 DRATIO = OSC = = 500 f DITHER 500 The nearest division ratio is 512 (set DIV0 = L, DIV1 = DIV2 = H). Based on this division ratio, nominal dither frequency will be: f 250,000 f DITHER = OSC = = 488Hz DRATIO 512 After the dither frequency is determined, the minimum load decoupling capacitor can be determined. This load capacitor must be sufficiently large to filter out the dither signal at the load. 4180fb For more information www.linear.com/4180 9 LT4180 Applications Information CLOAD = RWIRE NPO ceramic or other capacitors with low leakage and dielectric absorption should be used for all HOLD capacitors. 2.2 • 2 • fDITHER Where CLOAD is the minimum load decoupling capacitance, RWIRE is the minimum wiring resistance of one conductor of the wiring pair, and fDITHER is the minimum dither frequency. Continuing the example, our CAT5 cable has a maximum 9.38Ω/100m conductor resistance. Maximum wiring resistance is: RWIRE = 2 • 1000ft • 0.305m/ft • 0.0938Ω/m RWIRE = 57.2Ω With an oscillator tolerance of ±15%, the minimum dither frequency is 414.8Hz, so the minimum decoupling capacitance is: 2.2 CLOAD = = 46.36µF 57.2Ω • 2 • 414.8Hz This is the minimum value. Select a nominal value to account for all factors which could reduce the nominal, such as initial tolerance, voltage and temperature coefficients and aging. CHOLD Capacitor Selection and Compensation Set CHOLD4 to 1µF. This value will be adjusted later. Compensation Start with a 47pF capacitor between the COMP and DRAIN pins of the LT4180. Add an RC network in parallel with the 47pF capacitor, 10k and 10nF are good starting values. Once the output voltage has been confirmed to regulate at the desired level at no load, increase the load current to the 100% level and monitor the wire current (dither current) with a current probe. Verify the dither current resembles a square wave with the desired dither frequency. If the output voltage is too low, increase the value of the 10k resistor until some overshoot is observed at the leading edge of the dither current waveform. If the output voltage is still too low, decrease the value of the 10nF capacitor and repeat the previous step. Repeat this process until the full load output voltage increases to within 1% below the no load level. Refer to Figures 7a, 7b and 7c, which show compensation of the 12V 1.5A buck regulator Typical Application on the data sheet. Check for proper voltage drop correction over the load range. The dither current should have good half-wave symmetry. Namely, the waveform should have similar rise and fall times, enough settling time at top and bottom and minimum to no over/undershoot. CHOLD1 A 47nF capacitor will suffice for most applications. A smaller value might allow faster recovery from a sudden load change, but care must be taken to ensure full load p-p ripple at this node is kept within 5mV: 2.5nF CHOLD2 = CHOLD3 = f DITHER(kHz) For a dither frequency of 488Hz: 2.5nF CHOLD2 = CHOLD3 = = 5.12nF 0.488(kHz) VLOAD 11.2V IDITHER 50mA/DIV 20µs/DIV 4180 F07a Figure 7a. Dither Current and VOUT with 10nF, 10k Compensation 1.5A Load 4180fb 10 For more information www.linear.com/4180 LT4180 Applications Information VLOAD 11.9V VLOAD 1V/DIV IDITHER 500mA/DIV IDITHER 500mA/DIV 20µs/DIV 4180 F07b Figure 7b. Dither Current and VOUT with 10nF, 37k Compensation 1.5A Load 4180 F08b Figure 8b. 500mA to 1A Transient Response Test with CHOLD4 = 47nF Nicely Damped Behavior After all the CHOLD values have been finalized, check for proper voltage drop correction and converter behavior (start-up, regulation, etc.), over the load and input voltage ranges. VLOAD 11.9V Setting Output Voltage, Undervoltage and Overvoltage Thresholds IDITHER 50mA/DIV 20µs/DIV 4180 F07c Figure 7c. Dither Current and VOUT with 3.3nF, 28k Compensation 1.5A Load Set Final Value of CHOLD4 Set the minimum value for CHOLD4, by performing a transient load test of 30% to 60% of the load and set the value of CHOLD4 to where a nicely damped waveform is observed. Refer to Figures 8a and 8b for an illustration. The RUN pin has accurate rising and falling thresholds which may be used to determine when Virtual Remote Sense operation begins. Undervoltage threshold should never be set lower than the minimum operating voltage of the LT4180 (3.1V). The overvoltage threshold should be set slightly greater than the highest voltage which will be produced by the power supply or regulator: VOUT(MAX) = VLOAD(MAX) + VWIRE(MAX) VOUT(MAX) should never exceed 1.5 • VLOAD Since the RUN and OV pins connect to MOSFET input comparators, input bias currents are negligible and a common voltage divider can be used to set both thresholds (Figure 9). VLOAD 1V/DIV IDITHER 500mA/DIV 10ms/DIV 4180 F08a Figure 8a. 500mA to 1A Transient Response Test with CHOLD4 = 25nF CHOLD4 Too Small 4180fb For more information www.linear.com/4180 11 LT4180 Applications Information ⎛ 1.22V • 37.5k ⎞ R SERIES = ⎜ ⎟ − 6.1k = 5.34k ⎝ ⎠ 4V VIN R1 LT4180 RUN R2 R1 = 37.5k − 5.34k − 6.1k = 26.06 k FB R3 OV R4 4180 F09 Figure 9. Voltage Divider for Output Voltage, UVL and OVL The voltage divider resistors can be calculated from the following equations: V 1.22V RT = OV , R4 = 200µA 200µA Where RT is the total divider resistance and VOV is the overvoltage set point. ⎛ 5V • 6.1k ⎞ 1.22 V − ⎜ ⎟ ⎝ 37.5k ⎠ = 3.05k R3 = 5V 37.5k R2 = R SERIES − R3 = 2.29 k RSENSE SELECTION Select the value of RSENSE so that it produces a 100mV voltage drop at maximum load current. For best accuracy, VIN and SENSE should be Kelvin connected to this resistor. Find the equivalent series resistance for R2 and R3 (RSERIES). This resistance will determine the RUN voltage level. 5V POWER SUPPLY OUTPUT VOLTAGE ⎛ 1.22 • RT ⎞ RSERIES = ⎜ ⎟ −R4 ⎝ VUVL ⎠ 10Vw POWER SUPPLY INPUT VOLTAGE R1= RT −RSERIES −R4 200ms/DIV ⎛ R4 ⎞ 1.22V − ⎜ VOUT(NOM) • ⎟ RT ⎠ ⎝ R3 = VOUT(NOM) Figure 10. Soft-Correct Operation, CHOLD4 = 1µF Soft-Correct Operation RT R2 = R −R3 SERIES Where VUVL is the RUN voltage and VOUT(NOM) is the nominal output voltage desired. For example, with VUVL = 4V, VOV = 7.5V and VOUT(NOM) = 5V, RT = R4 = 7.5V 200µA 1.22V 200µA = 37.5k 4180 F08 The LT4180 has a soft-correct function which insures orderly start-up. When the RUN pin rising threshold is first exceeded (indicating VIN has crossed its undervoltage lockout threshold), power supply output voltage is set to a value corresponding to zero wiring voltage drop (no correction for wiring). Over a period of time (determined by CHOLD4), the power supply output voltage ramps up to account for wiring voltage drops, providing best loadend voltage regulation. A new soft-correct cycle is also initiated whenever an overvoltage condition occurs. = 6.1k 4180fb 12 For more information www.linear.com/4180 LT4180 Applications Information Using Guard Rings REGULATOR The LT4180 includes a total of four track/holds in the Virtual Remote Sense path. For best accuracy, all leakage sources on the CHOLD pins should be minimized. At very low dither frequencies, the circuit board layout may include guard rings which should be tied to their respective guard ring drivers. To better understand the purpose of guard rings, a simplified model of hold capacitor leakage (with and without guard rings) is shown in Figure 11. Without guard rings, a large difference voltage may exist between the hold capacitor (Pin 1) node and adjacent conductors (Pin 2) producing substantial leakage current through the leakage resistance (RLKG). By adding a guard ring driver with approximately the same voltage as the voltage on the hold capacitor node, the difference voltage across RLKG1 is reduced substantially thereby reducing leakage current on the hold capacitor. RLKG 1 RLKG1 2 WITHOUT GUARD RING 1 WITH GUARD RING RLKG2 2 4180 F11 Figure 11. Simplified Leakage Models (with and without Guard Rings) SYNC LT4180 OSC 4180 F12 Figure 12. Clock Interface for Synchronization Spread Spectrum Operation Virtual Remote Sense functionality relies on sampling techniques. Because switching power supplies are commonly used, the LT4180 uses a variety of techniques to minimize potential interference (in the form of beat notes which may occur between the dither frequency and power supply switching frequency). Besides several types of internal filtering, and the option for Virtual Remote Sense/ power supply synchronization, the LT4180 also provides spread spectrum operation. By enabling spread spectrum operation, low modula tion index pseudo-random phasing is applied to Virtual Remote Sense timing. This has the effect of converting any remaining narrow-band interference into broadband noise, reducing its effect. Increasing Voltage Correction Range Correction range may be slightly improved by regulating INTVCC to 5V. This may be done by placing an LDO between VIN and INTVCC. Contact Linear Technology Applications for more information. Synchronization Linear and switching power supplies and regulators may be used with the LT4180. In most applications regulator interference should be negligible. For those applications where accurate control of interference spectrum is desirable, an oscillator output has been provided so that switching supplies may be synchronized to the LT4180 (Figure 12). The OSC pin was designed so that it may directly connect to most regulators, or drive opto-isolators (for isolated power supplies). 4180fb For more information www.linear.com/4180 13 LT4180 Typical Applications 12V, 500mA Linear Regulator R1 0.2Ω 1% Q1 IRLZ440 VIN 20V C1 4.7µF 25V R3 27k R2 63.4k 1% R5 5.36k 1% R7 10k FB R6 2.2k 1% RUN C3 1µF DIV2 DIV1 DIV0 VPP INTVCC SENSE VIN OV SPREAD U2 LT4180EGN INTVCC GND INTVCC C2 1µF R4 3.74k 1% C4 10µF 25V OUTPUT TO WIRING AND LOAD 500mA 8Ω MAX RWIRE 100µF LOAD CAPACITANCE DRAIN Q2 VN2222 OSC COMP GND CHOLD1 GUARD2 CHOLD2 GUARD3 CHOLD3 GUARD4 CHOLD4 C6 330pF R8 200k C7 47nF C8 470pF COSC C10 33nF C9 470pF ROSC C11 470pF R9 41.7k 1% 4180 TA02 12V, 500mA Boost Regulator VIN 5V VISHAY C1 IHLP2525CZ-11 4.7µF 16V R4 100k R6 24.3k R2 191k GATE SW1 SW1 SW1 SW2 SW2 SW2 VCC SHDN U1 LT3581EMSE GND FB VC FAULT R8 10k SYNC RT SS CLKOUT R10 84.5k R1 0.2Ω 1% D1 DFLS220 L1 4.7µH C6 0.1µF GND C2 10µF 25V R13 1.5k R3 61.9k 1% INTVCC C4 1µF C3 1µF R5 3.65k 1% FB RUN R7 2k 1% R9 5.36k 1% OUTPUT TO WIRING AND LOAD (100mA MINIMUM) 500mA, 6Ω MAX RWIRE 100µF LOAD CAPACITANCE C7 47pF VIN SENSE DIV2 DIV1 DIV0 VPP INTVCC U2 LT4180EGN OV DRAIN COMP GND CHOLD1 GUARD2 CHOLD2 GUARD3 CHOLD3 GUARD4 CHOLD4 C9 47nF C10 470pF C12 47nF C11 470pF SPREAD OSC COSC ROSC C13 470pF R12 41.7k 1% 4180 TA03 R11 15k 1% C8 10nF 4180fb 14 For more information www.linear.com/4180 For more information www.linear.com/4180 R14 8.66k 1% R9 105k 1% R6 9.1k R16 36.5k 1% RT FB SHDN/ UVLO VC SS C7 0.1µF CIN1 1µF 100V GND GATE INTVCC C4 4.7µF 50V CIN2 1µF 100V U2 LT3758 SENSE EMSE SYNC VIN VIN PULSE ENGINEERING PA1277NL VC VIN GND VIN 18V TO 72V VIN R2 10k VC C10 (OPT.) C18 2200pF 250V 1 2 3 R11 1.3k R13 5.36k 1% R10 2.74k 1% R8 523Ω 1% C11 47pF RUN 3 2 VOUT VIN C5 1µF C3 100µF 10V R5 0.033 1% SENSE C17 15nF C12 47nF C13 470pF U1 LT4180EGN 100µF 10V DIV2 C16 470pF 4180 TA04 R15 41.2k 1% OSC COSC ROSC SPREAD DIV1 DIV0 VPP INTVCC C15 C14 0.1µF 470pF INTVCC2 C6 1µF OUTPUT TO WIRING AND LOAD 3.3V, 3A 0.4Ω MAX RWIRE 4 × 470µF, AUX TPSE 477M010R0050 LOAD CAPACITANCE OV DRAIN COMP GND CHOLD1 GUARD2 CHOLD2 GUARD3 CHOLD3 GUARD4 CHOLD4 FB D2 UPS840 R17 10.7k 1% 7 8 5 6 R4 13.3k 1% PA1277NL INTVCC2 C8 0.01µF 1 2 3 5 6 7 8 D3 BAS516 D1 BAV21W RCS1 0.033Ω U3 PS2801-1 R12 100Ω Q1 Si4848DY R7, 1Ω R3 51.1 1% C2 4700pF 4 T1 3.3V Isolated Flyback Regulator OSC LT4180 Typical Applications 4180fb 15 LT4180 Package Description Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. GN Package 24-Lead Plastic SSOP (Narrow .150 Inch) (Reference LTC DWG # 05-08-1641 Rev B) .337 – .344* (8.560 – 8.738) 24 23 22 21 20 19 18 17 16 15 1413 .045 ±.005 .229 – .244 (5.817 – 6.198) .254 MIN .033 (0.838) REF .150 – .157** (3.810 – 3.988) .150 – .165 1 .0165 ±.0015 2 3 4 5 6 7 8 9 10 11 12 .0250 BSC RECOMMENDED SOLDER PAD LAYOUT .015 ±.004 × 45° (0.38 ±0.10) .0075 – .0098 (0.19 – 0.25) .0532 – .0688 (1.35 – 1.75) .004 – .0098 (0.102 – 0.249) 0° – 8° TYP .016 – .050 (0.406 – 1.270) .008 – .012 (0.203 – 0.305) TYP NOTE: 1. CONTROLLING DIMENSION: INCHES INCHES 2. DIMENSIONS ARE IN (MILLIMETERS) .0250 (0.635) BSC GN24 REV B 0212 3. DRAWING NOT TO SCALE 4. PIN 1 CAN BE BEVEL EDGE OR A DIMPLE *DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE **DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE 4180fb 16 For more information www.linear.com/4180 LT4180 Revision History REV DATE DESCRIPTION PAGE NUMBER A 6/11 Revised Typical Applications drawings Revised Electrical Characteristics Replaced curves G08 and G09 in Typical Performance Characteristics Replaced text for CHOLD Capacitor Selection and Compensation section and deleted Power Supply Current Limiting paragraph in Applications Information section B 4/13 Revised schematics 1, 13, 14, 18 2, 3 4 10, 11 14, 15, 18 4180fb Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection its circuits as described herein will not infringe on existing patent rights. Forofmore information www.linear.com/4180 17 LT4180 Typical Application 12V 1.5A Buck Regulator E1 VIN 22V TO 36V GND + E3 C1 22µF 50V C6 0.47µF R3 100k INTVCC C5 0.1µF 50V R5 30.1k R8 68.1k 1% R7 10k R1 0.067Ω 1% C2 1µF 50V VIN BD BOOST SW RUN/SD PG FB RT VISHAY 1HLP2020CZ-11 L1, 10µH R4 61.9k 1% C7 22µF 25V D1 DFLS240 R6 3.65k 1% UI LT3685EDD SYNC VC INTVCC D2 CMDSH-3 R11 1k C4 1µF INTVCC C8 1µF FB R9 2.01k 1% R10 5.36k 1% OUTPUT TO WIRING AND LOAD 12V, 1.5A 2.5Ω MAX RWIRE 470µF LOAD CAPACITANCE RUN VIN SENSE DIV2 DIV1 DIV0 VPP INTVCC SPREAD LT4180EGN C9 47pF R13 28k 1% OV DRAIN COMP GND CHOLD1 GUARD2 CHOLD2 GUARD3 CHOLD3 GUARD4 CHOLD4 C10 47nF C11 470pF C13 47nF C12 470pF OSC COSC ROSC C14 330pF R12 22.1k 1% 4180 TA05 C15 3.3nF Related Parts PART NUMBER DESCRIPTION COMMENTS LT3581 Boost/Inverting DC/DC Converter with 3.3A Switch, Soft-Start and Synchronization 2.5V ≤ VIN ≤ 22V, Current Mode Control, 200kHz to 2.5MHz, MSOP-16E and 3mm × 4mm DFN-14 Packages LT3685 36V, 2A, 2.4MHz Step-Down Switching Regulator 3.6V≤ VIN ≤ 36V (60VPK), Integrated Boost Diode, MSOP-10E and 3mm × 3mm DFN Packages LT3573 Isolated Flyback Switching Regulator with 60V Integrated Switch 3V ≤ VIN ≤ 40V, Up to 7W, No Opto-Isolator or Third Winding Required, MSOP-16E Package LT3757 Boost, Flyback, SEPIC and Inverting Controller 2.9V ≤ VIN ≤ 40V, Current Mode Control, 100kHz to 1MHz Programmable Operation Frequency, MSOP-10E and 3mm × 3mm DFN-10 Packages LT3758 Boost, Flyback, SEPIC and Inverting Controller 5.5V ≤ VIN ≤ 100V, Current Mode Control, 100kHz to 1MHz Programmable Operation Frequency, MSOP-10E and 3mm × 3mm DFN-10 Packages LTC3805/ LTC3805-5 Adjustable Fixed 70kHz to 700kHz Operating Frequency Flyback Controller VIN and VOUT Limited Only by External Components, MSOP-10E and 3mm × 3mm DFN-10 Packages 4180fb 18 Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 For more information www.linear.com/4180 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com/4180 LT 0413 REV B • PRINTED IN USA LINEAR TECHNOLOGY CORPORATION 2010