Application Note 126 October 2010 2-Wire Virtual Remote Sensing for Voltage Regulators Clairvoyance Marries Remote Sensing Jim Williams, Jesus Rosales, Kurk Mathews, Tom Hack Introduction Wires and connectors have resistance. This simple, unavoidable truth dictates that a power source’s remote load voltage will be less than the source’s output voltage. Figure 1 shows this, and implies that intended load voltage can be maintained by raising regulator output. Unfortunately, line resistance and load variations introduce uncertainties, limiting achievable performance. WIRING DROPS POWER SUPPLY LOAD AN125 F01 WIRING DROPS Figure 1. Unavoidable Wiring Drops Cause Low Load Voltage. Line and Load Resistance Variations Introduce Additional Load Voltage Uncertainty, Mitigating Against Compensation by Raising Supply Voltage LOAD VOLTAGE REGULATOR POWER SUPPLY LOAD AN125 F02 Figure 2. Local Regulation Stabilizes Load Voltage But is Inefficient VOUT+ VOLTAGE DROP Figure 2 illustrates one compensatory approach. Locally positioned regulation stabilizes load voltage against line drops but is inefficient due to regulator losses. Figure 3, the classical approach, utilizes “4-wire” remote sensing to eliminate line drop effects. The power supply sense inputs are fed from load referred sense wires. The sense inputs are high impedance, negating sense line resistance effects. This scheme works well, but requires dedicated sense wires, a significant disadvantage in many applications. “Virtual” Remote Sensing Figure 4 retains the advantages of classical 4-wire remote sensing while eliminating the sense leads. Here, the LT4180 Virtual Remote Sense™ (VRS) IC alternates output current between 95% and 105% of the nominal required output current. The LT4180 forces the power supply to provide a DC current plus a small square wave current with peak-to-peak amplitude equal to 10% of the DC current. Decoupling capacitor CLOAD, normally required for low impedance under transient conditions in non-VRS systems, takes an additional role by filtering out the VRS square wave excursions. L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and Virtual Remote Sense is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. IL RWIRE ISENSE + POWER SUPPLY SENSE+ VOUT RWIRE /2 RWIRE /2 + CLOAD – CONTROL PIN POWER SUPPLY VL LOAD – AN125 F04 LOAD LT4180 SENSE– VOUT– VOLTAGE DROP RWIRE AN125 F03 Figure 3. Classical “4-Wire” Remote Sensing. VOUT Line Voltage Drops Are Compensated by Regulator Sensing at Load. High Impedance Sense Inputs Negate Sense Wire Resistance. Approach Requires Four Wires VOUT = DC + SQUAREWAVE FROM WIRING VOLTAGE DROP CLOAD REMOVES SQUAREWAVE, SO VL CONTAINS ONLY DC. IL = DC + SQUAREWAVE Figure 4. LT4180 2-Wire Virtual Remote Sense Estimates Wiring Voltage Drops, Compensates by Adjusting Supply Output Voltage. Wiring Loss Is Determined by Measuring Small Signal Square Wave Carrier Induced Voltage Drop. Load Capacitor Absorbs Square Wave; Load Is at DC an126fa AN126-1 Application Note 126 Because C is sized to produce an “AC short” at the square wave frequency, a square wave voltage is produced at the power supply equal to VOUTAC = 0.1 • IDC • RWIREVP-P. The square wave voltage at the power supply has a peak-topeak amplitude equal to one tenth the DC wiring drop. This is a direct measurement of wiring drop, not an estimate, accurate over all load currents. Signal processing produces a DC voltage from this AC signal which is introduced into the supply feedback loop to provide accurate load regulation1. Note that the “power supply” may be an IC linear or switching regulator, a module or any other power source capable of variable output. Power supplies can be synchronized to the LT4180 and VRS operating frequency is adjustable over more than three decades. Optional spread spectrum operation provides partial immunity from singletone interference and a 3V to 50V input range simplifies design. Because this technique is based on an estimate of load voltage, not a direct measurement, the resultant correction is an approximation, but a very good one. Typical LT4180 load regulation is plotted in Figure 5. In this example, load current increases from zero until it produces a 2.5V wiring drop. Load voltage drops only 73mV at maximum current. A voltage drop equivalent to 50% of load voltage results in only a 1.5% shift in load voltage value. Smaller wiring drops produce even better results. Note 1. Readers finding their intellectual prowess unsatiated by this admittedly cursory description will find more studious coverage in Appendix A, “A Primer on LT4180 VRS Operation.” 5.00 Applications The following applications are all VRS augmented voltage regulators of various descriptions. The power regulation stages employed are, with one exception, generic LTC designs and are spared exhaustive commentary, permitting emphasis on the LT4180 VRS role. Additionally, the similarity of the VRS associated circuitry across the broad array of applications shown should be noted, and is indicative of the relative ease of implementation. Surprisingly little change is needed to use the VRS in the different situations presented. VRS Linear Regulators Figure 6 adds a simple stage to the LT4180 to implement a complete VRS aided linear regulator. The LT4180 senses current via the 0.2Ω shunt and feedback controls Q1 with Q2, completing a control loop. Cascoded Q2 permits the ICs 5V capable open drain output to control a high voltage at Q1’s gate. Components at the compensation pin furnish loop stability, promoting good transient response2. Figure 7 shows Figure 6’s load step waveforms. They include VSENSE (trace A), VLOAD (B) and ILOAD (C). Transient response is determined by loop compensation, load capacitance and remote sense sample rate. Figure 8 shows response with CLOAD increased to 1100μF. Load voltage transient excursion reduces and duration increases. Figure 9, employing a monolithic regulator, adds current limiting and simplifies loop compensation. Transient response approximates Figure 6’s. As before, the LT4180’s low voltage drain pin requires a cascode transistor to control the high voltage at the LT3080 set pin. 4.99 Note 2. Value selection procedure for LT1480 VRS circuits is detailed in Appendix B, “Design Guidelines for LT4180 VRS Circuits.” 4.98 VLOAD (V) 4.97 4.96 4.95 4.94 4.93 4.92 4.91 0 0.5 1 1.5 2 2.5 3 VWIRING (V) AN126 F05 Figure 5. Typical LT4180 Virtual Remote Sense Performance Shows 1.6% Regulation vs 0V → 2.5V Wiring Drop an126fa AN126-2 Application Note 126 0.2Ω 1% Q1 IRLZ44 VIN 20V 4.7μF LOAD RETURN WIRING DROP 63.4k 1% LOAD VOLTAGE 12V, 500mA 8Ω TOTAL WIRING DROP WIRING DROP 100μF LOAD RETURN INTVCC 1μF 27k 1μF 3.74k 1% RUN SENSE VIN DIV2 DIV1 DIV0 VPP INTVCC FB 10μF 25V 10k 5.36k 1% 2.2k 1% SPREAD LT4180 OV Q2 INTVCC DRAIN COMP GND CHOLD1 VN2222 200k 330pF CHOLD2 47nF 470pF CHOLD3 470pF CHOLD4 33nF COSC ROSC 470pF 41.2k 1% AN126 F06 GUARD PINS NOT SHOWN Figure 6. Virtual Remote Sense Controls Discrete Linear Regulator. Q2 Cascodes Drain Output, Buffering High Voltage Q1 Gate Drive. COMP Pin Associated Components Stabilize Loop A = 2V/DIV A = 2V/DIV B = 2V/DIV AC COUPLED B = 2V/DIV AC COUPLED C = 0.2A/DIV ON 0.2A DC LEVEL C = 0.2A/DIV ON 0.2A DC LEVEL 5ms/DIV AN126 F07 Figure 7. Figure 6’s Load Step Waveforms with 100μF Load Capacitor Include VSENSE (Trace A), VLOAD (B) and ILOAD (C). Transient Response is Determined by Loop Compensation, Load Capacitance and Remote Sense Sample Rate 5ms/DIV AN126 F08 Figure 8. Same Conditions as Figure 7 with CLOAD Increased to 1100μF. VLOAD Transient Excursion Reduces, Duration Extends an126fa AN126-3 Application Note 126 0.2Ω 1% LT3080 VIN 18V IN LOAD VOLTAGE 12V, 500mA 4Ω TOTAL WIRING DROP WIRING DROP OUT SET LOAD RETURN WIRING DROP 4.7μF 60.4k 1% 10k 470μF LOAD RETURN 1μF INTVCC 1μF 3.57k 1% RUN SENSE VIN DIV2 DIV1 DIV0 VPP INTVCC FB 10μF 25V 1.78k 1% SPREAD LT4180 OV 100k 5.36k 1% DRAIN COMP GND CHOLD1 CHOLD2 CHOLD3 CHOLD4 COSC ROSC INTVCC 47nF VN2222 51k 470pF 470pF 47nF 330pF 22.1k 1% AN126 F06 1500pF GUARD PINS NOT SHOWN Figure 9. Figure 6’s Approach Utilizing IC Regulator Adds Current Limiting, Simplifies Loop Compensation. Transient Response Approximates Figure 6’s VRS Equipped Switching Regulators VRS Based Isolated Switching Supplies VRS based switching regulators are readily constructed. Figure 10’s flyback voltage boost configuration has similar architecture to the linear examples although output voltage is above the input. In this case, the LT4180 open drain output is directly compatible with the LT3581 boost regulator low voltage VC pin––no cascode stage is necessary. The VRS approach is adaptable to isolated output supplies. Figure 12’s 24V output converter utilizes an approach similar to the previous examples except that it supplies a fully isolated output. The virtual remote sense feature accommodates a 10Ω wire resistance. The LT3825 and T1 form a transformer coupled power stage. Opto-coupled feedback maintains output isolation. Step down (“Buck”) VRS equipped switching regulators are similarly easily achieved. Figure 11’s scheme, reminiscent of the previously described linear regulators, substitutes an LT3685 step down regulator which is directly controlled from the LT4180 open drain output. A single pole roll-off stabilizes the loop and a 12V, 1.5A output is maintained from a 22V to 36V input despite a 0Ω to 2.5Ω wiring drop loss. Figure 11A is similar, except that it provides a 5V, 3A output from a 12V to 36V input. Figure 13’s 48V → 3.3V, 3A design also has a fully isolated output, facilitated by power delivery through a transformer and optically coupled feedback loop closure. The LT3758 drives T1 via Q1. T1’s rectified and filtered secondary supplies output power which is corrected for line drops by the LT4180. Isolation is maintained by transmitting the feedback signal with an opto-isolator. The opto-isolators output collector ties back to the LT3578 VC pin, closing the control loop. an126fa AN126-4 10k 24.3k VIN 5V DFLS220 84.5k 0.1μF 191k 10μF 25V 107Ω 1% 40.2Ω 1% 73.2Ω 1% 1.24k 1% 15k 47pF VIN 10nF 47nF COMP GND CHOLD1 RUN DRAIN OV FB 1μF DIV1 47nF DIV0 100μF CHOLD4 – + 470pF CHOLD3 LT4180 DIV2 LOAD RETURN WIRING DROP WIRING DROP 470pF CHOLD2 SENSE 0.2Ω 1% Figure 10. Virtual Remote Sensed Voltage Boost Configuration. LT4180 Drain Output Controls Flyback Regulator via LT3581 VC Pin GND SS SYNC RT VC LT3581 FB FAULT SHDN VCC GATE SW1 SW1 SW1 SW2 SW2 SW2 L1 = VISHAY IHLPI525CZ-11 GUARD PINS NOT SHOWN 100k 4.7μF 16V L1 4.7μH COSC AN126 F10 1μF INTVCC 41.7k 1% ROSC SPREAD INTVCC 470pF VPP LOAD RETURN LOAD VOLTAGE 12V, 500mA (100mA MIN.) 6Ω TOTAL WIRING DROP Application Note 126 an126fa AN126-5 AN126-6 + 10k 30.1k INTVCC VIN 22V TO 36V 68.1k 1% 0.1μF 50V 100k 22μF 50V SYNC RT FB GND VC SW BOOST BD LT3685 RUN/SD VIN 1μF 50V CMDSH-3 INTVCC 22μF 25V 5.36k 1% 2k 1% 3.65k 1% 28k 47pF DRAIN OV FB VIN 3.3nF 47nF COMP GND CHOLD1 RUN 1μF DIV0 470μF 47nF CHOLD4 DIV1 470pF CHOLD3 LT4180 DIV2 LOAD RETURN WIRING DROP WIRING DROP 470pF CHOLD2 SENSE Figure 11. Remote Sense Corrected 22VIN to 36VIN Step-Down Regulator Maintains 12V Output Despite Wiring Losses L1 - VISHAY IHLP2020CZ-11 GUARD PINS NOT SHOWN 1k DFLS240 10μH 0.47μF 61.9k 1% 0.067Ω COSC AN126 F11 1μF INTVCC 22.1k 1% ROSC SPREAD INTVCC 330pF VPP LOAD RETURN 12V, 1.5A 2.5Ω TOTAL WIRING DROP Application Note 126 an126fa + 10k 1% 30.1k 1% INTVCC VIN 8V TO 36V 68.1k 1% 0.1μF 22μF 50V VIN SYNC GND RT FB VC SW BOOST BD LT3693EDD RUN/SD 100k 4.7μF 50V 47μF 10V 47μF 10V 5.36k 1% 2.15k 1% 1.87k 1% 23.2k 47pF DRAIN COMP OV FB 4.7nF RUN VIN 47nF GND CHOLD1 1μF – + DIV0 C1 470μF 10V 47nF CHOLD4 DIV1 470pF CHOLD3 LT4180 DIV2 LOAD RETURN WIRING DROP 470pF CHOLD2 SENSE Figure 11A. 12VIN → 36VIN to 5VOUT Step-Down Remote Sensed Regulator Has Similar Architecture to Figure 11 GUARD PINS NOT SHOWN C1 = C2 = AVXTPSE477M010R0050 1k CMDSH-3 INTVCC MBRA340T3G 6.8μH 0.47μF 21.5k 1% 0.033Ω 1% WIRING DROP COSC INTVCC AN126 F11A 1μF LOAD RETURN VOUT 5V, 3A 0.4Ω TOTAL WIRING DROP 22.1k 1% ROSC SPREAD INTVCC C2 470μF 10V 330pF VPP + Application Note 126 an126fa AN126-7 Application Note 126 T1 VIN 36V to 72V ES1G 4.7μH VIN+ + 30pF 500V 200 1/4W t BAS21LT1 47k 1/4W 20 1/8W 10μF 100V + 40.2k 1% 2.2μF 100V 383k 1% 68pF 250V +VCC 47k 1/4W 12.3V TO 16.5V 68μF 20V t t t t 10μF 35V 0.1μF Si7302DN OPTIONAL SFST 10μF 100μF 35V 35V VCC SYNC PG t 4.7nF 250V SENP 0.05Ω 1206 FB LT3825 OVLO 14k 1% MMBT3906 56pF 56pF 3.01k 1% VIN– ENOL OSCAP PGOLY ROCMP CMPC 33nF SENN VC SGND/ TON PGND 2.05k 30k 38.3k 1nF 30k 100k 220pF 0.1μF 0.2Ω 1% 3.9k 1/4W * 3.9k 1/4W 0.022μF 130k 1% 10k * 12mA MINIMUM LOAD REQUIREMENT + 1μF 50V LOAD RETURN WIRING DROP 220μF 35V LOAD RETURN –VOUT 1.37k 1% MOC207 VOUT 24V, 500mA 10Ω TOTAL WIRING DROP RWIRE INTVCC –VOUT 1μF RUN VIN SENSE DIV2 DIV1 DIV0 VPP INTVCC FB SPREAD 1.58k 1% LT4180 OV 5.36k 1% 2k –VOUT INTVCC +VCC DRAIN COMP GND CHOLD1 CHOLD2 CHOLD3 CHOLD4 47pF 0.047μF 1k VN2222 0.1μF 41.7k 1% 330pF AN126 F12 6.8k MMBT3908 10μF TANYO YUDEN GMK325BJ106KN 1210 100μF 36V NICHICON PL (M) 10μF 100V SANYO 100CE10FS 68μF 20V KEMET T491D686K020AS 4.7nF 250V MURATA GA343DR7GD472KW01L 4.7μH COOPER BUSSMANN SO3814-4R7-R 1/4W RESISTORS ARE 1206 1/8W RESISTORS ARE 0805 T1 PULSE PA2925NL GUARD PINS NOT SHOWN ROSC 470pF 3.3nF 3.3nF 12k COSC 10k 1% –VOUT = INPUT COMMON Figure 12. Virtual Remote Sensed, Isolated 36VIN → 72VIN to 24VOUT Converter Accommodates 10Ω Lead Wire Resistance. LT3825/T1 Form Transformer Coupled Power Stage. LT4180 Provides Virtual Remote Sense, Opto-Coupled Feedback Maintains Output Isolation an126fa AN126-8 8.66k 1% 105k 1% VIN 9.1k 4.7μF 50V 4700pF GND SYNC RT 100Ω 1Ω 51Ω 10k = OUTPUT COMMON t t t 2200pF UPS840 0.01μF PS2801-1 T1 1M 1.3k INTVCC2 100μF 10V w2 5.36k 1% 2.74k 1% 523Ω 1% 13k 1% 10.7k 1% 47pF VIN SENSE 0.033Ω 1% LT4180 DIV2 + 0.015μF 47nF 470pF CLOAD* 470pF 0.1μF COSC 470pF AN126 F13 41.2k 1% ROSC SPREAD 1μF INTVCC2 LOAD RETURN 3.3V, 3A 0.4Ω TOTAL WIRING DROP DIV1 DIV0 VPP INTVCC LOAD RETURN WIRING DROP 0.4Ω WIRING DROP COMP GND CHOLD1 CHOLD2 CHOLD3 CHOLD4 DRAIN OV FB RUN 1μF Figure 13. 48V → 3.3V Isolated Step-Down, Remote Sensed Regulator. T1 Delivers Isolated Power, LT4180 Remotely Senses Output, Supplies Feedback via Opto-Isolator RCS1 0.033 Si4848DV BAS516 BAV21W = INPUT COMMON SENSE FB GATE LTC3758 INTVCC VIN SHDN/UVLO SS 1μF 100V VC 1μF 36.5k 1% 1μF 100V T1 = PULSE ENERGY PA1277NL GUARD PINS NOT SHOWN * CLOAD = 4×, 470μF AVXTPSE477M010R0050 VIN 18V TO 72V Application Note 126 an126fa AN126-9 Application Note 126 Figure 14, also a VRS isolated step-down supply, uses a commercially produced 48V isolated input module augmented with virtual remote sensing. The module sense terminals are unused. The LT4180 wiring drop correction is introduced at the module trim pin. Component values are shown for 3.3 and 5V outputs. The “black box” Vicor module trim pin transient response defines available control bandwidth. Figure 15, trace A, is the trim pin input step (see test circuit A), trace B, the module output. The trim pin directed dynamics set practical expectations for VRS equipped loop response around the module. Figures 16 and 17 do not disappoint. Figure 14’s load step response appears in Figure 16. Trace A is load step current, trace B, the resultant output voltage transient. The response envelope, bounded by module trim pin dynamics, is clean and well controlled. Figure 17 shows Figure 14’s turn-on into a 2.5Amp load. LT4180 activation arrests the initial abrupt rise at the 3rd vertical division. The ascent’s conclusion is controlled to the regulation point in damped fashion. LT4180 sampling square wave residue is just discernible in the waveforms settled portion. BEFORE PROCEEDING ANY FURTHER, THE READER IS WARNED THAT CAUTION MUST BE USED IN THE CONSTRUCTION, TESTING AND USE OF THIS CIRCUIT. HIGH VOLTAGE, AC LINE CONNECTED POTENTIALS ARE PRESENT IN THIS CIRCUIT. EXTREME CAUTION MUST BE USED IN WORKING WITH AND MAKING CONNECTIONS TO THIS CIRCUIT. REPEAT: THIS CIRCUIT CONTAINS DANGEROUS, AC LINE CONNECTED HIGH VOLTAGE POTENTIALS. USE CAUTION. Figure 18’s VRS aided “Off-Line” isolated output supply has a 5V output with 2A capacity. The schematic appears complex, but inspection reveals it to be essentially an AC line powered variant of Figure 13’s isolated approach. The LT4180 provides remote sensing and closes an isolated feedback loop with optical transmission. 3.3V/2.5A 5V/2A 0.4Ω TOTAL WIRING DROP WIRING DROP 0.04Ω + LOAD RETURN WIRING DROP 1μF 2200μF LOAD RETURN 13.3k/ 17.4k 2.4k 48V VIN– RUN SENSE VIN DIV2 DIV1 DIV0 VPP INTVCC FB VIN+ VIN+ 1μF 523Ω/ 4.64k VOUT+ VICOR VSEN+ MODULE VI-230-EX TRIM VSEN– VIN– VOUT– SPREAD 2.74k/ 1.69k LT4180 OV 5.36k/ 5.36k DRAIN COMP GND CHOLD1 47pF CHOLD2 CHOLD3 CHOLD4 3.3nF ROSC 1nF 3.3nF 0.047μF 10k COSC 0.1μF 4.7nF 240k 42.2k 1% AN126 F14 GUARD PINS NOT SHOWN Figure 14. Commercially Produced, Isolated 48V Input Module Augmented with Virtual Remote Sense. Module Sense Terminals Are Unused. Wiring Drop Correction Introduced at Module Trim Pin. Component Values Shown for 3.3V/5V Outputs an126fa AN126-10 Application Note 126 48V IN4148 PULSE GENERATOR A = 5V/DIV 24k TRIM VICOR VI-230-EX V+ SEN LOAD SEN V– B = 0.5V/DIV ON 5VDC 48V RETURN Trim Pin Pulse Test Circuit 5ms/DIV AN126 F15 Figure 15.Vicor Module Trim Pin Transient Response Defines Available Control Bandwidth. Trace A is Trim Pin Input Step (See Test Circuit), Trace B, Module Output A = 2A/DIV ON 1A DC 1V/DIV B = 0.2V/DIV 20ms/DIV 20ms/DIV AN126 F16 Figure 16. Figure 14’s Load Step Response. Trace A is Load Step Current, Trace B Resultant Output Voltage Transient. Response Envelope, Bounded by Module Trim Pin Dynamics, is Well Controlled AN126 F17 Figure 17. Figure 14’s Turn-On into a 2.5A Load. LT4180 Activation Arrests Initial Abrupt Rise at Third Vertical Division. Ascent Conclusion is Controlled to Regulation Point. LT4180 Sampling Square Wave Residue is Discernible VRS Halogen Lamp Drive Circuit A final circuit, Figure 19, uses the VRS to stabilize drive to a halogen lamp, in this case a 12V, 30W automotive type. Lamp output power remains constant despite 9V to 15V input variation and line resistance/connection uncertainties. Additional benefits include constant color output and extended lamp life. The circuit, a step up/down (“SEPIC”) converter, maintains 12V at the lamp despite the 9V to 15V input range3. The VRS functions in the manner previously described. Line resistance losses due to switches, wiring and connectors are obviated by VRS action. Figure 20 plots unaided vs remote sensed and regulated halogen lamp light output. VRS equipped luminosity is flat over the 9 to 15V input range while unregulated performance suffers dramatically. The regulation also benefits lamp life by greatly reducing lamp turn-on current. Figure 21 shows unregulated lamp turn-on exceeding 20A without regulation. In Figure 22, regulation cuts current peaking to 7A, a 3x reduction. This soft turn-on and constant 12V drive under high/low line conditions optimizes illumination and improves lamp life. References 1. LT4180 Data Sheet, Linear Technology Corporation, 2010. 2. Ridley, R. “Analyzing the Sepic Converter”, Power Systems Design Europe, November, 2006. Note 3. SEPIC operation is described in Reference 2. an126fa AN126-11 AN126-12 470k 1/4W 470k 1/4W RT1 t t 6mH GUARD PINS NOT SHOWN = OUTPUT COMMON = AC LINE COMMON 220pF 18k 1μF 1.2Ω 1/4W 150pF 1k + 510 2W 70T t t T1 t CNY17-3 150μF 16V VCC 3.9Ω 2N7002 17T BAS21 30pF 500V 7T 62Ω 750Ω 0.47μF INTVCC MBR20200CT 200pF 200V + 1M 5.36k 1% 2.67k 1% 4.53k 1% 20.5k 1% 270μF 16V 1μH 6.8k 100pF + RUN 10μF 16V 150μF 16V VIN 10nF WARNING! SCREENED AREA CONTAINS LETHAL AC LINE CONNECTED HIGH VOLTAGES. USE CAUTION IN CONSTRUCTION AND TESTING. RWIRE DIV2 3.3nF DIV0 0.047μF CHOLD4 DIV1 1Ω TOTAL WIRING DROP CHOLD3 LT4180 3.3nF CHOLD2 SENSE 0.05Ω 1% 220 1/4W GND CHOLD1 0.1μF DRAIN COMP OV FB 10μF 16V Figure 18. A 5V Output “Off-Line” Converter Equipped with Virtual Remote Sense. LT4180 Provides Remote Sensing, Closes Isolated Feedback Loop via Opto-Isolator * 100mA MINIMUM LOAD REQUIRED. 12nF 1k 2N3904 270k 1/4W 270k 1/4W VIN MUR160E 200V P6KE200A 13V CMPZ5243B SPB03N60C3 OUT GND 47μF 400V 12Ω ISEN LT1241 COMP RT/CT FB VCC VREF 200k 1/2W 200k 1/2W + DF06M VIN NOTE: 47μF 400V CHEMICON EKXG401ELL470ML25S 2200μF 10V SANYO 10MV2200AX 150μF 16V SANYO 16MV150AX 270μF 16V SANYO 16SEPC270M 10μF 16V TDK C3225X7RK106M 1μH VISHAY IHLP2525CZER1ROM 6mH PANASONIC ELF11M030E RT1 CANTHERM MF72-33D7 T1 PULSE PA3072NL EF20 AL = 100nH/T2 0.1μF VCC VIN 2.2nF 250VAC “Y” SCREENED AREA CONTAINS LETHAL HIGH VOLTAGES! USE CAUTION IN CONSTRUCTION AND TESTING! 0.1μF 250VAC “X” 90V to 264VACIN DANGER!! HIGH VOLTAGE!! COSC VPP + INTVCC 2200μF 470pF 1μF INTVCC AN126 F11 41.2k 1% ROSC SPREAD * VOUT 5V, 2A Application Note 126 an126fa RT LT3757 SENSE GATE INTVCC VIN 100pF 10μF 63V GND FBX VC 42.2k SYNC SS SHDN/UVLO + GUARD PINS NOT SHOWN IHLP4040DZR6R8M11 = 6.8μH UMK325Bd106MM-T = 10μF, 50V TMKBd226MM-T = 22μF C2X = ZOSVPIO IHLP1616ABERR10M01 = 0.1μH 10k 0.1μF 43.2k 200k 6.8μF 50V VIN 9V TO 15V 4.7μF 10V 6.8μH 6.8μH + 6.8k 22μF 25V w3 CERAMIC 0.1μH C2X 10μF 20V 4.12k 1% 42.2k 1% + 6.65k 1% 3.4k 1% 4.99k 1% 84.5k 1% 13.7k 1% 47pF DRAIN OV FB VIN 47nF DIV1 12V, 30W HALOGEN LAMP 1Ω CONNECTOR/SWITCH 0.1μF CHOLD4 COSC 150pF AN126 F19 42.2k 1% ROSC OSC VPP INTVCC SPREAD 1000μF 25V DIV0 + 470pF CHOLD3 LT4180 DIV2 LOAD RETURN WIRING DROP WIRING DROP 470pF CHOLD2 SENSE 47nF COMP GND CHOLD1 RUN 1μF 0.04Ω 1% Figure 19. LT4180 Step Up/Down Converter Stabilizes 12V Drive to 30W Halogen Automotive Lamp Despite 9V → 15V Input Variation and Line Resistance Uncertainties 0.005 1W Q1 Si7850DP 10μF 50V 10μF 50V PDS1045 1μF Application Note 126 an126fa AN126-13 Application Note 126 14.5 14.0 WITHOUT VIRTUAL REMOTE SENSE/REGULATOR KILOCANDLES/M2 12.0 10.0 8.0 6.0 WITH VIRTUAL REMOTE SENSE/REGULATOR 4.0 2.0 0 9 10 11 12 13 14 15 BATTERY VOLTAGE (V) AN126 F20 Figure 20. Unaided vs Remote Sensed/Regulated Halogen Lamp Light Output. Regulation Benefits Include Stable Illumination, Constant Color Output and Extended Lamp Life A = 5A/DIV A = 5A/DIV 50ms/DIV AN126 F21 Figure 21. Lamp Turn-On Current Exceeds 20A Without Regulation, Degrading Lifetime 50ms/DIV AN126 F22 Figure 22. Regulation Promotes Soft Turn-On, 12V Drive Under High/Low Line Conditions, Optimizing Illumination and Improving Lamp Life an126fa AN126-14 Application Note 126 APPENDIX A A Primer on LT4180 VRS Operation Voltage drops in wiring can produce considerable load regulation errors in electrical systems (Figure A1). As load current IL increases, voltage drop in the wiring (IL • RW) increases and the voltage delivered to the system (VL) drops. The traditional approach to solving this problem, remote sensing, regulates the voltage at the load, increasing the power supply voltage (VOUT) to compensate for voltage drops in the wiring. While remote sensing works well, it does require an additional pair of wires to measure at the load, which may not always be practical. The LT4180 eliminates the need for a pair of remote sense wires by creating a virtual remote sense. Virtual remote sensing is achieved by measuring the incremental change in voltage that occurs with an incremental change in current in the wiring (Figure A2). This measurement can be used to infer the total DC voltage drop in the wiring, which can then be compensated for. The Virtual Remote Sense takes over control of the power supply via its feedback pin (VFB), maintaining tight regulation of load voltage VL. Figure A3 shows the timing diagram for Virtual Remote Sensing (VRS). A new cycle begins when the power supply and VRS close the loop around VOUT (Regulate VOUT = H). Both VOUT and IOUT slew and settle to a new value, and these values are stored in the Virtual Remote Sense (Track VOUTHIGH = L and Track IOUT = L). The VOUT feedback loop is opened and a new feedback loop is set up commanding the power supply to deliver 90% of the previously measured current (0.9 IOUT). VOUT drops to a new value as the power supply reaches a new steady state, and this information is also stored in the Virtual Remote Sense. At this point, the change in the output voltage (ΔVOUT) for a –10% change in output current has been measured and is stored in the Virtual Remote Sense. This voltage is used during the next VRS cycle to compensate for voltage drops due to wiring resistance. IL POWER SUPPLY + ISENSE VOUT IL POWER SUPPLY + VOUT – – VFB RW RW POWER WIRING + SYSTEM VL – AN125 A2 + POWER WIRING SYSTEM VL – AN125 A1 VIRTUAL REMOTE SENSE REMOTE SENSE WIRING Figure A1. Traditional Remote Sensing Works Well But Requires Two Sense Wires Figure A2. Virtual Remote Sensing Eliminates Sense Wires VOUT REGULATE VOUT TRACK VOUTHIGH TRACK IOUT REGULATE IOUT LOW TRACK VOUT LOW TRACK DVOUT AN126 A3 Figure A3. Simplified Virtual Remote Sense Timing Diagram. State Machine Driven Sequence Samples and Stores Information Necessary to Set Appropriate Power Supply Voltage to Correct for Wiring Losses an126fa AN126-15 Application Note 126 APPENDIX B Design Guidelines for LT4180 VRS Circuits INTRODUCTION The LT4180 is designed to interface with a variety of power supplies and regulators having either an external feedback or control pin. In Figure B1, the regulator error amplifier (which is a gm amplifier) is disabled by tying its inverting input to ground. This converts the error amplifier into a constant-current source which is then controlled by the drain pin of the LT4180. This is the preferred method of interfacing because it eliminates the regulator error amplifier from the control loop which simplifies compensation and provides best control loop response. For proper operation, increasing control voltage should correspond to increasing regulator output. For example, in the case of a current mode switching power supply, the control pin ITH should produce higher peak currents as the ITH pin voltage is made more positive. Isolated power supplies and regulators may also be used by adding an opto-coupler (Figure B2). LT4180 output voltage INTVCC supplies power to the opto-coupler LED. In situations where the control pin VC of the regulator may exceed 5V, a cascode may be added to keep the DRAIN pin of the LT4180 below 5V (Figure B3). Use a Low VT MOSFET for the cascode transistor. REGULATOR + – LT4180 ITH OR VC DRAIN AN126 B1 Figure B1. Nonisolated Regulator Interface REGULATOR + – VC OPTO-COUPLER INTVCC LT4180 DRAIN AN126 B2 Figure B2. Isolated Power Supply Interface TO VC COMP LT4180 INTVCC DRAIN AN126 B3 Figure B3. Cascoded DRAIN Pin for Isolated Supplies an126fa AN126-16 Application Note 126 DESIGN PROCEDURE The first step in the design procedure (Figure B4) is to determine whether the LT4180 will control a linear or switching supply/regulator. If using a switching power supply or regulator, it is recommended that the supply be synchronized to the LT4180 by connecting the OSC pin to the SYNC pin (or equivalent) of the supply. LT4180 DESIGN FLOW START LINEAR WHAT TYPE OF POWER SUPPLY/REGULATOR? NO If the power supply is synchronized to the LT4180, the power supply switching frequency is determined by: fOSC 4 = ROSC • COSC Recommended values for ROSC are between 20k and 100k (with 30.1k the optimum for best accuracy) and greater than 100pF for COSC. COSC may be reduced to as low as 50pF, but oscillator frequency accuracy will be somewhat degraded. The following example synchronizes a 250kHz switching power supply to the LT4180. In this example, start with ROSC = 30.1k: 4 COSC = = 531pF 250kHz • 30.1k This example uses 470pF. For 250kHz: 4 ROSC = = 34.04k 250kHz • 470pF SWITCHING IS SUPPLY SYNCHRONIZED TO LT4180? YES fOSC = 2MHz, UNLESS SYSTEM REQUIRES ANOTHER FREQUENCY fOSC = SWITCHING SUPPLY FREQUENCY CALCULATE fDITHER FROM POWER SUPPLY RESPONSE TIME OR CABLE PROPAGATION TIME DRATIO = fOSC /fDITHER. USE NEAREST HIGHER FREQUENCY DIVISION RATIO (TABLE 1, DATA SHEET) CALCULATE ACTUAL fDITHER USING SELECTED DIVISION RATIO USE ACTUAL fDITHER TO COMPUTE CLOAD, AND CHOLD1–3, SET CHOLD4 = 1μF CALCULATE FEEDBACK, UNDER AND OVERVOLTAGE RESISTOR NETWORK BUILD PROTOTYPE, ADJUST POWER SUPPLY COMPENSATION USING LOAD STEP TESTING WITH SPREAD SPECTRUM OFF The closest standard 1% value is 34k. The next step is to determine the highest practical dither frequency. This may be limited either by the response time of the power supply or regulator, or by the propagation time of the wiring connecting the load to the power supply or regulator. ADJUST CHOLD4 FOR PROPER VRS RESPONSE TRY SPREAD SPECTRUM IF NARROW BAND INTERFERENCE IS ANTICIPATED AN126 B4 DONE Figure B4. Design Flow Chart an126fa AN126-17 Application Note 126 First determine the settling time (to 1% of final value) of the power supply. The settling time should be the worst-case value (over the whole operating envelope: VIN, ILOAD, etc.). F1 = 1 2 • tSETTLING Hz For example, if the power supply takes 1ms to settle (worst-case) to within 1% of final value: F1 = 1 = 500Hz 2 • 1e – 3 Next, determine the propagation time of the wiring. In order to ignore transmission line effects, the dither period should be approximately twenty times longer than this. This will limit dither frequency to: VF F2 = Hz 20 • 1.017ns/ft • L where VF is the velocity factor (or velocity of propagation), and L is the length of the wiring (in feet). For example, assume the load is connected to a power supply with 1000ft of CAT5 cable. Nominal velocity of propagation is approximately 70%. F2 = 0.7 = 34.4kHz 20 • 1.017e – 9 • 1000 The maximum dither frequency should not exceed F1 or F2 (whichever is less): fDITHER < min (F1, F2). Continuing this example, the dither frequency should be less than 500Hz (limited by the power supply). With the dither frequency known, the division ratio can be determined: DRATIO = fOSC fDITHER = 250,000 = 500 500 The nearest division ratio is 512 (set DIV0 = L, DIV1 = DIV2 = H). Based on this division ratio, nominal dither frequency will be: f DITHER = fOSC DRATIO 250,000 = = 488Hz 512 After the dither frequency is determined, the minimum load decoupling capacitor can be determined. This load capacitor must be sufficiently large to filter out the dither signal at the load. CLOAD = R WIRE 2.2 • 2 • fDITHER where CLOAD is the minimum load decoupling capacitance, RWIRE is the minimum wiring resistance of one conductor of the wiring pair, and fDITHER is the minimum dither frequency. Continuing the example, our CAT5 cable has a maximum 9.38Ω/100m conductor resistance. Maximum wiring resistance is: RWIRE = 2 • 1000ft • 0.305m/ft • 0.0938Ω/m RWIRE = 57.2Ω With an oscillator tolerance of ±15%, the minimum dither frequency is 414.8Hz, so the minimum decoupling capacitance is: CLOAD = 2.2 = 46.36μF 57.2Ω • 2 • 414.8Hz This is the minimum value. Select a nominal value to account for all factors which could reduce the nominal, such as initial tolerance, voltage and temperature coefficients and aging. CHOLD Capacitor Selection and Compensation CHOLD1 A 47nF capacitor will suffice for most applications. A smaller value might allow faster recovery from a sudden load change, but care must be taken to ensure full load p-p ripple at this node is kept within 5mV: CHOLD2 = CHOLD3 = 2.5nF f DITHER(kHz) For a dither frequency of 488Hz: CHOLD2 = CHOLD3 = 2.5nF = 5.12nF 0.488(kHz) NPO ceramic or other capacitors with low leakage and dielectric absorption should be used for all HOLD capacitors. Set CHOLD4 to 1μF. This value will be adjusted later. an126fa AN126-18 Application Note 126 Compensation Start with a 47pF capacitor between the COMP and DRAIN pins of the LT4180. Add an RC network in parallel with the 47pF capacitor, 10k and 10nF are good starting values. Once the output voltage has been confirmed to regulate at the desired level at no load, increase the load current to the 100% level and monitor the wire current (dither current) with a current probe. Verify the dither current resembles a square-wave with the desired dither frequency. If the output voltage is too low, increase the value of the 10k resistor until some overshoot is observed at the leading edge of the dither current waveform. If the output voltage is still too low, decrease the value of the 10nF capacitor and repeat the previous step. Repeat this process until the full load output voltage increases to within 1% below the no load level. Refer to Figures B5a, B5b and B5c, which show compensation of the 12V 1.5A Buck Regulator Application on the data sheet. Check for proper voltage drop correction over the load range. The “dither current” should have good half-wave symmetry. Namely, waveform should have similar rise and fall times, enough settling time at top and bottom and minimum to no over/undershoot. VLOAD 11.9V IDITHER 50mA/DIV 20μs/DIV AN126 B5c Figure B5c. Dither Current and VOUT with 3.3nF, 28k Compensation 1.5A Load Set Final Value of CHOLD4 Set the minimum value for CHOLD4, by performing a transient load test of 30% to 60% of the load and set the value of CHOLD4 to where a nicely damped waveform is observed. Refer to Figures B6a and B6b for an illustration. After all the CHOLD values have been finalized, check for proper voltage drop correction and converter behavior (start-up, regulation etc.), over the load and input voltage ranges. VLOAD 1V/DIV VLOAD 11.2V IDITHER 500mA/DIV IDITHER 50mA/DIV 20μs/DIV AN126 B5a Figure B5a. Dither Current and VOUT with 10nF, 10k Compensation 1.5A Load 10ms/DIV Figure B6a. 500mA to 1A Transient Response Test with CHOLD4 = 25nF CHOLD4 Too Small VLOAD 11.9V VLOAD 1V/DIV IDITHER IDITHER 500mA/DIV 500mA/DIV 20μs/DIV 4180 F07b Figure B5b. Dither Current and VOUT with 10nF, 37k Compensation 1.5A Load AN126 B6a 10ms/DIV AN126 B6b Figure B6b. 500mA to 1A Transient Response Test with CHOLD4 = 47nF Nicely Damped Behaviour an126fa AN126-19 Application Note 126 Setting Output Voltage, Undervoltage and Overvoltage Thresholds The RUN pin has accurate rising and falling thresholds which may be used to determine when Virtual Remote Sense operation begins. Undervoltage threshold should never be set lower than the minimum operating voltage of the LT4180 (3.1V). The overvoltage threshold should be set slightly greater than the highest voltage which will be produced by the power supply or regulator: VOUT(MAX) = VLOAD(MAX) + VWIRE(MAX) VOUT(MAX) should never exceed 1.5 • VLOAD Since the RUN and OV pins connect to MOSFET input comparators, input bias currents are negligible and a common voltage divider can be used to set both thresholds (Figure B7). VIN R1 LT4180 RUN R2 R1= RT − RSERIES − R4 ⎛ R4 ⎞ 1.22 V − ⎜ VOUT(NOM) • ⎟ RT ⎠ ⎝ R3 = VOUT(NOM) RT R2 = RSERIES − R3 Where VUVL is the RUN voltage and VOUT(NOM) is the nominal output voltage desired. For example, with VUVL = 4V, VOV = 7.5V and VOUT(NOM) = 5V, RT = 7.5V = 37.5k 200μA R4 = 1.22V = 6.1k 200μA ⎛ 1.22V • 37.5k ⎞ RSERIES = ⎜ ⎟ − 6.1k = 5.34k ⎝ ⎠ 4V FB R3 OV R4 AN126 B5 Figure B7. Voltage Divider for UVL and OVL The voltage divider resistors can be calculated from the following equations: RT = ⎛ 1.22 • RT ⎞ RSERIES = ⎜ ⎟ − R4 ⎝ VUVL ⎠ VOV 1.22V , R4 = 200μA 200μA R1 = 37.5k − 5.34k − 6.1k = 26.06k ⎛ 5V • 6.1k ⎞ 1.22 V − ⎜ ⎟ ⎝ 37.5k ⎠ = 3.05k R3 = 5V 37.5k R2 = RSERIES − R3 = 2.29k where RT is the total divider resistance and VOV is the overvoltage set point. RSENSE SELECTION Find the equivalent series resistance for R2 and R3 (RSERIES). This resistance will determine the RUN voltage level. Select the value of RSENSE so that it produces a 100mV voltage drop at maximum load current. For best accuracy, VIN and SENSE should be Kelvin connected to this resistor. an126fa AN126-20 Application Note 126 Soft-Correct Operation The LT4180 has a soft-correct function which insures orderly start-up (Figure B8). When the RUN pin rising threshold is first exceeded (indicating VIN has crossed its undervoltage lockout threshold), power supply output voltage is set to a value corresponding to zero wiring voltage drop (no correction for wiring). Over a period of time (determined by CHOLD4), the power supply output voltage ramps up to account for wiring voltage drops, providing best load-end voltage regulation. A new soft-correct cycle is also initiated whenever an overvoltage condition occurs. 5V POWER SUPPLY OUTPUT VOLTAGE 10V POWER SUPPLY INPUT VOLTAGE substantial leakage current through the leakage resistance (RLKG). By adding a guard ring driver with approximately the same voltage as the voltage on the hold capacitor node, the difference voltage across RLKG1 is reduced substantially thereby reducing leakage current on the hold capacitor. Synchronization Linear and switching power supplies and regulators may be used with the LT4180. In most applications regulator interference should be negligible. For those applications where accurate control of interference spectrum is desirable, an oscillator output has been provided so that switching supplies may be synchronized to the LT4180 (Figure B10). The OSC pin was designed so that it may directly connect to most regulators, or drive opto-isolators (for isolated power supplies). REGULATOR AN126 B8 200ms/DIV SYNC LT4180 OSC Figure B8. Soft-Correct Operation, CHOLD4 = 1μF AN126 B10 Figure B10. Clock Interface for Synchronization Using Guard Rings The LT4180 includes a total of four track/holds in the Virtual Remote Sense path. For best accuracy, all leakage sources on the CHOLD pins should be minimized. At very low dither frequencies, the circuit board layout may include guard rings which should be tied to their respective guard ring drivers. To better understand the purpose of guard rings, a simplified model of hold capacitor leakage (with and without guard rings) is shown in Figure B9. Without guard rings, a large difference voltage may exist between the hold capacitor (Pin 1) node and adjacent conductors (Pin 2) producing RLKG RLKG1 RLKG2 Spread Spectrum Operation Virtual remote sensing relies on sampling techniques. Because switching power supplies are commonly used, the LT4180 uses a variety of techniques to minimize potential interference (in the form of beat notes which may occur between the dither frequency and power supply switching frequency). Besides several types of internal filtering, and the option for VRS/power supply synchronization, the LT4180 also provides spread spectrum operation. By enabling spread spectrum operation, low modulation index pseudo-random phasing is applied to Virtual Remote Sense timing. This has the effect of converting any remaining narrow-band interference into broadband noise, reducing its effect. Increasing Voltage Correction Range 1 2 WITHOUT GUARD RING 1 2 WITH GUARD RING AN126 B9 Figure B9. Simplified Leakage Models (with and without Guard Rings) Correction range may be slightly improved by regulating INTVCC to 5V. This may be done by placing an LDO between VIN and INTVCC. Contact Linear Technology Applications for more information. an126fa Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. AN126-21 Application Note 126 an126fa AN126-22 Linear Technology Corporation LT 1212 REV A • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com © LINEAR TECHNOLOGY CORPORATION 2011