UG-846: Evaluating the ADA8282 Radar Receive Path AFE PDF

ADA8282CP-EBZ User Guide
UG-846
One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com
Evaluating the ADA8282 Radar Receive Path AFE
FEATURES
GENERAL DESCRIPTION
Ready SPI interface for setup and control
Easy connection to test equipment
The ADA8282CP-EBZ is designed to aid in the evaluation of
the ADA8282 radar receive path analog front-end (AFE). The
board connects to the system demonstration platform (SDP) for
easy configuration of registers through a serial peripheral
interface (SPI) using the ACE evaluation software. The board
provides headers to allow configuration using other platforms.
It also includes on-board options to provide manual reset
capability to the part.
EVALUATION KIT CONTENTS
ADA8282CP-EBZ evaluation board
6 V, 2 A switching power source
EQUIPMENT NEEDED
PC running Windows®
USB 2.0 port
SDP-B
This user guide provides quick start instructions for working
with the board.
Full specifications for the ADA8282 are available in the product
data sheet, which should be consulted in conjunction with this
user guide when using the evaluation board.
SOFTWARE NEEDED
Analysis control evaluation (ACE) software
13269-100
DIGITAL PICTURE OF THE BOARD
Figure 1.
PLEASE SEE THE LAST PAGE FOR AN IMPORTANT
WARNING AND LEGAL TERMS AND CONDITIONS.
Rev. 0 | Page 1 of 16
UG-846
ADA8282CP-EBZ User Guide
TABLE OF CONTENTS
Features .............................................................................................. 1
Jumper Configurations .................................................................3
Evaluation Kit Contents ................................................................... 1
Evaluation Board Software Quick Start Procedures .....................4
Equipment Needed ........................................................................... 1
Evaluation Board Software ...........................................................4
Software Needed ............................................................................... 1
Quick Start Procedures .................................................................4
General Description ......................................................................... 1
Configuring the ADA8282 through ACE ..................................5
Digital Picture of the Board ............................................................ 1
Using the Register Debugger .......................................................5
Revision History ............................................................................... 2
Using the ACE Software Chip View ...........................................5
Evaluation Board Hardware ............................................................ 3
Using the ACE Memory Map ......................................................6
Power Supply ................................................................................. 3
ADA8282 Register Summary ......................................................7
Analog Inputs ................................................................................ 3
Evaluation Board Schematics and Artwork ...................................8
Analog Outputs............................................................................. 3
Ordering Information .................................................................... 15
Reset Logic Input .......................................................................... 3
Bill of Materials ........................................................................... 15
Digital Lines .................................................................................. 3
REVISION HISTORY
7/15—Revision 0: Initial Version
Rev. 0 | Page 2 of 16
ADA8282CP-EBZ User Guide
UG-846
EVALUATION BOARD HARDWARE
POWER SUPPLY
The ADA8282CP-EBZ comes with a wall-mountable switching
power supply that provides a 6 V, 2 A maximum output. The
supply may be connected to the rated 100 V ac to 240 V ac to
provide power to the board.
The ADA8282 requires 3.3 V for both analog (AVDD) and
digital (VIO) power. The evaluation board has an on-board
ADP7118 (U3) regulator for this purpose. U3 directly supplies
the power for AVDD. The user may opt to use U3 to provide
power to VIO by placing a header at VIO_3V3.
The SDP requires a 5 V supply to properly control the board.
This supply is derived from the on-board ADP7105 (U2). The
5V_EN header allows the user to enable or disable this supply.
Positions for the shunt to enable or disable are indicated on the
board. U2 may be disabled if a different external controller is used.
ANALOG INPUTS
Each input is configured with SMA ports, +JINx and –JINx
(where x stands for Channel A, Channel B, Channel C, or
Channel D), and terminated with 50 Ω for easy interfacing to
source equipment. The inputs are ac-coupled through 0.1 µF
capacitors to the ADA8282. Use P1INx (where x stands for
Channel A, Channel B, Channel C, or Channel D) to short any
two differential lines together.
The inputs of the ADA8282 are intended to be driven by a
differential signal source. The output signal swing is reduced by
a factor of 2 when driven by a single-ended source.
ANALOG OUTPUTS
Each output is configured with SMA ports, +JOUTx and
−JOUTx (where x stands for Channel A, Channel B, Channel C,
or Channel D), which allows easy interfacing to equipment.
Components are included for high-pass filtering at the output.
RESET LOGIC INPUT
A switch to control the RESET pin of the ADA8282 is available
on the board. The switch position to reset the board is indicated
on the evaluation board.
DIGITAL LINES
The SDP-B is used to provide digital signals to configure the
ADA8282. Short the SPI headers to use the SDP. If an external
controller is used to generate the digital signals, the signals can
be ported through the SPI header.
JUMPER CONFIGURATIONS
The jumper settings/link options on the evaluation board for
the required operating modes are described in Table 1. Figure 2
shows the default jumper settings.
Table 1. Jumper Descriptions
RESET
Description
SPI lines. Short all jumpers to configure the registers via the SDP.
Digital supply pin, VIO. Short the jumper to supply the VIO pin of the ADA8282 with the on-board regulator supply of 3.3 V.
5 V supply enable. Place a shunt at Position 1 to enable the 5 V on-board regulator. Place the shunt at Position 3 to disable the 5 V
on-board regulator. Correct positions are indicated on the board.
This switch provides the required logic level to reset the device through hardware. To reset, follow the indicated position on the board.
13269-101
Jumper
SPI
VIO_3V3
5V_ENBL
Figure 2. Default Evaluation Board Configuration
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ADA8282CP-EBZ User Guide
EVALUATION BOARD SOFTWARE QUICK START PROCEDURES
This section provides quick start procedures and software
information for using the ADA8282CP-EBZ board.
EVALUATION BOARD SOFTWARE
To use the board with the SDP-B, make sure that the ACE
software is available on your computer. The software installer
and a comprehensive user guide for the tool are available on the
ACE Wiki.
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QUICK START PROCEDURES
Figure 6 shows the typical evaluation board setup for the
ADA8282CP-EBZ. Complete the following steps to enable
functionality testing of the part:
1.
2.
3.
Double-click the ADA8282 component on the board to
navigate to the chip view (see Figure 5). Click the tabs to
select a previous or different view.
Configure the jumpers as shown in Figure 2.
Connect the SDP connector on the ADA8282CP-EBZ
to Connector A of the SDP-B.
Connect the 6 V power supply to the board at P2 and
connect to a power source.
Plug the USB cable into the USB port.
Run the ACE software.
Upon running the software, the hardware should
automatically be detected (see Figure 3).
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4.
5.
6.
Figure 4. ADA8282 ACE Board View
8.
Figure 5. ADA8282 ACE Chip View
Write a data byte of 0x0F to Register 0x17 to enable all
channels of the device, using any of the configuration
methods discussed in the Configuring the ADA8282
through ACE section.
10. Power up the signal generator and check the waveform
through the oscilloscope. The default gain is 18 dB for all
channels.
13269-003
9.
Figure 3. ACE Executable
Double-click the ADA8282 evaluation board plug-in to
navigate to the ACE board view (see Figure 4).
OSCILLOSCOPE
+JOUTx
COMPUTER
RUNNING
ACE
TO
USB
–JOUTx
SDP-B
ADA8282CP-EBZ
EVALUATION BOARD
P2
TO AC
POWER SOURCE
+JINx
SIGNAL
GENERATOR
Figure 6. Typical Evaluation Setup
Rev. 0 | Page 4 of 16
–JINx
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7.
ADA8282CP-EBZ User Guide
UG-846
CONFIGURING THE ADA8282 THROUGH ACE
To read from the device, complete the following steps:
The ACE software provides several views or interfaces for
configuring the ADA8282 via the SDP-B. Raw SPI writes and
reads may be done through the register debugger. The chip
view provides a more graphical approach to configuring the
ADA8282, while the memory map provides users with the
option to change register settings bit by bit.
1.
2.
Select the address from the Address drop-down menu,
Click Read (see Figure 9).
USING THE REGISTER DEBUGGER
Raw SPI data writes and reads may be performed on the device
using the register debugger.
To write to the device, complete the following steps:
Select the address from the Address drop-down menu on
the register debugger (see Figure 7).
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1.
Figure 9. Reading Data from the ADA8282
USING THE ACE SOFTWARE CHIP VIEW
The ACE software provides a chip view for the ADA8282. This
allows the user to configure the part graphically. Enabling or
disabling channels, along with gain manipulation, can be
accomplished using the chip view.
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To enable or disable a channel, click the channel of interest. An
enabled channel is highlighted in blue, while a disabled channel
is grayed out. In Figure 10, Channel A is enabled, while the rest
of the channels are disabled.
Figure 7. Register Debugger Drop-Down Menu
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Enter the data to be written to the device in the Data text
box and click Write (see Figure 8).
Figure 10. Enabled and Disabled Channels
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2.
Figure 8. Writing Data to the ADA8282
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ADA8282CP-EBZ User Guide
To manipulate the gain of a channel, type in the desired gain on
the corresponding channel that should be changed in the PGA
section. Note that only the gain of enabled channels may be
changed (see Figure 11).
USING THE ACE MEMORY MAP
The memory map for the ADA8282 can be accessed by clicking
the Proceed to Memory Map found on the lower right portion
of the chip view (see Figure 5). The memory map view can
show either the register fields or the bit fields of the device.
The register view allows the user to manipulate the bits one by
one. Each register may be expanded to show its corresponding
bit fields for easier configuration.
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13269-111
Clicking a bit toggles its value (see Figure 13).
Figure 11. Manipulating Gain
Figure 13. Register Field View
The bit field view allows the user to configure the ADA8282 by
modifying its control values. The hexadecimal data is displayed
in the Data (Hex) column.
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To write the preferred settings to the registers of the device,
click Apply Changes on the toolbar (see Figure 12).
13269-114
Figure 12. Chip View Toolbar
Figure 14. Bit Field View
As with the chip view, the desired setting of the registers is only
written to the ADA8282 when Apply Changes is clicked.
For more detailed information on using the ACE software, see
the ACE Wiki.
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ADA8282CP-EBZ User Guide
UG-846
ADA8282 REGISTER SUMMARY
The register settings for the ADA8282 are given in the register section of the ADA8282 data sheet. An abbreviated register summary is
shown in Table 2.
Table 2. ADA8282 Register Summary
Register Address
0x00
0x01
0x04
0x05
0x06
0x10
0x11
0x12
0x13
0x14
0x15
0x17
0x18
0x1D
0x1E
Register Name
INTF_CONFA
SOFT_RESET
CHIP_ID1
CHIP_ID2
Revision
LNA_OFFSET0
LNA_OFFSET1
LNA_OFFSET2
LNA_OFFSET3
BIAS_SEL
PGA_GAIN
EN_CHAN
EN_BIAS_GEN
SPAREWR0
SPARERD0
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ADA8282CP-EBZ User Guide
49.9Ω
+JINA
C1INA
AGND
1
2 3 4 5
R1INA
EVALUATION BOARD SCHEMATICS AND ARTWORK
0.1µF
C2INA
1
2
–INA
0.1µF
49.9Ω
R2INA
1
2 3 4 5
–JINA
+INA
P1INA
AGND
AGND
49.9Ω
+JINB
1
2 3 4 5
R1INB
AGND
C1INB
0.1µF
C2INB
49.9Ω
R2INB
1
2 3 4 5
–JINB
+INB
P1INB
1
2
–INB
0.1µF
AGND
AGND
49.9Ω
+JINC
1
2 3 4 5
R1INC
AGND
C1INC
0.1µF
R2INC
1
2 3 4 5
49.9Ω
C2INC
–JINC
+INC
P1INC
1
2
–INC
0.1µF
AGND
49.9Ω
C1IND
0.1µF
49.9Ω
1
2 3 4 5
–JIND
R2IND
C2IND
AGND
AGND
Figure 15. Input Schematic
Rev. 0 | Page 8 of 16
+IND
P1IND
1
2
–IND
0.1µF
13269-008
AGND
1
2 3 4 5
+JIND
R1IND
AGND
ADA8282CP-EBZ User Guide
UG-846
AGND
AGND
AGND
0.1µF
–JOUTC
1
AGND
0
C3OUTD
0.1µF
–JOUTD
1
AGND
Figure 16. Output Schematic
Rev. 0 | Page 9 of 16
AGND
AGND
AGND
13269-009
R2OUTD
5kΩ
–OUTD
0.1µF
5kΩ
1
2
AGND
+JOUTD
1
P2OUTD
1
2
R3OUTD
P1OUTD
5PF
0
AGND
C2OUTD
R1OUTD
C1OUTD
+OUTD
AGND
5kΩ
C3OUTC
0
R4OUTC
R2OUTC
R3OUTC
–OUTC
0.1µF
AGND
+JOUTC
1
P2OUTC
1
2
5kΩ
1
2
5PF
0
AGND
C2OUTC
R1OUTC
C1OUTC
+OUTC
P1OUTC
AGND
5kΩ
0.1µF
–JOUTB
1
R4OUTB
C3OUTB
0
R4OUTD
R2OUTB
R3OUTB
–OUTB
AGND
+JOUTB
1
P2OUTB
1
2
5kΩ
1
2
P1OUTB
0.1µF
5PF
0
AGND
C2OUTB
R1OUTB
C1OUTB
+OUTB
5kΩ
–JOUTA
1
R4OUTA
0.1µF
5kΩ
C3OUTA
0
+JOUTA
1
P2OUTA
1
2
R3OUTA
R2OUTA
–OUTA
0.1µF
5PF
1
2
C1OUTA
0
P1OUTA
C2OUTA
R1OUTA
+OUTA
VIO
3V3A
AVDD
25
26
VIO
PDWN
27
SCLK
28
SCLK
SDO
SDO
16
15
24 +OUTA
23 OUTA
22 +OUTB
21 OUTB
20 +OUTC
19 OUTC
18 +OUTD
17 OUTD
AVDD
–OUTD
NIC
–IND
NIC
+OUTD
14
ADA8282WBCPZ
AGND
Figure 17. DUT Schematic
Rev. 0 | Page 10 of 16
13269-010
AGND
0.1µF
3V3A
AGND
C6
8
–OUTC
+IND
NIC
–IND
–INC
NIC
7
13
+IND
+OUTC
NIC
6
–OUTB
+INC
12
–INC
–INB
11
5
+OUTB
NIC
+INC
–OUTA
+INB
0.1µF
4
31
32
PAD
GND
–INB
–INA
AVDD
3
U5
+OUTA
9
+INB
+INA
10
2
3V3A
1
–INA
C5
+INA
AVDD
AGND
29
0.1µF
CSB
C4
SDI
0.1µF
30
C3
SDI
0.1µF
3V3A
C2
RESET
ADA8282CP-EBZ User Guide
CSB
UG-846
PJ-002A-SMT
1
A
C
GND1
5001
Figure 18. Power Section Schematic
Rev. 0 | Page 11 of 16
GND4
GND3
1
50015001
1
21
GND5
5001
AGND 330OHM DGND
E1
AGND
DNI
DNI
DNI
TP2
5001
1
TP1
5001
GND2
5001
DNI
DNI
AGND
1
1
AGND
1
GND6
5001
DNI
G 1 G2
DNI
AGND
1
DNI
6.8V
SMBJ5342B-TP
CR1
1 IN
1
2
3
5V_EN
AGND
C13
1µF
AGND
SAMTECTSW10608GS3PIN
C8
1µF
AGND
C12
OUT 3
5
8
VOUT
AGND
PAD
3 6 PAD
GND
2
1
7
PG
4
SS
SENSE/ADJ
EN/UVLO
VIN
U2
ADP7105ARDZ-5.0
AGND
7
1
VIN
VOUT
8
2
VIN
VOUT
5
EN
3
SENSE/ADJ
6
SS
GND PAD
4 PAD
AGND
C9
1µF
AGND
C14
1µF
0Ω
R7
1
DS2
SML-LX0603GW-TR
R4
1kΩ
AGND
C
A
1
SML-LX0603GW-TR
DS1
AGND
C
A
R6
165Ω
0Ω
R5
DNI
5V
5001
5V
TSW-102-08-G-S
VIO_3V3
3V3A
VIO
1
TP_VIO
AGND
AGND
RESETVIO
2
1
3
AGND
RESET
1
DNI
AVDD
3V3A
C1
1
2
0.50A
10µF
16V
4A
P
N
1
2
F1
C7
P2
1
3
2
P
N
DNI
3V3
5001
10µF
U3
ADP7118ARDZ-3.3
ADA8282CP-EBZ User Guide
UG-846
13269-011
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ADA8282CP-EBZ User Guide
THE SDP CONNECTOR IMPLEMENTS THE E13 CONNECTOR SPECIFICATIONS STANDARD. THIS IS A STANDARD FOR USE ACROSS ADI AND CANNOT BE MODIFIED
3.3V
DNI
R1
R2
100kΩ
100kΩ
60
59
58
57
56
55
54
53
12C BUS 1 IS COMMON ACROSS BOTH
CONNECTORS ON SDP - PULL UP RESISTORS
REQUIRED (CONNECTED TO BLACKFIN
GPIO - USE 12C_0 FIRST)
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
SPI_SEL1/SPI_SS MUST BE ONLY USED
WITH EXTERNAL SPI FLASH
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
DGND
5V
2
1
RESET_IN_N
UART_RX
GND
SDP
R0603
61
TOL=1
BMODE1
UART_TX
GND
RESET_OUT_N
SLEEP_N
EEPROM_A0
WAKE_N
NC
NC
NC
NC
NC
NC
GND
GND
NC
NC
NC
CLKOUT
TMR_C
TMR_D
TMR_A
TMR_B
GPIO6
GPIO7
GND
GND
GPIO4
GPIO5
GPIO2
GPIO3
GPIO0
GPIO1
SCL_1
SCL_0
SDA_1
SDA_0
GND
GND
SPI_SEL1/SPI_SS_N
SPI_SEL_C_N
SPI_SEL_B_N
GND
SPI_CLK
SPI_MISO
SPI_MOSI
SPI_SEL_A
SERIAL_INT
GND
SPI_D3
SPORT_TSCLK
SPI_D2
SPORT_DT0
SPORT_DT1
SPORT_TFS
SPORT_DR1
SPORT_RFS
SPORT_TDV1
SPORT_DR0
SPORT_TDV0
SPORT_RSCLK
GND
GND
PAR_FS1
PAR_CLK
PAR_FS3
PAR_FS2
PAR_A1
PAR_A0
PAR_A3
PAR_A2
GND
GND
PAR_CS_N
PAR_INT
PAR_RD_N
PAR_WR_N
PAR_D1
PAR_D0
PAR_D3
PAR_D2
PAR_D5
PAR_D4
GND
GND
PAR_D7
PAR_D6
PAR_D9
PAR_D8
PAR_D11
PAR_D10
PAR_D13
PAR_D12
PAR_D14
GND
GND
PAR_D15
PAR_D17
PAR_D16
PAR_D19
PAR_D18
PAR_D21
PAR_D20
PAR_D23
GND
PAR_D22
GND
USB_VBUS
VIO(+3.3V)
GND
GND
GND
GND
NC
NC
VIN
NC
R0603
2
3
62
DGND
63
64
DGND
66
68
6
7
8
VCC
C39
C40
10µF
0.1µF
DGND
A0
24LC32A-I/ST
A1
A2
SDA
5 TSSOP8
SCL
WP
BOARD ID EEPROM (24LC32)
MUST BE ON I2C BUS 0
VSS
TOL=1
4
BMODE1: PULL UP WITH A 10kΩ RESISTOR
TO SET SDP TO BOOT FROM A SPI FLASH
ON THE DAUGHTER BOARD
DGND
SPI
SDP_SCLK
69
1
SCLK
70
2
SDP_SDO
71
3
SDO
72
4
SDP_SDI
73
5
SDI
74
6
SDP_CSB
75
7
CSB
76
77
8
TSW-104-08-G-D
78
79
80
81
82
R0603
R60
33Ω
84
R0603
R61
33Ω
85
R0603
R62
33Ω
R0603
R63
83
86
87
88
MAIN 12C BUS (CONNECTED TO BLACKFIN TWI PULL UP RESISTORS NOT REQUIRED)
3.3V
C10
DGND
U4
5
VCC
4 Y
0.1µF
SDP_SCLK
A
OE_N
GND
74HC1G125GW 3
89
90
91
2
SDP_SDO
1
3.3V
R71 49.9kΩ
SDP_SDI
SDP_CSB
DGND
92
93
94
95
96
97
98
99
100
101
102
103
WHEN USING SPI INTERFACE, BE AWARE OF ADDING A PULL UP
ON THE SPI_SEL_A/B/C LINES THAT ARE ACTIVE LOW ENABLED
SINCE SPI IS A SHARED BUS, ENSURE THAT ANY SPI DEVICE ON DAUGHTER BOARD
IS NOT ACTIVELY DRIVING THE MISO DATA LINE UNLESS PROPERLY ADDRESSED WITH
AN ACTIVE LOW CHIP SELECT. ENSURE ALSO THAT THE SPI CLK LINE IS NOT HELD
HIGH OR LOW BY YOUR BOARD AT POWER UP. FAILURE TO MEET THIS
RESULT TO A NON-FUNCTIONAL SYSTEM.
104
105
106
107
108
109
110
111
112
113
114
115
116
117
3.3V
VIO: USE TO SET IO VOLTAGE MAX DRAW 20MA: USE ONLY TO POWER THE EEPROM (3MA MAX DRAW)
118
119
120
13269-012
THE SDP REQUIRES 5V 300MA
VIN: USE THIS PIN TO POWER
R3
100kΩ
R0603
65
67
1
P
N
U1
FX8-120S-SV(21)
DGND
Figure 19. SDP Schematic
Rev. 0 | Page 12 of 16
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ADA8282CP-EBZ User Guide
13269-014
Figure 20. Evaluation Board Layout, Layer 1
Figure 21. Evaluation Board Layout, Layer 2
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ADA8282CP-EBZ User Guide
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Figure 22. Evaluation Board Layout, Layer 3
Figure 23. Evaluation Board Layout, Layer 4
Rev. 0 | Page 14 of 16
ADA8282CP-EBZ User Guide
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ORDERING INFORMATION
BILL OF MATERIALS
Table 3.
Item
1
2
3
4
5
6
Qty
1
1
1
1
1
8
Reference Designator
U1
U2
U3
U4
U5
+JINA, +JINB, +JINC, +JIND,
−JINA, −JINB, −JINC, −JIND
+JOUTA, +JOUTB, +JOUTC, +JOUTD,
−JOUTA, −JOUTB, −JOUTC, −JOUTD
5V_EN
C1, C7
7
8
8
9
1
2
10
14
11
12
1
4
C2 to C6, C10, C1INA, C1INB, C1INC,
C1IND, C2INA, C2INB, C2INC, C2IND
C12
C8, C9, C13, C14
13
4
C1OUTA, C1OUTB, C1OUTC, C1OUTD
14
8
15
1
C2OUTA, C2OUTB, C2OUTC, C2OUTD,
C3OUTA, C3OUTB, C3OUTC, C3OUTD
C39
16
17
1
1
C40
CR1
18
19
20
21
2
1
1
12
22
23
1
8
24
10
25
2
DS1, DS2
E1
F1
P1INA, P1INB, P1INC, P1IND, P1OUTA,
P1OUTB, P1OUTC, P1OUTD, P2OUTA,
P2OUTB, P2OUTC, P2OUTD
P2
R1INA, R1INB, R1INC, R1IND, R2INA,
R2INB, R2INC, R2IND
R5, R7, R1OUTA, R1OUTB, R1OUTC,
R1OUTD, R2OUTA, R2OUTB, R2OUTC,
R2OUTD
R2, R3
26
8
27
28
29
30
31
32
33
34
35
1
1
4
1
1
1
1
1
1
R3OUTA, R3OUTB, R3OUTC, R3OUTD,
R4OUTA, R4OUTB, R4OUTC, R4OUTD
R4
R6
R60 to R63
R71
RESET
SDP
SPI
TP_VIO
VIO_3V3
Description
IC 32 kB serial EEPROM
500 mA, low noise regulator
Low noise linear regulator
IC-TTL bus buffer
4-channel LNA and PGA
End launch SMA
Manufacturer
Microchip Technology
Analog Devices, Inc.
Analog Devices, Inc.
NXP Semiconductors
Analog Devices, Inc.
Johnson
Part Number
24LC32A-I/ST
ADP7105ARDZ-5.0
ADP7118ARDZ-3.3
74HC1G125GW
ADA8282WBCPZ
142-0701-801
Straight SMA
Johnson
142-0701-201
3-pin header
10 µF, 100 V tantalum
capacitor
0.1 µF, X7R, 50 V, 0805
capacitor
1 µF, 25 V, 0805 capacitor
1 µF, X5R, 6.8 V, 0603
capacitor
5 pF, C0G, 2.2 V, 0805
capacitor
1 µF, X7R, 0805 capacitor
Samtec
Kemet
TSW-103-08-G-S
T491D106K025AT
Kemet
C0805C104J5RACTU
Murata
Murata
NFM21PC105B1C3B
GRM188R61E105KA12D
Murata
GQM2195C2A5R0CB01D
AVX
08051C104JAT2A
AVX
TAJA106K010RNJ
TDK
Micro Commercial
Components
Lumex
Murata
Littelfuse
Berg
C1608X8R1E104K
SMBJ5342B-TP
SML-LX0603GW-TR
BLM21PG331SN1D
1210L050YR
69157-102
Power jack
SM, 49.9 Ω, 1%, 1/10 W, 0805
resistor
SM, 0 Ω, 1%, 1/16 W, 0805
resistor
CUI Inc.
Panasonic
PJ-002A-SMT
ERJ-6ENF49R9V
Panasonic
ERJ-6GEY0R00V
SM, 100 kΩ, 1%, 1/10 W,
0603 resistor
SM, 5 kΩ, 0805 resistor
Panasonic
ERJ-3EKF1003V
Vishay
PNM0805E5001BST5
SM, 1 kΩ, 0603 resistor
SM, 165 Ω, 0603 resistor
SM, 33 Ω, 0603 resistor
SM, 49.9 kΩ, 0603 resistor
Slide switch
SDP connector
8-pin header
Test point
2-pin header
Panasonic
Panasonic
Multicomp
Panasonic
Secma
Hirose
Samtec
Vector
Samtec
ERJ-3EKF1001V
ERJ-3EKF1650V
MC 0.063W 0603 1% 33R
ERJ-3EKF4992V
09-03-201-02
FX8-120S-SV(21)
TSW-104-08-G-D
K24A
TSW-102-08-G-S
10 µF, 13.2 V tantalum
capacitor
1 µF, X8R, 0603 capacitor
Zener
LED
Ferrite bead, 330 Ω, 0805
Fuse, 50 V
2-pin header
Rev. 0 | Page 15 of 16
UG-846
ADA8282CP-EBZ User Guide
NOTES
ESD Caution
ESD (electrostatic discharge) sensitive device. Charged devices and circuit boards can discharge without detection. Although this product features patented or proprietary protection
circuitry, damage may occur on devices subjected to high energy ESD. Therefore, proper ESD precautions should be taken to avoid performance degradation or loss of functionality.
Legal Terms and Conditions
By using the evaluation board discussed herein (together with any tools, components documentation or support materials, the “Evaluation Board”), you are agreeing to be bound by the terms and conditions
set forth below (“Agreement”) unless you have purchased the Evaluation Board, in which case the Analog Devices Standard Terms and Conditions of Sale shall govern. Do not use the Evaluation Board until you
have read and agreed to the Agreement. Your use of the Evaluation Board shall signify your acceptance of the Agreement. This Agreement is made by and between you (“Customer”) and Analog Devices, Inc.
(“ADI”), with its principal place of business at One Technology Way, Norwood, MA 02062, USA. Subject to the terms and conditions of the Agreement, ADI hereby grants to Customer a free, limited, personal,
temporary, non-exclusive, non-sublicensable, non-transferable license to use the Evaluation Board FOR EVALUATION PURPOSES ONLY. Customer understands and agrees that the Evaluation Board is provided
for the sole and exclusive purpose referenced above, and agrees not to use the Evaluation Board for any other purpose. Furthermore, the license granted is expressly made subject to the following additional
limitations: Customer shall not (i) rent, lease, display, sell, transfer, assign, sublicense, or distribute the Evaluation Board; and (ii) permit any Third Party to access the Evaluation Board. As used herein, the term
“Third Party” includes any entity other than ADI, Customer, their employees, affiliates and in-house consultants. The Evaluation Board is NOT sold to Customer; all rights not expressly granted herein, including
ownership of the Evaluation Board, are reserved by ADI. CONFIDENTIALITY. This Agreement and the Evaluation Board shall all be considered the confidential and proprietary information of ADI. Customer may
not disclose or transfer any portion of the Evaluation Board to any other party for any reason. Upon discontinuation of use of the Evaluation Board or termination of this Agreement, Customer agrees to
promptly return the Evaluation Board to ADI. ADDITIONAL RESTRICTIONS. Customer may not disassemble, decompile or reverse engineer chips on the Evaluation Board. Customer shall inform ADI of any
occurred damages or any modifications or alterations it makes to the Evaluation Board, including but not limited to soldering or any other activity that affects the material content of the Evaluation Board.
Modifications to the Evaluation Board must comply with applicable law, including but not limited to the RoHS Directive. TERMINATION. ADI may terminate this Agreement at any time upon giving written notice
to Customer. Customer agrees to return to ADI the Evaluation Board at that time. LIMITATION OF LIABILITY. THE EVALUATION BOARD PROVIDED HEREUNDER IS PROVIDED “AS IS” AND ADI MAKES NO
WARRANTIES OR REPRESENTATIONS OF ANY KIND WITH RESPECT TO IT. ADI SPECIFICALLY DISCLAIMS ANY REPRESENTATIONS, ENDORSEMENTS, GUARANTEES, OR WARRANTIES, EXPRESS OR IMPLIED, RELATED
TO THE EVALUATION BOARD INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, TITLE, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT OF INTELLECTUAL
PROPERTY RIGHTS. IN NO EVENT WILL ADI AND ITS LICENSORS BE LIABLE FOR ANY INCIDENTAL, SPECIAL, INDIRECT, OR CONSEQUENTIAL DAMAGES RESULTING FROM CUSTOMER’S POSSESSION OR USE OF
THE EVALUATION BOARD, INCLUDING BUT NOT LIMITED TO LOST PROFITS, DELAY COSTS, LABOR COSTS OR LOSS OF GOODWILL. ADI’S TOTAL LIABILITY FROM ANY AND ALL CAUSES SHALL BE LIMITED TO THE
AMOUNT OF ONE HUNDRED US DOLLARS ($100.00). EXPORT. Customer agrees that it will not directly or indirectly export the Evaluation Board to another country, and that it will comply with all applicable
United States federal laws and regulations relating to exports. GOVERNING LAW. This Agreement shall be governed by and construed in accordance with the substantive laws of the Commonwealth of
Massachusetts (excluding conflict of law rules). Any legal action regarding this Agreement will be heard in the state or federal courts having jurisdiction in Suffolk County, Massachusetts, and Customer hereby
submits to the personal jurisdiction and venue of such courts. The United Nations Convention on Contracts for the International Sale of Goods shall not apply to this Agreement and is expressly disclaimed.
©2015 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
UG13269-0-7/15(0)
Rev. 0 | Page 16 of 16