Atmel AVR32844: UC3L Schematic Checklist Features • • • • • • • Power circuits Reset circuit Clock and crystal oscillators aWire, JTAG and Nexus debug ports Capacitive touch (CAT) module USB connection Patents and trademarks: - Atmel® QTouch® (patented charge-transfer method) - Atmel QMatrix (patented charge-transfer method) 8-bit Atmel Microcontrollers Application Note 1 Introduction A good hardware design comes from a proper schematic. Since Atmel AVR® UC3L devices have a fair number of pins and functions, the schematic for these devices can be large and quite complex. This application note describes a common checklist, which should be used when starting and reviewing the schematics for a UC3L design. Rev. 32170A-AVR-08/11 2 Power circuit 2.1 Single 3.3 volt power supply Figure 2-1. Single 3.3 volt power example schematic. Close to each pin DC/DC converter VDDIO 100nF VDDIN 3.33.3 volt volt 10µF 100nF Voltage regulator VDDCORE 2.2µF 100nF Table 2-1. Single 3.3 volt power supply checklist. Signal name VDDIO VDDIN Recommended pin connection Description 1.62V to 3.6V Powers I/O lines, OSC32K, RC32K, AST, wake, POR33 and SM33. Decoupling/filtering capacitors (1)(2) and 10µF(1) 100nF Decoupling/filtering capacitors must be added to improve startup stability and reduce source voltage drop. 1.98V to 3.6V Powers I/O lines and internal voltage regulator. Decoupling/filtering capacitors (1)(2) and 10µF(1) 100nF Decoupling/filtering capacitors must be added to improve startup stability and reduce source voltage drop. Output of the on-chip 1.8V voltage regulator. Powers CPU, peripherals, memories, SCIF, BOD, RCSYS and DFLL. VDDCORE Decoupling/filtering capacitors 100nF(1)(2) and 2.2µF(1) Notes: Decoupling/filtering capacitors must be added to improve startup stability and reduce source voltage drop. 1. These values are given only as a typical example. 2. Capacitor should be placed as close as possible to each pin in the signal group, vias should be avoided. 2 Atmel AVR32844 32170A-AVR-08/11 Atmel AVR32844 2.2 Single 1.8 volt power supply Figure 2-2. Single 1.8 volt power example schematic. DC/DC converter Close to each pin VDDIO 1.83.3 volt volt 10 µF 100nF VDDIN 100nF Voltage regulator VDDCORE 100nF Table 2-2. Single 1.8 volt power supply checklist. Signal name VDDIO VDDIN VDDCORE Notes: Recommended pin connection Description 1.62V to 1.98V Powers I/O lines, OSC32K, RC32K, AST, wake, POR33 and SM33. Decoupling/filtering capacitors (1)(2) and 10µF(1) 100nF Decoupling/filtering capacitors must be added to improve startup stability and reduce source voltage drop. 1.62V to 1.98V Powers I/O lines, internal voltage regulator not in use. Decoupling/filtering capacitors (1)(2) and 10µF(1) 100nF Decoupling/filtering capacitors must be added to improve startup stability and reduce source voltage drop. 1.62V to 1.98V Powers CPU, peripherals, memories, SCIF, BOD, RCSYS and DFLL. Decoupling/filtering capacitors (1)(2) and 10µF(1) 100nF Decoupling/filtering capacitors must be added to improve startup stability and reduce source voltage drop. 1. These values are given only as a typical example. 2. Capacitor should be placed as close as possible to each pin in the signal group, vias should be avoided. 3 32170A-AVR-08/11 2.3 Single 3.3 volt power supply with 1.8V I/O lines Figure 2-3. Single 3.3 volt power with 1.8 volt I/O lines example schematic. Close to each pin DC/DC converter 10µF VDDIN 100nF 3.3 volt VDDIO 100nF Voltage regulator VDDCORE 2.2µF 100nF Table 2-3. Single 3.3 volt power supply with 1.8 volt I/O lines checklist. Signal name VDDIO VDDIN Recommended pin connection Description Connected to VDDCORE Powers I/O lines, OSC32K, RC32K, AST, wake, POR33 and SM33. Decoupling/filtering capacitors (1)(2) and 2.2µF(1) 100nF Decoupling/filtering capacitors must be added to improve startup stability and reduce source voltage drop. 1.98V to 3.6V Powers I/O lines and internal voltage regulator. Decoupling/filtering capacitors (1)(2) and 10µF(1) 100nF Decoupling/filtering capacitors must be added to improve startup stability and reduce source voltage drop. Output of the on-chip 1.8V voltage regulator. Powers CPU, peripherals, memories, SCIF, BOD, RCSYS and DFLL. VDDCORE Decoupling/filtering capacitors 100nF(1)(2) and 2.2µF(1) Notes: Decoupling/filtering capacitors must be added to improve startup stability and reduce source voltage drop. 1. These values are given only as a typical example. 2. Capacitor should be placed as close as possible to each pin in the signal group, vias should be avoided. 4 Atmel AVR32844 32170A-AVR-08/11 Atmel AVR32844 2.4 ADC reference power supply The following schematic checklist is mandatory even if the internal ADC is not in use. Figure 2-4. ADC reference power supply example schematic. Close to pin VDDANA VDDCORE 100nF ADVREF GNDANA Table 2-4. ADC reference power supply checklist. Signal name VDDANA Recommended pin connection Description 1.62V to 1.98V Powers the on-chip ADC, must always be powered since the analog multiplexer is powered by another domain. RF EMI inductor(3) Decoupling/filtering capacitor must be added to improve startup (1)(2) Decoupling/filtering capacitor 100nF stability and reduce source voltage drop. ADVREF 1.62V to VDDANA Connect with VDDANA GNDANA Connect to analog ground Notes: ADVREF is a pure analog input. 1. These values are given only as a typical example. 2. Capacitor should be placed as close as possible to each pin in the signal group, vias should be avoided. 3. RF EMI inductor only needed if ADC is used in the design. 5 32170A-AVR-08/11 3 Reset circuit Figure 3-1. Reset circuit example schematic. VDDIO 10k ohm Reset 100nF Table 3-1. Reset circuit checklist. Signal name RESET Note: 6 (1) Recommended pin connection Description Can be left unconnected in case no The RESET_N pin is a Schmitt input and integrates a permanent pullreset from the system needs to be up resistor to VDDIO applied to the product 1. RESET_N pin is used by aWire. Reset circuitry should be disabled when using RESET_N pin during aWire operation. Check Chapter 5 of this document. Atmel AVR32844 32170A-AVR-08/11 Atmel AVR32844 4 Clocks and crystal oscillators 4.1 External clock source Figure 4-1. External clock source schematic. Table 4-1. External clock source checklist. Signal name Recommended pin connection Description XIN Connected to clock output from external clock source Up to VDDIO volt square wave signal up to 50MHz XOUT Can be left unconnected or used as GPIO 4.2 Crystal oscillator Figure 4-2. Crystal oscillator example schematic. XIN 22pF XOUT 22pF Table 4-2. Crystal oscillator checklist. Signal name XIN XOUT Notes: Recommended pin connection Description Biasing capacitor 22pF (1)(2) External crystal between 3MHz and 16MHz, powered by VDDIO Biasing capacitor 22pF (1)(2) Powered by VDDIO 1. These values are given only as a typical example The capacitance C of the biasing capacitors can be computed based on the crystal load capacitance CL and the internal capacitance Ci of the MCU as follows: C = 2(CL – Ci) The value of CL can be found in the crystal datasheet and the value of Ci can be found in the MCU datasheet. 2. Capacitor should be placed as close as possible to each pin in the signal group, vias should be avoided. 7 32170A-AVR-08/11 4.3 32kHz crystal oscillator Figure 4-3. 32kHz crystal oscillator example schematic. XIN32 15pF 32 kHz XOUT32 15pF Table 4-3. 32kHz crystal oscillator checklist. Signal name Recommended pin connection (1)(2) XIN32 Biasing capacitor max. 15pF XOUT32 Biasing capacitor max. 15pF(1)(2) Notes: Description External 32kHz crystal. Primary (PA10) powered by VDDIO, secondary (PA13- XIN32_2) powered by VDDIN Primary (PA12) powered by VDDIO, secondary (PA20 – XOUT32_2) powered by VDDIN 1. These values are given only as a typical example The capacitance C of the biasing capacitors can be computed based on the crystal load capacitance CL and the internal capacitance Ci of the MCU as follows: C = 2(CL – Ci) The value of CL can be found in the crystal datasheet and the value of Ci can be found in the MCU datasheet. 2. Capacitor should be placed as close as possible to each pin in the signal group, vias should be avoided. 8 Atmel AVR32844 32170A-AVR-08/11 Atmel AVR32844 5 JTAG and Nexus debug ports 5.1 aWire port interface Figure 5-1. aWire port interface example schematic. RESET_N / DATA aWire data in/out PA00 / DATAOUT aWire data out Optional MCU aWire master connector Board Reset Circuitry Jumper AW Debug Interface RESET_N Power Manager Table 5-1. aWire port interface checklist. Signal name Recommended pin connection Description DATA Connect to aWire DATA signal on external tool Device external reset line used for data input and output. Reset circuitry should be disabled as shown above when the RESET_N pin is used during aWire operation DATAOUT Optional, connect to aWire DATAOUT signal on external tool Data output is optional and only needed for aWire full duplex mode Note: 1. The aWire needs an external pull-up on the RESET_N pin to ensure that the pin is pulled up when the bus is not driven. 9 32170A-AVR-08/11 5.2 JTAG port interface Figure 5-2. JTAG port interface example schematic. TMS 1 3 5 7 9 2x5 header TCK GND TDO VCC TMS RESET 4 VDD TCK 100nF 6 8 EVTO TDI TDO 2 GND RESET 10 TDI Table 5-2. JTAG port interface checklist. Signal name Recommended pin connection Description TMS PA01 Test mode select, sampled on rising TCK TDO PA02 Test data output, driven on falling TCK TCK PA00 Test clock, fully asynchronous to system clock frequency RESET RESET Device external reset line TDI PA03 Test data input, sampled on rising TCK EVTO 10 Event output, not used Atmel AVR32844 32170A-AVR-08/11 Atmel AVR32844 5.3 Nexus port interface Figure 5-3. Nexus port interface example schematic. TDI 1 3 5 7 9 11 13 15 17 19 VDD 100nF 21 10k 23 25 27 29 31 33 35 35 39 41 43 1 Nexus interface 2 3 4 5 6 7 8 RESET EVTI TDO VCC 13 14 TCK 16 TMS 18 TDI MDO5 TRST MDO4 23 MDO3 25 MDO2 27 MDO1 29 MDO0 31 EVTO 33 MCK0 35 MSEO1 37 MSEO0 GND GND GND GND 2 TMS 4 6 TCK 8 TDO 10 12 14 16 VDD 100nF RESET EVTI 18 20 MDO[0:5] 22 24 26 28 30 EVTO 32 34 MCK0 36 MSEO[0:1] 38 40 42 GND 11 32170A-AVR-08/11 Table 5-3. Nexus port interface checklist. Signal name Recommended pin connection Description TDI PA03 Test data input, sampled on rising TCK TMS PA01 Test mode select, sampled on rising TCK TCK PA00 Test clock, fully asynchronous to system clock frequency TDO PA02 Test data output, driven on falling TCK RESET Device external reset line RESET EVTI (1) MDO[0:5] Event input (1) EVTO PA04 Event output MCK0(1) Trace data output clock MSE[0:1] (1) Trace frame control Note: 12 Trace data output 1. Two different connections are possible based on the value of OCD AXS register. Please refer to MCU datasheet section Nexus OCD AUX port connections. Atmel AVR32844 32170A-AVR-08/11 Atmel AVR32844 6 Capacitive touch (CAT) module 6.1 QTouch Figure 6-1. QTouch typical connection. Table 6.1 QTouch pin selection guide. CAT module PIN name PIN name (5) QTouch method pin name CSA0 PA13 SNS0 CSB0 PA18 SNSK0 CSA1 PA01 SNS1 CSB1 PA06 SNSK1 CSA2 PA00 SNS2 CSB2 PA07 SNSK2 CSA3 PA02 SNS3 CSB3 PA03 SNSK3 CSA4 CSB4 CSA5 (1) SNS4 (2) SNSK4 (3) SNS5 PA08 PA09 PA10 (4) CSB5 PA12 SNSK5 CSA6 PA14 SNS6 CSB6 PA15 SNSK6 CSA7 PA04 SNS7 CSB7 PA05 SNSK7 CSA8 PA16 SNS8 CSB8 PA17 SNSK8 CSA9 PB00 SNS9 CSB9 PB01 SNSK9 CSA10 PA19 SNS10 CSB10 PA22 SNSK10 CSA11 PB03 SNS11 13 32170A-AVR-08/11 CAT module PIN name PIN name QTouch method pin name CSB11 PB02 SNSK11 (6) CSA12 PA20 SNS12 CSB12 PB08 SNSK12 CSA13 PB07 SNS13 CSB13 PB06 SNSK13 CSA14 PB04 SNS14 CSB14 PB05 SNSK14 CSA15 PB12 SNS15 CSB15 PB09 SNSK15 CSA16 PB11 SNS16 CSB16 PB10 SNSK16 Notes: 1. This pin has an alternate function of XIN0 2. This pin has an alternate function of XOUT0 3. This pin has an alternate function of XIN32 4. This pin has an alternate function of XOUT32 5. This pin has an alternate function of XIN32_2 6. This pin has an alternate function of XOUT32_2 6.2 QMatrix There are three different ways of connecting QMatrix to the CAT module 1. Internal current sources disabled. 2. Internal current sources enabled with DICS.INTREFSEL= 0. 3. Internal current sources enabled with DICS.INTREFSEL= 1. In all the three modes, Ra=10kohm, Rb=50ohm are recommended values. These two resistors should only be needed in some specialized applications (touch screens) where the sense capacitors are charged to low voltages (15 to 20mV). In this case, we need to insure that the comparator threshold is 0 or slightly positive. In a more typical QMatrix application with an array of buttons, the capacitors will be charged to 50mV or more, and then a comparator offset of -15mV is not a problem. In this case ACREFN can be grounded and it is unnecessary to use VDIVEN. 14 Atmel AVR32844 32170A-AVR-08/11 Atmel AVR32844 Figure 6-2. QMatrix example schematic for internal current sources disabled. X2 X3 X6 QMatrix Sensor Array X7 YK0 Y0 Cs0 (Sense Capacitor) YK1 Y1 Cs1 (Sense Capacitor) AVR32 Chip Rsmp1 Rsmp0 SMP VDIVEN Ra ACREFN Rb 15 32170A-AVR-08/11 Table 6-2. Some of maximum possible combination for QMatrix (internal current sources disabled). CAT module PIN name PIN name (5) QMatrix method pin name Internal current sources disabled (five different possible combination) A B C D E F X0 X1 Y0 YK0 X2 X3 Y1 YK1 X4 X5 X0 X1 Y0 YK0 X2 X3 Y1 YK1 X4 X5 Y2 YK2 X6 X7 Y3 YK3 ACREFN X9 Y4 YK4 X10 X11 Y5 YK5 X12 X13 Y6 YK6 X14 X15 Y7 YK7 X16 X17 SMP CSA0 CSB0 CSA1 CSB1 CSA2 CSB2 CSA3 CSB3 CSA4 CSB4 CSA5 CSB5 CSA6 CSB6 CSA7 CSB7 CSA8 CSB8 CSA9 CSB9 CSA10 CSB10 CSA11 CSB11 CSA12 CSB12 CSA13 CSB13 CSA14 CSB14 CSA15 CSB15 PA13 PA18 PA01 PA06 PA00 PA07 PA02 PA03 PA08(1) PA09(2) PA10(3) PA12(4) PA14 PA15 PA04 PA05 PA16 PA17 PB00 PB01 PA19 PA22 PB03 PB02 PA20(6) PB08 PB07 PB06 PB04 PB05 PB12 PB09 X0 X1 Y0 YK0 X2 X3 Y1 YK1 X4 X5 Y2 YK2 X6 X7 Y3 YK3 X8 X9 Y4 YK4 X10 X11 Y5 YK5 X12 X13 Y6 YK6 X14 X15 Y7 YK7 X0 X1 Y0 YK0 X2 X3 Y1 YK1 X4 X5 Y2 YK2 X6 X7 Y3 YK3 ACREFN SMP Y4 YK4 X10 X11 Y5 YK5 X12 X13 Y6 YK6 X14 X15 Y7 YK7 SMP X1 Y0 YK0 X2 X3 Y1 YK1 X4 X5 Y2 YK2 X6 X7 Y3 YK3 ACREFN X9 Y4 YK4 X10 X11 Y5 YK5 X12 X13 Y6 YK6 X14 X15 Y7 YK7 X0 X1 Y0 YK0 X2 X3 Y1 YK1 X4 X5 Y2 YK2 X6 X7 Y3 YK3 ACREFN X9 Y4 YK4 X10 SMP Y5 YK5 X12 X13 Y6 YK6 X14 X15 Y7 YK7 SMP X6 X7 Y3 YK3 ACREFN X9 Y4 YK4 X10 X11 Y5 YK5 X12 X13 Y6 YK6 X14 X15 Y7 YK7 X0 X1 Y0 YK0 X2 X3 Y1 YK1 X4 X5 Y2 YK2 SMP X7 Y3 YK3 ACREFN X9 Y4 YK4 X10 X11 Y5 YK5 X12 X13 Y6 YK6 X14 X15 Y7 YK7 CSA16 CSB16 PB11 PB10 PA21 X16 X17 X16 X17 X16 X17 X16 X17 X16 X17 X16 X17 Notes: 1. This pin has an alternate function of XIN0 2. This pin has an alternate function of XOUT0 3. This pin has an alternate function of XIN32 4. This pin has an alternate function of XOUT32 5. This pin has an alternate function of XIN32_2 6. This pin has an alternate function of XOUT32_2 16 Atmel AVR32844 32170A-AVR-08/11 Atmel AVR32844 Table 6-3. Some of maximum possible combination for QMatrix with SYNC and DIVEN (internal current sources disabled). Table 6.2-1 Table 6-2 “A” combination +SYNC CAT QMatrix “A” module method pin combination PIN name PIN name name I J K L M +VDIVEN CSA0 CSB0 CSA1 CSB1 CSA2 CSB2 CSA3 CSB3 CSA4 CSB4 PA13(5) PA18 PA01 PA06 PA00 PA07 PA02 PA03 PA08(1) PA09(2) X0 X1 Y0 YK0 X2 X3 Y1 YK1 X4 X5 X0 X1 Y0 YK0 X2 X3 Y1 YK1 X4 X5 X0 SYNC Y0 YK0 X2 X3 Y1 YK1 X4 X5 X0 X1 Y0 YK0 X2 X3 Y1 YK1 X4 X5 X0 X1 Y0 YK0 X2 X3 Y1 YK1 X4 X5 X0 X1 Y0 YK0 X2 X3 Y1 YK1 X4 X5 X0 X1 Y0 YK0 X2 X3 Y1 YK1 X4 X5 CSA5 CSB5 CSA6 CSB6 CSA7 CSB7 CSA8 CSB8 CSA9 CSB9 CSA10 CSB10 CSA11 PA10 PA12(4) PA14 PA15 PA04 PA05 PA16 PA17 PB00 PB01 PA19 PA22 PB03 (3) Y2 YK2 X6 X7 Y3 YK3 X8 X9 Y4 YK4 X10 X11 Y5 Y2 YK2 X6 SYNC Y3 YK3 ACREFN SMP Y4 YK4 X10 X11 Y5 Y2 YK2 X6 X7 Y3 YK3 ACREFN SMP Y4 YK4 X10 X11 Y5 Y2 YK2 X6 X7 Y3 YK3 ACREFN SMP Y4 YK4 X10 X11 Y5 Y2 YK2 X6 X7 Y3 YK3 ACREFN SMP Y4 YK4 X10 X11 Y5 Y2 YK2 X6 X7 Y3 YK3 ACREFN SMP Y4 YK4 SYNC X11 Y5 Y2 YK2 X6 X7 Y3 YK3 ACREFN SMP Y4 YK4 X10 X11 Y5 CSB11 CSA12 CSB12 CSA13 CSB13 CSA14 CSB14 CSA15 CSB15 CSA16 CSB16 PB02 PA20(6) PB08 PB07 PB06 PB04 PB05 PB12 PB09 PB11 PB10 YK5 X12 X13 Y6 YK6 X14 X15 Y7 YK7 X16 X17 YK5 X12 X13 Y6 YK6 X14 X15 Y7 YK7 X16 X17 YK5 X12 X13 Y6 YK6 X14 X15 Y7 YK7 X16 X17 YK5 X12 SYNC Y6 YK6 X14 X15 Y7 YK7 X16 X17 YK5 X12 X13 Y6 YK6 X14 X15 SYNC YK5 X12 X13 Y6 YK6 X14 X15 Y7 YK7 X16 X17 YK5 X12 X13 Y6 YK6 X14 X15 Y7 YK7 VDIVEN X17 Notes: X16 X17 1. This pin has an alternate function of XIN0 2. This pin has an alternate function of XOUT0 3. This pin has an alternate function of XIN32 4. This pin has an alternate function of XOUT32 5. This pin has an alternate function of XIN32_2 6. This pin has an alternate function of XOUT32_2 17 32170A-AVR-08/11 Figure 6-3. QMatrix example schematic for internal current sources enabled with DICS.INTREFSEL= 0 and DICS.INTEFSEL= 1. X2 X3 X6 QMatrix Sensor Array X7 YK0 Y0 Cs0 (Sense Capacitor) YK1 Y1 Cs1 (Sense Capacitor) AVR32 Chip DIS Rdis VDIVEN Ra ACREFN NOTE: If DICS.INTREFSEL= 1 then it is not required to include DIS signal and Rdis resistor in design Rb 18 Atmel AVR32844 32170A-AVR-08/11 Atmel AVR32844 Table 6-4. Some of maximum possible combination for QMatrix (internal current sources enabled) with DICS.INTREFSEL= 0 and DICS.INTREFSEL= 1. CAT module PIN name PIN name (5) QMatrix method pin name DICS.INTREFSEL= 0 DICS.INTREFSEL= 1 CSA0 CSB0 CSA1 CSB1 CSA2 CSB2 CSA3 CSB3 CSA4 CSB4 CSA5 CSB5 CSA6 CSB6 CSA7 CSB7 CSA8 CSB8 CSA9 CSB9 CSA10 CSB10 CSA11 CSB11 CSA12 CSB12 CSA13 PA13 PA18 PA01 PA06 PA00 PA07 PA02 PA03 PA08(1) PA09(2) PA10(3) PA12(4) PA14 PA15 PA04 PA05 PA16 PA17 PB00 PB01 PA19 PA22 PB03 PB02 (6) PA20 PB08 PB07 X0 X1 Y0 YK0 X2 X3 Y1 YK1 X4 X5 Y2 YK2 X6 X7 Y3 YK3 X8 X9 Y4 YK4 X10 X11 Y5 YK5 X12 X13 Y6 X0 X1 Y0 YK0 X2 X3 Y1 YK1 X4 X5 Y2 YK2 X6 X7 Y3 YK3 ACREFN DIS Y4 YK4 X10 X11 Y5 YK5 X12 X13 Y6 X0 X1 Y0 YK0 X2 X3 Y1 YK1 X4 X5 Y2 YK2 X6 X7 Y3 YK3 ACREFN X9 Y4 YK4 X10 X11 Y5 YK5 X12 X13 Y6 CSB13 CSA14 CSB14 CSA15 CSB15 CSA16 CSB16 PB06 PB04 PB05 PB12 PB09 PB11 PB10 YK6 X14 X15 Y7 YK7 X16 X17 YK6 X14 X15 Y7 YK7 X16 X17 YK6 X14 X15 Y7 YK7 X16 X17 Notes: 1. This pin has an alternate function of XIN0 2. This pin has an alternate function of XOUT0 3. This pin has an alternate function of XIN32 4. This pin has an alternate function of XOUT32 5. This pin has an alternate function of XIN32_2 6. This pin has an alternate function of XOUT32_2 19 32170A-AVR-08/11 7 Resistive touch screen Refer to "Resistive Touch Screen” of MCU data sheet for more details. 20 Atmel AVR32844 32170A-AVR-08/11 Atmel AVR32844 8 USB connection To be able to use the USB I/O, the VDDIN power supply must be 3.3V nominal. 8.1 Not used When the USB interface is not used, D+ and D- should be connected to ground. 8.2 Device mode, powered from bus connection Figure 8-1. USB in device mode, bus powered connection example schematic. Table 8-1. USB bus powered connection checklist. Signal name Recommended pin connection Description 5V tolerant I/O Directly to connector USB power measurement pin D- 39ohm series resistor Placed as close as possible to pin Negative differential data line D+ 39ohm series resistor Placed as close as possible to pin Positive differential data line 21 32170A-AVR-08/11 8.3 Device mode, self powered connection Figure 8-2. USB in device mode, self powered connection example schematic. VBUS 5V Tolerant I/O D- D39 ohm D+ D+ 39 ohm GND Table 8-2. USB self powered connection checklist. 22 Signal name Recommended pin connection Description 5V tolerant I/O Directly to connector USB power measurement pin D- 39ohm series resistor Negative differential data line Placed as close as possible to pin D+ 39ohm series resistor Positive differential data line Placed as close as possible to pin Atmel AVR32844 32170A-AVR-08/11 Atmel AVR32844 9 Miscellaneous topics 9.1 I/O line considerations The device datasheet contains subsection “I/O Line Considerations” under section “Package and Pinout”. 9.2 Boot loader pin If a pin is used to enter in the boot loader mode provided by the default bootloader programmed on all chips, that pin should be pulled-up or pulled-low depending on the chosen boot loader pin configuration. 23 32170A-AVR-08/11 10 Suggested reading 10.1 Device datasheet The device datasheet contains block diagrams of the peripherals and details about implementing firmware for the device. The datasheet is available on http://www.atmel.com/AVR32 in the Datasheets section. 0 10.2 Touch design documents Touch design documents contain the principles required for designing with buttons, sliders and wheels. They are available on, http://www.atmel.com/dyn/products/app_notes_v2.asp?family_id=697. 10.3 Hardware – QT600 Atmel QT600 is a complete touch development kit for buttons, sliders and wheels. They are available on http://www.atmel.com/dyn/products/tools_card_v2.asp?tool_id=4658. 10.4 Hardware – STK600 routing card for 48-pin AT32UC3L0 - STK600-RCUC3L0-34 Atmel STK®600-RCUC3L0-34 is the correct routing card for using with STK600. Schematic of same is available on http://www.atmel.com/dyn/resources/prod_documents/A09-0644_STK600-RCUC3L034_sch.PDF. 24 Atmel AVR32844 32170A-AVR-08/11 Atmel AVR32844 11 Table of contents Features ............................................................................................... 1 1 Introduction ...................................................................................... 1 2 Power circuit .................................................................................... 2 2.1 Single 3.3 volt power supply................................................................................ 2 2.2 Single 1.8 volt power supply................................................................................ 3 2.3 Single 3.3 volt power supply with 1.8V I/O lines ................................................. 4 2.4 ADC reference power supply .............................................................................. 5 3 Reset circuit ..................................................................................... 6 4 Clocks and crystal oscillators ........................................................ 7 4.1 External clock source .......................................................................................... 7 4.2 Crystal oscillator .................................................................................................. 7 4.3 32kHz crystal oscillator........................................................................................ 8 5 JTAG and Nexus debug ports......................................................... 9 5.1 aWire port interface ............................................................................................. 9 5.2 JTAG port interface ........................................................................................... 10 5.3 Nexus port interface .......................................................................................... 11 6 Capacitive touch (CAT) module.................................................... 13 6.1 QTouch.............................................................................................................. 13 6.2 QMatrix .............................................................................................................. 14 7 Resistive touch screen .................................................................. 20 8 USB connection ............................................................................. 21 8.1 Not used ............................................................................................................ 21 8.2 Device mode, powered from bus connection .................................................... 21 8.3 Device mode, self powered connection ............................................................ 22 9 Miscellaneous topics ..................................................................... 23 9.1 I/O line considerations....................................................................................... 23 9.2 Boot loader pin .................................................................................................. 23 10 Suggested reading....................................................................... 24 10.1 Device datasheet............................................................................................. 24 10.2 Touch design documents ................................................................................ 24 10.3 Hardware – QT600.......................................................................................... 24 10.4 Hardware – STK600 routing card for 48-pin AT32UC3L0 - STK600-RCUC3L034............................................................................................................................. 24 11 Table of contents ......................................................................... 25 25 32170A-AVR-08/11 Atmel Corporation 2325 Orchard Parkway San Jose, CA 95131 USA Tel: (+1)(408) 441-0311 Fax: (+1)(408) 487-2600 www.atmel.com Atmel Asia Limited Unit 01-5 & 16, 19F BEA Tower, Milennium City 5 418 Kwun Tong Road Kwun Tong, Kowloon HONG KONG Tel: (+852) 2245-6100 Fax: (+852) 2722-1369 Atmel Munich GmbH Business Campus Parkring 4 D-85748 Garching b. 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