How To Migrate Code from AT89C5130-31 to AT83C5135-36 Application Note 1. Introduction This application note is a check list to assist current AT89C5130-31 users in converting existing designs to AT83C5135-36. AT83C5135 AT83C5136 This document list the mains differences between both products. Preliminary The table below lists the main differences between the products: Part Number Memory Size supply voltage AT89C5130A-L 16 Kbyte of Flash 3.0V - 3.6V Packages VQFP64 PLCC52 SO28 VQFP64 AT89C5131A-L 32 Kbyte of Flash 3.0V - 3.6V PLCC52 SO28 VQFP64 AT89C513OA-M 16 Kbyte of Flash 2.7V - 5.5V PLCC52 QFN32 VQFP64 AT89C5131A-M 32 Kbyte of Flash 2.7V - 5.5V PLCC52 QFN32 VQFP64 AT83C5135 16 Kbyte of ROM 3.0V - 3.6V QFN32 SO28 AT83EC5135 16 Kbyte of ROM 512 byte EEPROM VQFP64 3.0V - 3.6V QFN32 SO28 VQFP64 AT83C5136 32 Kbyte of ROM 3.0V - 3.6V PLCC52 SO28 AT83EC5136 32 Kbyte of ROM 512 byte EEPROM VQFP64 3.0V - 3.6V PLCC52 SO28 7666A–8051–04/07 1 2. Check List This section highlights the peripherals or features that can be used in the Flash version which must be considered. Power Supply The ROM version is 3.0V to 3.6V only. If a AT89C5131-M is used in a first stage to prototype or for first series, the output UCAP must be set to VCC (3.0V - 3.6V) to by-pass the internal regulator. EEPROM Data The ROM product can be delivered with a embedded serial EEPROM from Atmel, the AT24C04 (optional). We advise customers who desire to have ROM with EEPROM, to start their development with a flash version connected to an external EEPROM instead of the embedded one. The aim is to simplify the migration to the ROM version. The EEPROM is connected to the TWI of micro controller via standard C51 pads (internal pull-up resistors), in contrast to the Flash version which has open drain pads. If the RC associated (internal pull-up resistors and the parasitic capacitance) gives a time constant too high, this may be adjusted by adding external pull-up resistors on pins SDA and SCL. The fact that two parts have their own PFD level may generate some problems if no special attention is taken. To prevent any loss of synchronization between the micro controller and the EEPROM after an interruption in protocol, power loss or micro controller reset, we advise to add in the startup sequence of the micro controller a start sequence followed by a stop sequence on the TWI. This allows to set the memory in a standby mode. USB The EndPoint 6 with the associated 2x512-byte has been removed and cannot be used in the ROM version. The PLL filter of the USB and the serial resistor may be to adapt. Hardware Register On the ROM version, there is no way to modify the hardware register, because this register no longer exists. All bits in the Hardware Register ask when you want to use a ROM version except for the X2 bit. If the application needs to work in X2 mode, the customer must add the following instructions at the beginning of his software: CKCON |= 0x01; // to set bit X2 and activate the X2 mode 2 AT83C5131 7666A–8051–04/07 AT83C5131 Table 1. Hardware Security Byte (HSB) 7 6 5 4 3 2 1 0 X2 - OSCON1 OSCON0 - LB2 LB1 LB0 Bit Bit Number Mnemonic 7 X2 Description X2 Mode Cleared to force X2 mode (6 clocks per instruction) Set to force X1 mode, Standard Mode (Default). 6 - Reserved Oscillator Control Bits These two bits are used to control the oscillator in order to reduce consumption. OSCON1 OSCON1-0 1 1 0 0 5-4 3 - 2-0 LB2-0 OSCON0 1 0 1 0 Description The oscillator is configured to run from 0 to 32 MHz The oscillator is configured to run from 0 to 16 MHz The oscillator is configured to run from 0 to 8 MHz This configuration shouldn’t be set Reserved User Memory Lock Bits See Table 2 Table 2. Program Lock bits Program Lock Bits Security level LB0 LB1 LB2 Protection Description 1 U U U No program lock features enabled. 2 P U U MOVC instruction executed from external program memory is disabled from fetching code bytes from any internal memory, EA is sampled and latched on reset, and further parallel programming of the Flash and of the EEPROM (boot and Xdata) is disabled. ISP and software programming with API are still allowed. 3 X P U Same as 2, also verify through parallel programming interface is disabled and serial programming ISP is still allowed. 4 X X P Same as 3, also external execution is disabled. Bootloader There is no more Bootloader in the ROM version. The customer must add in his software the protocol and access routine to keep a way to configure the EEPROM Data. 3 7666A–8051–04/07 Atmel Corporation 2325 Orchard Parkway San Jose, CA 95131 Tel: 1(408) 441-0311 Fax: 1(408) 487-2600 Regional Headquarters Europe Atmel Sarl Route des Arsenaux 41 Case Postale 80 CH-1705 Fribourg Switzerland Tel: (41) 26-426-5555 Fax: (41) 26-426-5500 Asia Room 1219 Chinachem Golden Plaza 77 Mody Road Tsimshatsui East Kowloon Hong Kong Tel: (852) 2721-9778 Fax: (852) 2722-1369 Japan 9F, Tonetsu Shinkawa Bldg. 1-24-8 Shinkawa Chuo-ku, Tokyo 104-0033 Japan Tel: (81) 3-3523-3551 Fax: (81) 3-3523-7581 Atmel Operations Memory 2325 Orchard Parkway San Jose, CA 95131 Tel: 1(408) 441-0311 Fax: 1(408) 436-4314 Microcontrollers 2325 Orchard Parkway San Jose, CA 95131 Tel: 1(408) 441-0311 Fax: 1(408) 436-4314 La Chantrerie BP 70602 44306 Nantes Cedex 3, France Tel: (33) 2-40-18-18-18 Fax: (33) 2-40-18-19-60 ASIC/ASSP/Smart Cards Zone Industrielle 13106 Rousset Cedex, France Tel: (33) 4-42-53-60-00 Fax: (33) 4-42-53-60-01 RF/Automotive Theresienstrasse 2 Postfach 3535 74025 Heilbronn, Germany Tel: (49) 71-31-67-0 Fax: (49) 71-31-67-2340 1150 East Cheyenne Mtn. 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