24C01C DATA SHEET (04/02/2012) DOWNLOAD

24C01C
1K 5.0V I2C™ Serial EEPROM
Features:
Description:
• Single Supply with Operation from 4.5V to 5.5V
• Low-Power CMOS Technology:
- Read current 1 mA, max.
- Standby current 5 A, max.
• 2-Wire Serial Interface, I2C™ Compatible
• Cascadable up to Eight Devices
• Schmitt Trigger Inputs for Noise Suppression
• Output Slope Control to Eliminate Ground Bounce
• 100 kHz and 400 kHz Clock Compatibility
• Page Write Time 1 ms max.
• Self-Timed Erase/Write Cycle
• 16-Byte Page Write Buffer
• ESD Protection >4000V
• More than 1 Million Erase/Write Cycles
• Data Retention >200 Years
• Factory Programming Available
• Packages include 8-lead PDIP, SOIC, TSSOP,
DFN, TDFN, MSOP and 6-lead SOT-23
• Pb-Free and RoHS Compliant
• Temperature Ranges:
- Industrial (I):
-40C to +85C
- Automotive (E):
-40C to +125C
The Microchip Technology Inc. 24C01C is a 1K bit
Serial Electrically Erasable PROM with a voltage range
of 4.5V to 5.5V. The device is organized as a single
block of 128 x 8-bit memory with a 2-wire serial
interface. Low-current design permits operation with
max. standby and active currents of only 5 A and 1
mA, respectively. The device has a page write capability for up to 16 bytes of data and has fast write cycle
times of only 1 ms for both byte and page writes. Functional address lines allow the connection of up to eight
24C01C devices on the same bus for up to 8K bits of
contiguous EEPROM memory. The device is available
in the standard 8-pin PDIP, 8-pin SOIC (3.90 mm),
8-pin 2x3 DFN and TDFN, 8-pin MSOP and TSSOP
packages. The 24C01C is also available in the 6-lead
SOT-23 package.
Block Diagram
A0 A1 A2
HV Generator
I/O
Control
Logic
Memory
Control
Logic
EEPROM
XDEC
Array
SDA SCL
VCC
YDEC
VSS
Sense Amp.
R/W Control
Package Types
PDIP, MSOP
DFN/TDFN
SOIC, TSSOP
A0
1
8
VCC
A1
2
7
A2
3
VSS
4
A0
1
8
VCC
Test
A1
2
7
Test
6
SCL
A2
3
6
SCL
5
SDA
VSS
4
5
SDA
 1997-2012 Microchip Technology Inc.
A0 1
A1 2
A2 3
VSS 4
8 VCC
7 Test
6 SCL
5 SDA
SOT-23
SCL
1
6
VCC
VSS
2
5
A0
SDA
3
4
A1
DS21201K-page 1
24C01C
1.0
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings(†)
VCC .............................................................................................................................................................................7.0V
All inputs and outputs w.r.t. VSS ......................................................................................................... -0.6V to VCC +1.0V
Storage temperature ...............................................................................................................................-65°C to +150°C
Ambient temperature with power applied ................................................................................................-40°C to +125°C
ESD protection on all pins  4 kV
† NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the
device. This is a stress rating only and functional operation of the device at these or any other conditions above those
indicated in the operational listings of this specification is not implied. Exposure to Absolute Maximum Rating
conditions for extended periods may affect device reliability.
TABLE 1-1:
DC CHARACTERISTICS
DC CHARACTERISTICS
Param.
No.
Sym.
Characteristic
Electrical Characteristics:
Industrial (I):
VCC = +4.5V to 5.5V
Automotive (E): VCC = +4.5V to 5.5V
Min.
Max.
Units
TA = -40°C to +85°C
TA = -40°C to +125°C
Conditions
D1
—
A0, A1, A2, SCL, SDA
and WP pins:
—
—
—
—
D2
VIH
High-level input voltage
0.7 VCC
—
V
—
D3
VIL
Low-level input voltage
—
0.3 VCC
V
—
D4
VHYS
Hysteresis of Schmitt
Trigger inputs
(SDA, SCL pins)
0.05 VCC
—
V
(Note)
D5
VOL
Low-level output voltage
—
0.40
V
IOL = 3.0 mA @ VCC = 4.5V
D6
ILI
Input leakage current
—
±1
A
VIN = VSS or VCC, WP = VSS
D7
ILO
Output leakage current
—
±1
A
VOUT = VSS or VCC
D8
CIN,
COUT
Pin capacitance
(all inputs/outputs)
—
10
pF
VCC = 5.0V (Note)
TA = 25°C, f = 1 MHz
D9
ICC Read Operating current
—
1
mA
VCC = 5.5V, SCL = 400 kHz
—
3
mA
VCC = 5.5V
D10
ICCS
—
5
A
VCC = 5.5V, SDA = SCL = VCC
WP = VSS
ICC Write
Note:
Standby current
This parameter is periodically sampled and not 100% tested.
DS21201K-page 2
 1997-2012 Microchip Technology Inc.
24C01C
TABLE 1-2:
AC CHARACTERISTICS
Electrical Characteristics:
Industrial (I):
VCC = +4.5V to 5.5V
Automotive (E): VCC = +4.5V to 5.5V
AC CHARACTERISTICS
Param.
No.
Sym.
Characteristic
Min.
Max.
Units
Conditions
1
FCLK
Clock frequency
—
—
100
400
kHz
—
(I-temp)
2
THIGH
Clock high time
4000
600
—
—
ns
—
(I-temp)
3
TLOW
Clock low time
4700
1300
—
—
ns
—
(I-temp)
4
TR
SDA and SCL rise time
(Note 1)
—
—
1000
300
ns
—
(I-temp)
5
TF
SDA and SCL fall time
(Note 1)
—
300
ns
—
6
THD:STA Start condition hold time
4000
600
—
—
ns
—
(I-temp)
7
TSU:STA Start condition setup time
4700
600
—
—
ns
—
(I-temp)
8
THD:DAT Data input hold time
0
—
ns
(Note 2)
9
TSU:DAT Data input setup time
250
100
—
—
ns
—
(I-temp)
10
TSU:STO Stop condition setup time
4000
600
—
—
ns
—
(I-temp)
11
TAA
Output valid from clock
(Note 2)
—
—
3500
900
ns
—
(I-temp)
12
TBUF
Bus free time: Time the bus
must be free before a new
transmission can start
4700
1300
—
—
ns
—
(I-temp)
13
TOF
Output fall time from VIH
minimum to VIL maximum
CB  100 pF
10 + 0.1CB
250
ns
(Note 1)
14
TSP
Input filter spike suppression
(SDA and SCL pins)
—
50
ns
(Note 3)
15
TWC
Write cycle time (byte or
page)
—
1.5
1
ms
—
(I-temp)
16
—
Endurance
1,000,000
—
Note 1:
2:
3:
4:
TA = -40°C to +85°C
TA = -40°C to +125°C
cycles 25°C (Note 4)
Not 100% tested. CB = total capacitance of one bus line in pF.
As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region
(minimum 300 ns) of the falling edge of SCL to avoid unintended generation of Start or Stop conditions.
The combined TSP and VHYS specifications are due to new Schmitt Trigger inputs, which provide improved
noise spike suppression. This eliminates the need for a TI specification for standard operation.
This parameter is not tested but ensured by characterization. For endurance estimates in a specific
application, please consult the Total Endurance™ Model, which can be obtained from Microchip’s web site
at www.microchip.com.
 1997-2012 Microchip Technology Inc.
DS21201K-page 3
24C01C
FIGURE 1-1:
BUS TIMING DATA
5
SCL
7
SDA
IN
D4
2
3
8
9
4
10
6
14
11
12
SDA
OUT
DS21201K-page 4
 1997-2012 Microchip Technology Inc.
24C01C
2.0
PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 2-1.
TABLE 2-1:
PIN FUNCTION TABLE
8-pin
PDIP
8-pin
SOIC
8-pin
TSSOP
8-pin
MSOP
8-pin
DFN/TDFN
SOT-23
A0
1
1
1
1
1
5
Chip Select
A1
2
2
2
2
2
4
Chip Select
Name
Function
A2
3
3
3
3
3
—
Chip Select
VSS
4
4
4
4
4
2
Ground
SDA
5
5
5
5
5
3
Serial Data
SCL
6
6
6
6
6
1
Serial Clock
Test
7
7
7
7
7
—
Test
VCC
8
8
8
8
8
6
+4.5V to 5.5V Power Supply
2.1
SDA Serial Data
This is a bidirectional pin used to transfer addresses
and data into and data out of the device. It is an open
drain terminal; therefore, the SDA bus requires a pullup resistor to VCC (typical 10 k for 100 kHz, 2 k for
400 kHz).
For normal data transfer SDA is allowed to change only
during SCL low. Changes during SCL high are
reserved for indicating the Start and Stop conditions.
2.2
2.5
Noise Protection
The 24C01C employs a VCC threshold detector circuit
which disables the internal erase/write logic if the VCC
is below 3.8 volts at nominal conditions.
The SCL and SDA inputs have Schmitt Trigger and
filter circuits which suppress noise spikes to assure
proper device operation even on a noisy bus.
SCL Serial Clock
This input is used to synchronize the data transfer from
and to the device.
2.3
A0, A1, A2
The levels on these inputs are compared with the
corresponding bits in the slave address. The chip is
selected if the compare is true.
Up to eight 24C01C devices may be connected to the
same bus by using different Chip Select bit combinations. These inputs must be connected to either VCC or
VSS.
For the SOT-23 devices up to four devices may be connected to the same bus using different Chip Select bit
combinations.
In most applications, the chip address inputs A0, A1
and A2 are hard-wired to logic ‘0’ or logic ‘1’. For
applications in which these pins are controlled by a
microcontroller or other programmable device, the chip
address pins must be driven to logic ‘0’ or logic ‘1’
before normal device operation can proceed.
2.4
Test
This pin is utilized for testing purposes only. It may be
tied high, tied low or left floating.
 1997-2012 Microchip Technology Inc.
DS21201K-page 5
24C01C
3.0
FUNCTIONAL DESCRIPTION
The 24C01C supports a bidirectional 2-wire bus and
data transmission protocol. A device that sends data
onto the bus is defined as transmitter, and a device
receiving data as receiver. The bus has to be controlled
by a master device that generates the Serial Clock
(SCL), controls the bus access, and generates the Start
and Stop conditions, while the 24C01C works as slave.
Both master and slave can operate as transmitter or
receiver, but the master device determines which mode
is activated.
4.0
BUS CHARACTERISTICS
The following bus protocol has been defined:
• Data transfer may be initiated only when the bus
is not busy.
• During data transfer, the data line must remain
stable whenever the clock line is high. Changes in
the data line while the clock line is high will be
interpreted as a Start or Stop condition.
Accordingly, the following bus conditions have been
defined (Figure 4-1).
4.1
Bus Not Busy (A)
Both data and clock lines remain high.
4.2
Start Data Transfer (B)
A high-to-low transition of the SDA line while the clock
(SCL) is high determines a Start condition. All
commands must be preceded by a Start condition.
4.3
Stop Data Transfer (C)
4.4
Data Valid (D)
The state of the data line represents valid data when,
after a Start condition, the data line is stable for the
duration of the high period of the clock signal.
The data on the line must be changed during the low
period of the clock signal. There is one bit of data per
clock pulse.
Each data transfer is initiated with a Start condition and
terminated with a Stop condition. The number of the
data bytes transferred between the Start and Stop
conditions is determined by the master device and is
theoretically unlimited, although only the last sixteen
will be stored when doing a write operation. When an
overwrite does occur it will replace data in a first-in firstout fashion.
4.5
Acknowledge
Each receiving device, when addressed, is required to
generate an acknowledge after the reception of each
byte. The master device must generate an extra clock
pulse, which is associated with this Acknowledge bit.
Note:
The 24C01C does not generate any
Acknowledge bits if an internal programming cycle is in progress.
The device that acknowledges has to pull down the
SDA line during the Acknowledge clock pulse in such a
way that the SDA line is stable low during the high
period of the acknowledge related clock pulse. Of
course, setup and hold times must be taken into
account. A master must signal an end of data to the
slave by not generating an Acknowledge bit on the last
byte that has been clocked out of the slave. In this case,
the slave must leave the data line high to enable the
master to generate the Stop condition (Figure 4-2)
A low-to-high transition of the SDA line while the clock
(SCL) is high determines a Stop condition. All
operations must be ended with a Stop condition.
DS21201K-page 6
 1997-2012 Microchip Technology Inc.
24C01C
FIGURE 4-1:
SCL
(A)
DATA TRANSFER SEQUENCE ON THE SERIAL BUS
(B)
(C)
(D)
Start
Condition
Address or
Acknowledge
Valid
(C)
(A)
SDA
FIGURE 4-2:
Stop
Condition
Data
Allowed
to Change
ACKNOWLEDGE TIMING
Acknowledge
Bit
SCL
SDA
1
2
3
4
5
6
7
Data from transmitter
Transmitter must release the SDA line at this point
allowing the Receiver to pull the SDA line low to
acknowledge the previous eight bits of data.
 1997-2012 Microchip Technology Inc.
8
9
1
2
3
Data from transmitter
Receiver must release the SDA line at this
point so the Transmitter can continue sending data.
DS21201K-page 7
24C01C
5.0
DEVICE ADDRESSING
A control byte is the first byte received following the
Start condition from the master device (Figure 5-1).
The control byte consists of a four-bit control code; for
the 24C01C this is set as ‘1010’ binary for read and
write operations. The next three bits of the control byte
are the Chip Select bits (A2, A1, A0). The Chip Select
bits allow the use of up to eight 24C01C devices on the
same bus and are used to select which device is
accessed. The Chip Select bits in the control byte must
correspond to the logic levels on the corresponding A2,
A1 and A0 pins for the device to respond. These bits
are in effect the three Most Significant bits of the word
address.
For the SOT-23 package, the A2 address pin is not
available. During device addressing, the A2 Chip
Select bit should be set to ‘0’.
The last bit of the control byte defines the operation to
be performed. When set to a ‘1’ a read operation is
selected, and when set to a ‘0’ a write operation is
selected. Following the Start condition, the 24C01C
monitors the SDA bus checking the control byte being
transmitted. Upon receiving a ‘1010’ code and appropriate Chip Select bits, the slave device outputs an
Acknowledge signal on the SDA line. Depending on the
state of the R/W bit, the 24C01C will select a read or
write operation.
DS21201K-page 8
FIGURE 5-1:
CONTROL BYTE
FORMAT
Read/Write Bit
Chip Select
Bits
Control Code
S
1
0
1
0
A2
A1 A0 R/W ACK
Slave Address
Start Bit
5.1
Acknowledge Bit
Contiguous Addressing Across
Multiple Devices
The Chip Select bits A2, A1, A0 can be used to expand
the contiguous address space for up to 8K bits by
adding up to eight 24C01C devices on the same bus.
In this case, software can use A0 of the control byte as
address bit A8, A1 as address bit A9, and A2 as
address bit A10. It is not possible to sequentially read
across device boundaries.
For the SOT-23 package, up to four 24C01C devices
can be added for up to 4K bits of address space. In this
case, software can use A0 of the control byte as
address bit A8, and A1 as address bit A9. It is not possible to sequentially read across device boundaries.
 1997-2012 Microchip Technology Inc.
24C01C
6.0
WRITE OPERATIONS
6.1
Byte Write
After the receipt of each word, the four lower order
Address Pointer bits are internally incremented by one.
The higher order four bits of the word address remains
constant. If the master should transmit more than 16
bytes prior to generating the Stop condition, the
address counter will roll over and the previously
received data will be overwritten. As with the byte write
operation, once the Stop condition is received an
internal write cycle will begin (Figure 6-2).
Following the Start signal from the master, the device
code (4 bits), the Chip Select bits (3 bits), and the R/W
bit, which is a logic low, is placed onto the bus by the
master transmitter. The device will acknowledge this
control byte during the ninth clock pulse. The next byte
transmitted by the master is the word address and will
be written into the Address Pointer of the 24C01C.
After receiving another Acknowledge signal from the
24C01C the master device will transmit the data word
to be written into the addressed memory location. The
24C01C acknowledges again and the master generates a Stop condition. This initiates the internal write
cycle, and during this time the 24C01C will not
generate Acknowledge signals (Figure 6-1).
6.2
Note:
Page Write
The write control byte, word address and the first data
byte are transmitted to the 24C01C in the same way as
in a byte write. But instead of generating a Stop
condition, the master transmits up to 15 additional data
bytes to the 24C01C which are temporarily stored in
the on-chip page buffer and will be written into the
memory after the master has transmitted a Stop
condition.
FIGURE 6-1:
Page write operations are limited to writing bytes within a single physical page,
regardless of the number of bytes actually being written. Physical page boundaries start at addresses that are integer
multiples of the page buffer size (or ‘page
size’) and end at addresses that are
integer multiples of [page size – 1]. If a
Page Write command attempts to write
across a physical page boundary, the
result is that the data wraps around to the
beginning of the current page (overwriting
data previously stored there), instead of
being written to the next page as might be
expected. It is therefore necessary for the
application software to prevent page write
operations that would attempt to cross a
page boundary.
BYTE WRITE
Bus Activity
Master
S
T
A
R
T
SDA Line
S
Control
Byte
Word
Address
S
T
O
P
Data
P
A
C
K
Bus Activity
FIGURE 6-2:
A
C
K
A
C
K
PAGE WRITE
Bus Activity
Master
S
T
A
R
T
SDA Line
S
Control
Byte
Bus Activity
 1997-2012 Microchip Technology Inc.
Word
Address (n)
Data n
S
T
O
P
Data n + 15
Data n +1
P
A
C
K
A
C
K
A
C
K
A
C
K
A
C
K
DS21201K-page 9
24C01C
7.0
ACKNOWLEDGE POLLING
Since the device will not acknowledge during a write
cycle, this can be used to determine when the cycle is
complete (this feature can be used to maximize bus
throughput). Once the Stop condition for a Write
command has been issued from the master, the device
initiates the internally timed write cycle. ACK polling
can be initiated immediately. This involves the master
sending a Start condition followed by the control byte
for a Write command (R/W = 0). If the device is still
busy with the write cycle, then no ACK will be returned.
If no ACK is returned, then the Start bit and control byte
must be re-sent. If the cycle is complete, then the
device will return the ACK and the master can then
proceed with the next Read or Write command. See
Figure 7-1 for flow diagram.
FIGURE 7-1:
ACKNOWLEDGE
POLLING FLOW
Send
Write Command
Send Stop
Condition to
Initiate Write Cycle
Send Start
Send Control Byte
with R/W = 0
Did Device
Acknowledge
(ACK = 0)?
NO
YES
Next
Operation
DS21201K-page 10
 1997-2012 Microchip Technology Inc.
24C01C
8.0
READ OPERATION
8.2
Random read operations allow the master to access
any memory location in a random manner. To perform
this type of read operation, first the word address must
be set. This is done by sending the word address to the
24C01C as part of a write operation.
Read operations are initiated in the same way as write
operations with the exception that the R/W bit of the
slave address is set to one. There are three basic types
of read operations: current address read, random read
and sequential read.
8.1
After the word address is sent, the master generates a
Start condition following the acknowledge. This
terminates the write operation, but not before the
internal Address Pointer is set. Then the master issues
the control byte again but with the R/W bit set to a one.
The 24C01C will then issue an acknowledge and transmits the eight bit data word. The master will not
acknowledge the transfer, but does generate a Stop
condition and the 24C01C discontinues transmission
(Figure 8-2). After this command, the internal address
counter will point to the address location following the
one that was just read.
Current Address Read
The 24C01C contains an address counter that maintains the address of the last word accessed, internally
incremented by one. Therefore, if the previous read
access was to address n, the next current address read
operation would access data from address n + 1. Upon
receipt of the slave address with the R/W bit set to one,
the 24C01C issues an acknowledge and transmits the
eight-bit data word. The master will not acknowledge
the transfer, but does generate a Stop condition and the
24C01C discontinues transmission (Figure 8-1).
FIGURE 8-1:
S
T
A
R
T
SDA Line
S
Control
Byte
P
Bus Activity
FIGURE 8-2:
To provide sequential reads the 24C01C contains an
internal Address Pointer which is incremented by one
at the completion of each operation. This Address
Pointer allows the entire memory contents to be serially
read during one operation. The internal Address
Pointer will automatically roll over from address 7F to
address 00.
N
O
A
C
K
RANDOM READ
Bus Activity
Master
S
T
A
R
T
Control
Byte
S
T
A
R
T
Word
Address (n)
S
SDA Line
Control
Byte
S
T
O
P
Data (n)
P
S
A
C
K
A
C
K
Bus Activity
Bus Activity
Master
Sequential Read
Sequential reads are initiated in the same way as a
random read except that after the 24C01C transmits
the first data byte, the master issues an acknowledge
as opposed to a Stop condition in a random read. This
directs the 24C01C to transmit the next sequentially
addressed 8-bit word (Figure 8-3).
S
T
O
P
Data
A
C
K
FIGURE 8-3:
8.3
CURRENT ADDRESS
READ
Bus Activity
Master
Random Read
A
C
K
N
O
A
C
K
SEQUENTIAL READ
Control
Byte
Data n
Data n + 1
Data n + 2
S
T
O
P
Data n + X
P
SDA Line
Bus Activity
A
C
K
 1997-2012 Microchip Technology Inc.
A
C
K
A
C
K
A
C
K
N
O
A
C
K
DS21201K-page 11
24C01C
9.0
PACKAGING INFORMATION
9.1
Package Marking Information
8-Lead PDIP (300 mil)
XXXXXXXX
T/XXXNNN
YYWW
8-Lead SOIC (3.90 mm)
XXXXXXXT
XXXXYYWW
NNN
8-Lead TSSOP
Example:
24C01CI
SN e3 0527
13F
Example:
4C1C
TYWW
I527
NNN
13F
XXXXT
YWWNNN
8-Lead 2x3 DFN
XXX
YWW
NN
8-Lead 2x3 TDFN
DS21201K-page 12
24C01C
I/P e3 13F
0527
XXXX
8-Lead MSOP
XXX
YWW
NN
Example:
Example:
4C1CI
52713F
Example:
2N7
527
13
Example:
AN7
527
13
 1997-2012 Microchip Technology Inc.
24C01C
1st Line Marking Codes
Part Number
24C01C
Note:
TSSOP
MSOP
4C1C
4C1CT
DFN
TDFN
SOT-23
I Temp.
E Temp.
I Temp.
E Temp.
I Temp.
E Temp.
2N7
2N8
AN7
AN8
HANN
HBNN
T = Temperature grade (I, E)
6-Lead SOT-23
HAEC
XXNN
Legend: XX...X
T
Y
YY
WW
NNN
e3
Note:
Example:
Part number or part number code
Temperature (I, E)
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code (2 characters for small packages)
Pb-free JEDEC designator for Matte Tin (Sn)
Note:
For very small packages with no room for the Pb-free JEDEC designator
e3 , the marking will only appear on the outer carton or reel label.
Note:
In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
Please visit www.microchip.com/Pbfree for the latest information on Pb-free conversion.
*Standard OTP marking consists of Microchip part number, year code, week code, and traceability code.
 1997-2012 Microchip Technology Inc.
DS21201K-page 13
24C01C
3
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DS21201K-page 14
 1997-2012 Microchip Technology Inc.
24C01C
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
 1997-2012 Microchip Technology Inc.
DS21201K-page 15
24C01C
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
DS21201K-page 16
 1997-2012 Microchip Technology Inc.
24C01C
!
""#$%& !'
3
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 1997-2012 Microchip Technology Inc.
DS21201K-page 17
24C01C
() )"* !
(+%+(
!
3
&'
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4%&
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D
N
E
E1
NOTE 1
1
2
b
e
c
A
φ
A2
A1
L
L1
6&!
'!
9'&!
7"')
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99..
7
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9
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=
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=
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DS21201K-page 18
 1997-2012 Microchip Technology Inc.
24C01C
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
 1997-2012 Microchip Technology Inc.
DS21201K-page 19
24C01C
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
DS21201K-page 20
 1997-2012 Microchip Technology Inc.
24C01C
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
 1997-2012 Microchip Technology Inc.
DS21201K-page 21
24C01C
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
DS21201K-page 22
 1997-2012 Microchip Technology Inc.
24C01C
,
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3
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e
D
b
N
N
L
K
E2
E
EXPOSED PAD
NOTE 1
NOTE 1
2
1
2
1
D2
BOTTOM VIEW
TOP VIEW
A
A3
A1
NOTE 2
6&!
'!
9'&!
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7
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7:
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 1997-2012 Microchip Technology Inc.
DS21201K-page 23
24C01C
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
DS21201K-page 24
 1997-2012 Microchip Technology Inc.
24C01C
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
 1997-2012 Microchip Technology Inc.
DS21201K-page 25
24C01C
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
DS21201K-page 26
 1997-2012 Microchip Technology Inc.
24C01C
,
$*-./00%12(,
3
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 1997-2012 Microchip Technology Inc.
DS21201K-page 27
24C01C
3
!
(""!( !(/
3
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&&255***'
'54
b
4
N
E
E1
PIN 1 ID BY
LASER MARK
1
2
3
e
e1
D
A
A2
c
φ
L
A1
L1
6&!
'!
9'&!
7"')
%!
99..
7
7
7:
;
?
&
1,
:"&!#9#&
1,
: 8&
=
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<
=
-
&#
%%
=
: >#&
.
=
-
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.
-
=
<
: 9&
=
-
3
&9&
9
=
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3
&&
9
-
=
<
3
&
R
=
-R
9#4!!
<
=
?
9#>#&
)
=
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!#.#
&"#'
#%!
&"!
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&"!
!!
&$#''!#
'!
#&
.0
1,2 1!'!
&$& "!
**&
"&&
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* ,<1
DS21201K-page 28
 1997-2012 Microchip Technology Inc.
24C01C
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
 1997-2012 Microchip Technology Inc.
DS21201K-page 29
24C01C
APPENDIX A:
REVISION HISTORY
Revision A (06/1997)
Initial release.
Revision B (07/1998)
Revision C (08/1999)
Revision D (12/2003)
Corrections to Section 1.0, Electrical Characteristics.
Revision E (04/2005)
Added DFN package.
Revision F (01/2007)
Revised Features Section; Deleted Commercial Temp;
Replaced Package Drawings; Replaced On-Line
Support page; Revised Product ID System.
Revision G (03/2007)
Replaced Package Drawings (Rev. AM).
Revision H (04/2008)
Replaced Package Drawings; Added TDFN package;
Revised Product ID section.
Revision J (08/2008)
Updated Features Section; Added Table 2-1 Pin
Function Table; Corrections to Table 1-1, DC Characteristics; Updated Table 1-2, AC Characteristics;
Updated Package Drawings.
Revision K (03/2012)
Add 6-Lead SOT-23 Package
DS21201K-page 30
 1997-2012 Microchip Technology Inc.
24C01C
THE MICROCHIP WEB SITE
CUSTOMER SUPPORT
Microchip provides online support via our WWW site at
www.microchip.com. This web site is used as a means
to make files and information easily available to
customers. Accessible by using your favorite Internet
browser, the web site contains the following
information:
Users of Microchip products can receive assistance
through several channels:
• Product Support – Data sheets and errata,
application notes and sample programs, design
resources, user’s guides and hardware support
documents, latest software releases and archived
software
• General Technical Support – Frequently Asked
Questions (FAQ), technical support requests,
online discussion groups, Microchip consultant
program member listing
• Business of Microchip – Product selector and
ordering guides, latest Microchip press releases,
listing of seminars and events, listings of
Microchip sales offices, distributors and factory
representatives
•
•
•
•
•
Distributor or Representative
Local Sales Office
Field Application Engineer (FAE)
Technical Support
Development Systems Information Line
Customers
should
contact
their
distributor,
representative or field application engineer (FAE) for
support. Local sales offices are also available to help
customers. A listing of sales offices and locations is
included in the back of this document.
Technical support is available through the web site
at: http://microchip.com/support
CUSTOMER CHANGE NOTIFICATION
SERVICE
Microchip’s customer notification service helps keep
customers current on Microchip products. Subscribers
will receive e-mail notification whenever there are
changes, updates, revisions or errata related to a
specified product family or development tool of interest.
To register, access the Microchip web site at
www.microchip.com. Under “Support”, click on
“Customer Change Notification” and follow the
registration instructions.
 1997-2012 Microchip Technology Inc.
DS21201K-page 31
24C01C
READER RESPONSE
It is our intention to provide you with the best documentation possible to ensure successful use of your Microchip
product. If you wish to provide your comments on organization, clarity, subject matter, and ways in which our
documentation can better serve you, please FAX your comments to the Technical Publications Manager at
(480) 792-4150.
Please list the following information, and use this outline to provide us with your comments about this document.
TO:
Technical Publications Manager
RE:
Reader Response
Total Pages Sent ________
From: Name
Company
Address
City / State / ZIP / Country
Telephone: (_______) _________ - _________
FAX: (______) _________ - _________
Application (optional):
Would you like a reply?
Y
N
Device: 24C01C
Literature Number: DS21201K
Questions:
1. What are the best features of this document?
2. How does this document meet your hardware and software development needs?
3. Do you find the organization of this document easy to follow? If not, why?
4. What additions to the document do you think would enhance the structure and subject?
5. What deletions from the document could be made without affecting the overall usefulness?
6. Is there any incorrect or misleading information (what and where)?
7. How would you improve this document?
DS21201K-page 32
 1997-2012 Microchip Technology Inc.
24C01C
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
PART NO.
X
/XX
Device
Temperature
Range
Package
Examples:
a)
b)
Device:
24C01C: 1K I2C Serial EEPROM
24C01CT:1K I2C Serial EEPROM (Tape and Reel)
Temperature
Range:
I
E
Package:
P
=
SN
=
ST
=
OT
=
MS
=
MC
=
MNY(1)=
c)
24C01C-I/P: Industrial Temperature,
PDIP Package
24C01C-E/SN: Extended Temperature,
SOIC Package
24C01C-I/MNY: Industrial Temperature,
2x3 TDFN Package
= -40C to +85C
= -40C to +125C
Plastic DIP (300 mil body), 8-lead
Plastic SOIC, (3.90 mm body), 8-lead
Plastic TSSOP (4.4 mm body), 8-lead
Plastic SOT-23, 6-lead (Tape and Reel only)
Plastic MSOP (Micro Small Outline), 8-lead
Plastic DFN (2x3x0.90 mm body), 8-lead
Plastic TDFN (2x7x0.75 mm body), 8-lead
Note 1: “Y” indicates a Nickel, Palladium, Gold (NiPdAu) finish.
 1997-2012 Microchip Technology Inc.
DS21201K-page 33
24C01C
NOTES:
DS21201K-page 34
 1997-2012 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
•
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights.
Trademarks
The Microchip name and logo, the Microchip logo, dsPIC,
KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro, PICSTART,
PIC32 logo, rfPIC and UNI/O are registered trademarks of
Microchip Technology Incorporated in the U.S.A. and other
countries.
FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor,
MXDEV, MXLAB, SEEVAL and The Embedded Control
Solutions Company are registered trademarks of Microchip
Technology Incorporated in the U.S.A.
Analog-for-the-Digital Age, Application Maestro, chipKIT,
chipKIT logo, CodeGuard, dsPICDEM, dsPICDEM.net,
dsPICworks, dsSPEAK, ECAN, ECONOMONITOR,
FanSense, HI-TIDE, In-Circuit Serial Programming, ICSP,
Mindi, MiWi, MPASM, MPLAB Certified logo, MPLIB,
MPLINK, mTouch, Omniscient Code Generation, PICC,
PICC-18, PICDEM, PICDEM.net, PICkit, PICtail, REAL ICE,
rfLAB, Select Mode, Total Endurance, TSHARC,
UniWinDriver, WiperLock and ZENA are trademarks of
Microchip Technology Incorporated in the U.S.A. and other
countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
© 1997-2012, Microchip Technology Incorporated, Printed in
the U.S.A., All Rights Reserved.
Printed on recycled paper.
ISBN: 9781620761632
QUALITY MANAGEMENT SYSTEM
CERTIFIED BY DNV
== ISO/TS 16949 ==
 1997-2012 Microchip Technology Inc.
Microchip received ISO/TS-16949:2009 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
DS21201K-page 35
Worldwide Sales and Service
AMERICAS
ASIA/PACIFIC
ASIA/PACIFIC
EUROPE
Corporate Office
2355 West Chandler Blvd.
Chandler, AZ 85224-6199
Tel: 480-792-7200
Fax: 480-792-7277
Technical Support:
http://www.microchip.com/
support
Web Address:
www.microchip.com
Asia Pacific Office
Suites 3707-14, 37th Floor
Tower 6, The Gateway
Harbour City, Kowloon
Hong Kong
Tel: 852-2401-1200
Fax: 852-2401-3431
India - Bangalore
Tel: 91-80-3090-4444
Fax: 91-80-3090-4123
India - New Delhi
Tel: 91-11-4160-8631
Fax: 91-11-4160-8632
Austria - Wels
Tel: 43-7242-2244-39
Fax: 43-7242-2244-393
Denmark - Copenhagen
Tel: 45-4450-2828
Fax: 45-4485-2829
India - Pune
Tel: 91-20-2566-1512
Fax: 91-20-2566-1513
France - Paris
Tel: 33-1-69-53-63-20
Fax: 33-1-69-30-90-79
Japan - Osaka
Tel: 81-66-152-7160
Fax: 81-66-152-9310
Germany - Munich
Tel: 49-89-627-144-0
Fax: 49-89-627-144-44
Atlanta
Duluth, GA
Tel: 678-957-9614
Fax: 678-957-1455
Boston
Westborough, MA
Tel: 774-760-0087
Fax: 774-760-0088
Chicago
Itasca, IL
Tel: 630-285-0071
Fax: 630-285-0075
Cleveland
Independence, OH
Tel: 216-447-0464
Fax: 216-447-0643
Dallas
Addison, TX
Tel: 972-818-7423
Fax: 972-818-2924
Detroit
Farmington Hills, MI
Tel: 248-538-2250
Fax: 248-538-2260
Indianapolis
Noblesville, IN
Tel: 317-773-8323
Fax: 317-773-5453
Los Angeles
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Tel: 949-462-9523
Fax: 949-462-9608
Santa Clara
Santa Clara, CA
Tel: 408-961-6444
Fax: 408-961-6445
Toronto
Mississauga, Ontario,
Canada
Tel: 905-673-0699
Fax: 905-673-6509
Australia - Sydney
Tel: 61-2-9868-6733
Fax: 61-2-9868-6755
China - Beijing
Tel: 86-10-8569-7000
Fax: 86-10-8528-2104
China - Chengdu
Tel: 86-28-8665-5511
Fax: 86-28-8665-7889
China - Chongqing
Tel: 86-23-8980-9588
Fax: 86-23-8980-9500
Netherlands - Drunen
Tel: 31-416-690399
Fax: 31-416-690340
Korea - Daegu
Tel: 82-53-744-4301
Fax: 82-53-744-4302
Spain - Madrid
Tel: 34-91-708-08-90
Fax: 34-91-708-08-91
China - Hangzhou
Tel: 86-571-2819-3187
Fax: 86-571-2819-3189
Korea - Seoul
Tel: 82-2-554-7200
Fax: 82-2-558-5932 or
82-2-558-5934
China - Hong Kong SAR
Tel: 852-2401-1200
Fax: 852-2401-3431
Malaysia - Kuala Lumpur
Tel: 60-3-6201-9857
Fax: 60-3-6201-9859
China - Nanjing
Tel: 86-25-8473-2460
Fax: 86-25-8473-2470
Malaysia - Penang
Tel: 60-4-227-8870
Fax: 60-4-227-4068
China - Qingdao
Tel: 86-532-8502-7355
Fax: 86-532-8502-7205
Philippines - Manila
Tel: 63-2-634-9065
Fax: 63-2-634-9069
China - Shanghai
Tel: 86-21-5407-5533
Fax: 86-21-5407-5066
Singapore
Tel: 65-6334-8870
Fax: 65-6334-8850
China - Shenyang
Tel: 86-24-2334-2829
Fax: 86-24-2334-2393
Taiwan - Hsin Chu
Tel: 886-3-5778-366
Fax: 886-3-5770-955
China - Shenzhen
Tel: 86-755-8203-2660
Fax: 86-755-8203-1760
Taiwan - Kaohsiung
Tel: 886-7-536-4818
Fax: 886-7-330-9305
China - Wuhan
Tel: 86-27-5980-5300
Fax: 86-27-5980-5118
Taiwan - Taipei
Tel: 886-2-2500-6610
Fax: 886-2-2508-0102
China - Xian
Tel: 86-29-8833-7252
Fax: 86-29-8833-7256
Thailand - Bangkok
Tel: 66-2-694-1351
Fax: 66-2-694-1350
UK - Wokingham
Tel: 44-118-921-5869
Fax: 44-118-921-5820
China - Xiamen
Tel: 86-592-2388138
Fax: 86-592-2388130
China - Zhuhai
Tel: 86-756-3210040
Fax: 86-756-3210049
DS21201K-page 36
Italy - Milan
Tel: 39-0331-742611
Fax: 39-0331-466781
Japan - Yokohama
Tel: 81-45-471- 6166
Fax: 81-45-471-6122
11/29/11
 1997-2012 Microchip Technology Inc.