24AA01/24LC01B
1K I2C™ Serial EEPROM
Device Selection Table
Part
Number
VCC
Range
Max. Clock
Frequency
24AA01
1.7-5.5
400 kHz(1)
24LC01B
2.5-5.5
400 kHz
Note 1:
Description:
Temp.
Ranges
I
I, E
100 kHz for VCC <2.5V.
Features:
• Single Supply with Operation down to 1.7V for
24AAXX Devices, 2.5V for 24LCXX Devices
• Low-Power CMOS Technology:
- Read current 1 mA, max.
- Standby current 1 μA, max. (I-temp)
• 2-Wire Serial Interface, I2C™ Compatible
• Schmitt Trigger inputs for Noise Suppression
• Output Slope Control to eliminate Ground Bounce
• 100 kHz and 400 kHz Compatibility
• Page Write Time 3 ms, typical
• Hardware Write-Protect
• ESD Protection >4,000V
• More than 1 Million Erase/Write Cycles
• Data Retention >200 Years
• Factory Programmable Available
• Packages include 8-lead PDIP, SOIC, TSSOP,
DFN, TDFN, MSOP, 5-lead SOT-23 and SC-70
• Pb-free and RoHS Compliant
• Temperature Ranges:
- Industrial (I): -40°C to +85°C
- Automotive (E): -40°C to +125°C
The Microchip Technology Inc. 24AA01/24LC01B
(24XX01*) is a 1 Kbit Electrically Erasable PROM. The
device is organized as one block of 128 x 8-bit memory
with a 2-wire serial interface. Low-voltage design
permits operation down to 1.7V with standby and active
currents of only 1 μA and 1 mA, respectively. The
24XX01 also has a page write capability for up to 8
bytes of data. The 24XX01 is available in the standard
8-pin PDIP, surface mount SOIC, TSSOP, 2x3 DFN,
2x3 TDFN and MSOP packages, and is also available
in the 5-lead SOT-23 and SC-70 packages.
Package Types
SOIC, TSSOP
PDIP, MSOP
A0
1
8
VCC
A0
1
8
VCC
A1
2
7
WP
A1
2
7
WP
A2
3
6
SCL
A2
3
6
SCL
VSS
4
5
SDA VSS
4
5
SDA
SOT-23/SC-70
1
SCL
5
DFN/TDFN
WP
A0 1
A1 2
Vss
2
SDA
3
Note:
A2 3
VSS 4
4
8 VCC
7 WP
6 SCL
5 SDA
Vcc
Pins A0, A1 and A2 are not used by the 24XX01 (no
internal connections).
Block Diagram
WP
I/O
Control
Logic
Memory
Control
Logic
HV Generator
XDEC
EEPROM
Array
Page Latches
I/O
SCL
YDEC
SDA
VCC
VSS
© 2009 Microchip Technology Inc.
Sense Amp.
R/W Control
DS21711J-page 1
24AA01/24LC01B
1.0
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings (†)
VCC .............................................................................................................................................................................6.5V
All inputs and outputs w.r.t. VSS ......................................................................................................... -0.3V to VCC +1.0V
Storage temperature ...............................................................................................................................-65°C to +150°C
Ambient temperature with power applied ................................................................................................-40°C to +125°C
ESD protection on all pins ......................................................................................................................................................≥ 4 kV
† NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to
the device. This is a stress rating only and functional operation of the device at those or any other conditions
above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating
conditions for extended periods may affect device reliability.
TABLE 1-1:
DC CHARACTERISTICS
DC CHARACTERISTICS
Param.
No.
Sym.
Industrial (I):
TA = -40°C to +85°C, VCC = +1.7V to +5.5V
Automotive (E): TA = -40°C to +125°C, VCC = +2.5V to +5.5V
Characteristic
Min.
Typ.
Max.
Units
Conditions
D1
VIH
WP, SCL and SDA pins
—
—
—
—
D2
—
High-level input voltage
0.7 VCC
—
—
V
—
D3
VIL
Low-level input voltage
—
—
0.3 VCC
V
—
D4
VHYS
Hysteresis of Schmitt
Trigger inputs
0.05 VCC
—
—
V
(Note)
D5
VOL
Low-level output voltage
—
—
0.40
V
IOL = 3.0 mA, VCC = 2.5V
D6
ILI
Input leakage current
—
—
±1
μA
VIN = VSS or VCC
D7
ILO
Output leakage current
—
—
±1
μA
VOUT = VSS or VCC
D8
CIN,
COUT
Pin capacitance
(all inputs/outputs)
—
—
10
pF
VCC = 5.0V (Note)
TA = 25°C, FCLK = 1 MHz
D9
ICC write Operating current
—
0.1
3
mA
VCC = 5.5V, SCL = 400 kHz
D10
ICC
—
0.05
1
mA
—
D11
ICCS
—
—
0.01
—
1
5
μΑ
μΑ
Industrial
Automotive
SDA = SCL = VCC
WP = VSS
Note:
read
Standby current
—
This parameter is periodically sampled and not 100% tested.
DS21711J-page 2
© 2009 Microchip Technology Inc.
24AA01/24LC01B
TABLE 1-2:
AC CHARACTERISTICS
AC CHARACTERISTICS
Param.
No.
Sym.
Characteristic
Industrial (I):
TA = -40°C to +85°C, VCC = +1.7V to +5.5V
Automotive (E): TA = -40°C to +125°C, VCC = +2.5V to +5.5V
Min.
Typ.
Max.
Units
Conditions
1
FCLK
Clock frequency
—
—
—
—
400
100
kHz
2.5V ≤ VCC ≤ 5.5V
1.7V ≤ VCC < 2.5V (24AA01)
2
THIGH
Clock high time
600
4000
—
—
—
—
ns
2.5V ≤ VCC ≤ 5.5V
1.7V ≤ VCC <2.5V (24AA01)
3
TLOW
Clock low time
1300
4700
—
—
—
—
ns
2.5V ≤ VCC ≤ 5.5V
1.7V ≤ VCC < 2.5V (24AA01)
4
TR
SDA and SCL rise time
(Note 1)
—
—
—
—
300
1000
ns
2.5V ≤ VCC ≤ 5.5V
1.7V ≤ VCC < 2.5V (24AA01)
5
TF
SDA and SCL fall time
—
—
—
300
ns
(Note 1)
6
THD:STA
Start condition hold time
600
4000
—
—
—
—
ns
2.5V ≤ VCC ≤ 5.5V
1.7V ≤ VCC < 2.5V (24AA01)
7
TSU:STA
Start condition setup
time
600
4700
—
—
—
—
ns
2.5V ≤ VCC ≤ 5.5V
1.7V ≤ VCC < 2.5V (24AA01)
8
THD:DAT
Data input hold time
0
—
—
—
ns
(Note 2)
9
TSU:DAT
Data input setup time
100
250
—
—
—
—
ns
2.5V ≤ VCC ≤ 5.5V
1.7V ≤ VCC < 2.5V (24AA01)
10
TSU:STO
Stop condition setup
time
600
4000
—
—
—
—
ns
2.5V ≤ VCC ≤ 5.5V
1.7V ≤ VCC < 2.5V (24AA01)
11
TAA
Output valid from clock
(Note 2)
—
—
—
—
900
3500
ns
2.5V ≤ VCC ≤ 5.5V
1.7V ≤ VCC < 2.5V (24AA01)
12
TBUF
Bus free-time: Time the
bus must be free before
a new transmission can
start
1300
4700
—
—
—
—
ns
2.5V ≤ VCC ≤ 5.5V
1.7V ≤ VCC < 2.5V (24AA01)
13
TOF
Output fall time from VIH
minimum to VIL
maximum
20+0.1CB
—
—
—
250
250
ns
2.5V ≤ VCC ≤ 5.5V
1.7V ≤ VCC < 2.5V (24AA01)
14
TSP
Input filter spike
suppression
(SDA and SCL pins)
—
—
50
ns
(Notes 1 and 3)
15
TWC
Write cycle time
(byte or page)
—
—
5
ms
—
16
—
Endurance
1M
—
—
Note 1:
2:
3:
4:
cycles 25°C, (Note 4)
Not 100% tested. CB = total capacitance of one bus line in pF.
As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region
(minimum 300 ns) of the falling edge of SCL to avoid unintended generation of Start or Stop conditions.
The combined TSP and VHYS specifications are due to new Schmitt Trigger inputs which provide improved
noise spike suppression. This eliminates the need for a TI specification for standard operation.
This parameter is not tested but ensured by characterization. For endurance estimates in a specific
application, please consult the Total Endurance™ Model which can be obtained from Microchip’s web site
at www.microchip.com.
© 2009 Microchip Technology Inc.
DS21711J-page 3
24AA01/24LC01B
FIGURE 1-1:
BUS TIMING DATA
5
4
2
3
SCL
7
SDA
IN
8
10
9
6
14
12
11
SDA
OUT
FIGURE 1-2:
BUS TIMING START/STOP
D4
SCL
6
7
10
SDA
Start
DS21711J-page 4
Stop
© 2009 Microchip Technology Inc.
24AA01/24LC01B
2.0
PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 2-1.
TABLE 2-1:
PIN FUNCTION TABLE
Name
PDIP
SOIC
TSSOP
DFN
TDFN
MSOP
SOT23
SC-70
Description
A0
1
1
1
1
1
1
—
—
Not Connected
A1
2
2
2
2
2
2
—
—
Not Connected
A2
3
3
3
3
3
3
—
—
Not Connected
VSS
4
4
4
4
4
4
2
2
Ground
SDA
5
5
5
5
5
5
3
3
Serial Address/Data I/O
SCL
6
6
6
6
6
6
1
1
Serial Clock
WP
7
7
7
7
7
7
5
5
Write-Protect Input
VCC
8
8
8
8
8
8
4
4
+1.7V to 5.5V Power Supply
2.1
A0, A1, A2
2.3
Serial Clock (SCL)
The A0, A1 and A2 pins are not used by the 24XX01.
They may be left floating or tied to either VSS or VCC.
The SCL input is used to synchronize the data transfer
to and from the device.
2.2
2.4
Serial Address/Data Input/Output
(SDA)
The SDA input is a bidirectional pin used to transfer
addresses and data into and out of the device. Since
it is an open-drain terminal, the SDA bus requires a
pull-up resistor to VCC (typical 10 kΩ for 100 kHz,
2 kΩ for 400 kHz).
Write-Protect (WP)
This pin must be connected to either VSS or VCC.
If tied to VSS, normal memory operation is enabled
(read/write the entire memory 00-7F).
If tied to VCC, write operations are inhibited. The entire
memory will be write-protected. Read operations are
not affected.
For normal data transfer, SDA is allowed to change
only during SCL low. Changes during SCL high are
reserved for indicating Start and Stop conditions.
© 2009 Microchip Technology Inc.
DS21711J-page 5
24AA01/24LC01B
3.0
FUNCTIONAL DESCRIPTION
The 24XX01 supports a bidirectional, 2-wire bus and
data transmission protocol. A device that sends data
onto the bus is defined as transmitter, while defining a
device receiving data as a receiver. The bus has to be
controlled by a master device which generates the
Serial Clock (SCL), controls the bus access and
generates the Start and Stop conditions, while the
24XX01 works as slave. Both master and slave can
operate as transmitter or receiver, but the master
device determines which mode is activated.
4.0
BUS CHARACTERISTICS
The following bus protocol has been defined:
• Data transfer may be initiated only when the bus
is not busy.
• During data transfer, the data line must remain
stable whenever the clock line is high. Changes in
the data line while the clock line is high will be
interpreted as a Start or Stop condition.
Accordingly, the following bus conditions have been
defined (Figure 4-1).
4.1
Start Data Transfer (B)
A high-to-low transition of the SDA line while the clock
(SCL) is high determines a Start condition. All
commands must be preceded by a Start condition.
4.3
Stop Data Transfer (C)
A low-to-high transition of the SDA line while the clock
(SCL) is high determines a Stop condition. All
operations must be ended with a Stop condition.
FIGURE 4-1:
(A)
Data Valid (D)
The state of the data line represents valid data when,
after a Start condition, the data line is stable for the
duration of the high period of the clock signal.
The data on the line must be changed during the low
period of the clock signal. There is one clock pulse per
bit of data.
Each data transfer is initiated with a Start condition and
terminated with a Stop condition. The number of data
bytes transferred between the Start and Stop
conditions is determined by the master device and is,
theoretically, unlimited (although only the last sixteen
will be stored when doing a write operation). When an
overwrite does occur, it will replace data in a first-in
first-out (FIFO) fashion.
4.5
Acknowledge
Each receiving device, when addressed, is obliged to
generate an acknowledge after the reception of each
byte. The master device must generate an extra clock
pulse which is associated with this Acknowledge bit.
Note:
Bus Not Busy (A)
Both data and clock lines remain high.
4.2
4.4
The 24XX01 does not generate any
Acknowledge
bits
if
an
internal
programming cycle is in progress.
The device that acknowledges has to pull down the
SDA line during the acknowledge clock pulse in such a
way that the SDA line is stable-low during the high
period of the acknowledge-related clock pulse. Of
course, setup and hold times must be taken into
account. During reads, a master must signal an end of
data to the slave by not generating an Acknowledge bit
on the last byte that has been clocked out of the slave.
In this case, the slave (24XX01) will leave the data line
high to enable the master to generate the Stop
condition.
DATA TRANSFER SEQUENCE ON THE SERIAL BUS
(B)
(D)
Start
Condition
Address or
Acknowledge
Valid
(D)
(C)
(A)
SCL
SDA
DS21711J-page 6
Data
Allowed
to Change
Stop
Condition
© 2009 Microchip Technology Inc.
24AA01/24LC01B
5.0
DEVICE ADDRESSING
FIGURE 5-1:
A control byte is the first byte received following the
Start condition from the master device. The control byte
consists of a four-bit control code. For the 24XX01, this
is set as ‘1010’ binary for read and write operations.
The next three bits of the control byte are “don’t cares”
for the 24XX01.
The last bit of the control byte defines the operation to
be performed. When set to ‘1’, a read operation is
selected. When set to ‘0’, a write operation is selected.
Following the Start condition, the 24XX01 monitors the
SDA bus, checking the device type identifier being
transmitted. Upon receiving a ‘1010’ code, the slave
device outputs an Acknowledge signal on the SDA line.
Depending on the state of the R/W bit, the 24XX01 will
select a read or write operation.
Operation
Control
Code
Block Select
R/W
Read
1010
Block Address
1
Write
1010
Block Address
0
FIGURE 5-2:
CONTROL BYTE
ALLOCATION
Read/Write Bit
Block
Select
Bits
Control Code
S
1
0
1
0
x
x
x
R/W ACK
Slave Address
Acknowledge Bit
Start Bit
x = “don’t care”
ADDRESS SEQUENCE BIT ASSIGNMENTS
Control Byte
1
0
1
0
Control
Code
x
x
Address Low Byte
x R/W
x
A
6
•
•
•
•
•
A
0
Block
Select
bits
x = “don’t care”
© 2009 Microchip Technology Inc.
DS21711J-page 7
24AA01/24LC01B
6.0
WRITE OPERATION
6.1
Byte Write
6.2
Following the Start condition from the master, the
device code (4 bits), the block address (3 bits, “don’t
cares”) and the R/W bit, which is a logic-low, is placed
onto the bus by the master transmitter. This indicates to
the addressed slave receiver that a byte with a word
address will follow after it has generated an Acknowledge bit during the ninth clock cycle. Therefore, the
next byte transmitted by the master is the word address
and will be written into the Address Pointer of the
24XX01. After receiving another Acknowledge signal
from the 24XX01, the master device will transmit the
data word to be written into the addressed memory
location. The 24XX01 acknowledges again and the
master generates a Stop condition. This initiates the
internal write cycle, and, during this time, the 24XX01
will not generate Acknowledge signals (Figure 6-1).
Page Write
The write control byte, word address and first data byte
are transmitted to the 24XX01 in the same way as in a
byte write. However, instead of generating a Stop
condition, the master transmits up to 8 data bytes to the
24XX01, which are temporarily stored in the on-chip
page buffer and will be written into the memory once
the master has transmitted a Stop condition. Upon
receipt of each word, the four lower-order Address
Pointer bits are internally incremented by ‘1’. The
higher-order 7 bits of the word address remain
constant. If the master should transmit more than 8
words prior to generating the Stop condition, the
address counter will roll over and the previously
received data will be overwritten. As with the byte write
operation, once the Stop condition is received, an
internal write cycle will begin (Figure 6-2).
Note:
6.3
Page write operations are limited to writing
bytes within a single physical page
regardless of the number of bytes
actually being written. Physical page
boundaries start at addresses that are
integer multiples of the page buffer size (or
‘page size’) and end at addresses that are
integer multiples of [page size – 1]. If a
page write command attempts to write
across a physical page boundary, the
result is that the data wraps around to the
beginning of the current page (overwriting
data previously stored there), instead of
being written to the next page, as might be
expected. It is therefore necessary for the
application software to prevent page write
operations that would attempt to cross a
page boundary.
Write Protection
The WP pin allows the user to write-protect the entire
array (00-7F) when the pin is tied to VCC. If tied to VSS,
the write protection is disabled.
FIGURE 6-1:
BYTE WRITE
Bus Activity
Master
S
T
A
R
T
SDA Line
S
Control
Byte
1 0
Bus Activity
x = “don’t care”
DS21711J-page 8
1 0
x x
Word
Address
S
T
O
P
Data
x 0
Block
Select
Bits
P
A
C
K
A
C
K
A
C
K
© 2009 Microchip Technology Inc.
24AA01/24LC01B
FIGURE 6-2:
PAGE WRITE
Bus Activity
Master
S
T
A
R
T
SDA Line
S 1 0 10 x x x 0
Control
Byte
Bus Activity
x = “don’t care”
© 2009 Microchip Technology Inc.
Block
Select
Bits
Word
Address (n)
Data (n)
S
T
O
P
Data (n + 7)
Data (n + 1)
P
A
C
K
A
C
K
A
C
K
A
C
K
A
C
K
DS21711J-page 9
24AA01/24LC01B
7.0
ACKNOWLEDGE POLLING
Since the device will not acknowledge during a write
cycle, this can be used to determine when the cycle is
complete (this feature can be used to maximize bus
throughput). Once the Stop condition for a write
command has been issued from the master, the device
initiates the internally-timed write cycle. ACK polling
can then be initiated immediately. This involves the
master sending a Start condition followed by the control
byte for a write command (R/W = 0). If the device is still
busy with the write cycle, no ACK will be returned. If the
cycle is complete, the device will return the ACK and
the master can then proceed with the next read or write
command. See Figure 7-1 for a flow diagram of this
operation.
FIGURE 7-1:
ACKNOWLEDGE POLLING
FLOW
Send
Write Command
Send Stop
Condition to
Initiate Write Cycle
Send Start
Send Control Byte
with R/W = 0
Did Device
Acknowledge
(ACK = 0)?
No
Yes
Next
Operation
DS21711J-page 10
© 2009 Microchip Technology Inc.
24AA01/24LC01B
8.0
READ OPERATION
8.3
Sequential Read
Read operations are initiated in the same way as write
operations, with the exception that the R/W bit of the
slave address is set to ‘1’. There are three basic types
of read operations: current address read, random read
and sequential read.
Sequential reads are initiated in the same way as a
random read, except that once the 24XX01 transmits
the first data byte, the master issues an acknowledge
(as opposed to a Stop condition in a random read). This
directs the 24XX01 to transmit the next sequentially
addressed 8-bit word (Figure 8-3).
8.1
To provide sequential reads the 24XX01 contains an
internal Address Pointer which is incremented by one
at the completion of each operation. This Address
Pointer allows the entire memory contents to be serially
read during one operation.
Current Address Read
The 24XX01 contains an address counter that
maintains the address of the last word accessed,
internally incremented by ‘1’. Therefore, if the previous
access (either a read or write operation) was to
address n, the next current address read operation
would access data from address n + 1. Upon receipt of
the slave address with R/W bit set to ‘1’, the 24XX01
issues an acknowledge and transmits the 8-bit data
word. The master will not acknowledge the transfer, but
does generate a Stop condition and the 24XX01
discontinues transmission (Figure 8-1).
8.2
8.4
Noise Protection
The 24XX01 employs a VCC threshold detector circuit
which disables the internal erase/write logic if the VCC
is below 1.5V at nominal conditions.
The SCL and SDA inputs have Schmitt Trigger and
filter circuits which suppress noise spikes to assure
proper device operation even on a noisy bus.
Random Read
Random read operations allow the master to access
any memory location in a random manner. To perform
this type of read operation, the word address must first
be set. This is accomplished by sending the word
address to the 24XX01 as part of a write operation.
Once the word address is sent, the master generates a
Start condition following the acknowledge. This
terminates the write operation, but not before the internal Address Pointer is set. The master then issues the
control byte again, but with the R/W bit set to a ‘1’. The
24XX01 will then issue an acknowledge and transmits
the 8-bit data word. The master will not acknowledge
the transfer, but does generate a Stop condition and the
24XX01 discontinues transmission (Figure 8-2).
FIGURE 8-1:
CURRENT ADDRESS READ
Bus Activity
Master
S
T
A
R
T
SDA Line
S 1 0 1 0 x x x 1
Bus Activity
x = “don’t care”
© 2009 Microchip Technology Inc.
Control
Byte
Block
Select
Bits
S
T
O
P
Data (n)
P
A
C
K
N
o
A
C
K
DS21711J-page 11
24AA01/24LC01B
FIGURE 8-2:
RANDOM READ
S
T
Control
A
Byte
R
T
S 10 1 0 x x x 0
Bus Activity
Master
SDA Line
A
Block C
Select K
Bits
Bus Activity
S
T
Control
A
Byte
R
T
S10 10 xxx 1
Word
Address (n)
A
C
K
Block
Select
Bits
A
C
K
x = “don’t care”
FIGURE 8-3:
Bus Activity
Master
SDA Line
Bus Activity
DS21711J-page 12
S
T
O
P
P
Data (n)
N
o
A
C
K
SEQUENTIAL READ
Control
Byte
Data (n)
Data (n + 1)
Data (n + 2)
S
T
O
P
Data (n + x)
P
1
A
C
K
A
C
K
A
C
K
A
C
K
N
o
A
C
K
© 2009 Microchip Technology Inc.
24AA01/24LC01B
9.0
PACKAGING INFORMATION
9.1
Package Marking Information
8-Lead PDIP (300 mil)
XXXXXXXX
T/XXXNNN
YYWW
8-Lead SOIC (3.90 mm)
XXXXXXXT
XXXXYYWW
NNN
8-Lead TSSOP
Example:
24LC01B
I/P e3 13F
0527
Example:
24LC01BI
SN e3 0527
13F
Example:
XXXX
4L1B
TYWW
I527
NNN
13F
8-Lead MSOP
Example:
XXXXT
4L1BI
YWWNNN
52713F
5-Lead SOT-23
XXNN
© 2009 Microchip Technology Inc.
Example:
M13F
DS21711J-page 13
24AA01/24LC01B
5-Lead SC-70
Example:
XXNN
B13F
8-Lead 2x3 DFN
Example:
XXX
YWW
NN
214
527
13
8-Lead 2x3 TDFN
Example:
XXX
YWW
NN
A14
527
13
1st Line Marking Codes
Part Number
SOT-23
TSSOP
DFN
TDFN
SC-70
MSOP
I Temp. E Temp.
I Temp.
E Temp. I Temp. E Temp. I Temp. E Temp.
24AA01
4A01
4A01T
B1NN
—
211
—
A11
—
B2NN
—
24LC01B
4L1B
4L1BT
M1NN
N1NN
214
215
A14
A15
B1NN
B3NN
Note:
T = Temperature grade (I, E)
NN = Alphanumeric traceability code
Legend: XX...X
T
Y
YY
WW
NNN
e3
Note:
Part number or part number code
Temperature (I, E)
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code (2 characters for small packages)
Pb-free JEDEC designator for Matte Tin (Sn)
Note:
For very small packages with no room for the Pb-free JEDEC designator
e3 , the marking will only appear on the outer carton or reel label.
Note:
In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
Please visit www.microchip.com/Pbfree for the latest information on Pb-free conversion.
*Standard OTP marking consists of Microchip part number, year code, week code, and traceability code.
DS21711J-page 14
© 2009 Microchip Technology Inc.
24AA01/24LC01B
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DS21711J-page 21
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© 2009 Microchip Technology Inc.
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DS21711J-page 26
© 2009 Microchip Technology Inc.
24AA01/24LC01B
APPENDIX A:
REVISION HISTORY
Revision C
Corrections to Section 1.0, Electrical Characteristics.
Section 9.1, 24LC01B standard marking code.
Revision D
Added DFN package.
Revision E
Revised Figure 3-2 Control Byte Allocation; Figure 4-1
Byte Write; Figure 4-2 Page Write; Section 6.0 Write
Protection; Figure 7-1 Current Address Read; Figure 72 Random Read; Figure 7-3 Sequential Read.
Revision F (01/2007)
Revised Device Selection Table; Revised Features
Section; Changed 1.8V to 1.7V; Revised Table 1-1,
1-2, 8-1; Replaced Package Drawings; Revised
Product ID System.
Revision G (03/2007)
Replaced Package Drawings (Rev. AM).
Revision H (08/2008)
Added SC-70 Package; Updated Package Drawings.
Revision J (01/2009)
Added TDFN Package; Updated Package Drawings.
© 2009 Microchip Technology Inc.
DS21711J-page 27
24AA01/24LC01B
NOTES:
DS21711J-page 28
© 2009 Microchip Technology Inc.
24AA01/24LC01B
THE MICROCHIP WEB SITE
CUSTOMER SUPPORT
Microchip provides online support via our WWW site at
www.microchip.com. This web site is used as a means
to make files and information easily available to
customers. Accessible by using your favorite Internet
browser, the web site contains the following
information:
Users of Microchip products can receive assistance
through several channels:
• Product Support – Data sheets and errata,
application notes and sample programs, design
resources, user’s guides and hardware support
documents, latest software releases and archived
software
• General Technical Support – Frequently Asked
Questions (FAQ), technical support requests,
online discussion groups, Microchip consultant
program member listing
• Business of Microchip – Product selector and
ordering guides, latest Microchip press releases,
listing of seminars and events, listings of
Microchip sales offices, distributors and factory
representatives
•
•
•
•
•
Distributor or Representative
Local Sales Office
Field Application Engineer (FAE)
Technical Support
Development Systems Information Line
Customers
should
contact
their
distributor,
representative or field application engineer (FAE) for
support. Local sales offices are also available to help
customers. A listing of sales offices and locations is
included in the back of this document.
Technical support is available through the web site
at: http://support.microchip.com
CUSTOMER CHANGE NOTIFICATION
SERVICE
Microchip’s customer notification service helps keep
customers current on Microchip products. Subscribers
will receive e-mail notification whenever there are
changes, updates, revisions or errata related to a
specified product family or development tool of interest.
To register, access the Microchip web site at
www.microchip.com, click on Customer Change
Notification and follow the registration instructions.
© 2009 Microchip Technology Inc.
DS21711J-page 29
24AA01/24LC01B
READER RESPONSE
It is our intention to provide you with the best documentation possible to ensure successful use of your Microchip product. If you wish to provide your comments on organization, clarity, subject matter, and ways in which our documentation
can better serve you, please FAX your comments to the Technical Publications Manager at (480) 792-4150.
Please list the following information, and use this outline to provide us with your comments about this document.
To:
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Telephone: (_______) _________ - _________
FAX: (______) _________ - _________
Application (optional):
Would you like a reply?
Device: 24AA01/24LC01B
Y
N
Literature Number: DS21711J
Questions:
1. What are the best features of this document?
2. How does this document meet your hardware and software development needs?
3. Do you find the organization of this document easy to follow? If not, why?
4. What additions to the document do you think would enhance the structure and subject?
5. What deletions from the document could be made without affecting the overall usefulness?
6. Is there any incorrect or misleading information (what and where)?
7. How would you improve this document?
DS21711J-page 30
© 2009 Microchip Technology Inc.
24AA01/24LC01B
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
X
PART NO.
Device
/XX
Temperature Package
Range
Examples:
a)
b)
Device:
= 1.7V, 1 Kbit I2C™ Serial EEPROM
= 1.7V, 1 Kbit I2C Serial EEPROM
(Tape and Reel)
24LC01B: = 2.5V, 1 Kbit I2C Serial EEPROM
24LC01BT: = 2.5V, 1 Kbit I2C Serial EEPROM
(Tape and Reel)
24AA01:
24AA01T:
Temperature I
Range:
E
Package:
= -40°C to +85°C
= -40°C to +125°C
c)
d)
e)
f)
24AA01-I/P: Industrial Temperature,1.7V
PDIP package
24AA01-I/SN: Industrial Temperature,
1.7V, SOIC package
24AA01T-I/OT: Industrial Temperature,
1.7V, SOT-23 package, tape and reel
24LC01B-I/P: Industrial Temperature,
2.5V, PDIP package
24LC01B-E/SN: Extended Temperature,
2.5V, SOIC package
24LC01BT-I/LT: Industrial Temperature,
1.7V, SC-70 package, tape and reel
MC = 2x3 DFN, 8-lead
P
= Plastic DIP (300 mil body), 8-lead
SN = Plastic SOIC (3.90 mm body), 8-lead
ST = Plastic TSSOP (4.4 mm), 8-lead
MS = Plastic Micro Small Outline (MSOP), 8-lead
OT = SOT-23, 5-lead (Tape and Reel only)
LT = SC-70, 5-lead (Tape and Reel only)
MNY(1)=TDFN, (2x3x0.75 mm body), 8-lead
Note 1: "Y" indicates a Nickel Palladium Gold (NiPdAu) finish.
© 2009 Microchip Technology Inc.
DS21711J-page31
24AA01/24LC01B
NOTES:
DS21711J-page 32
© 2009 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
•
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights.
Trademarks
The Microchip name and logo, the Microchip logo, Accuron,
dsPIC, KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro,
PICSTART, rfPIC, SmartShunt and UNI/O are registered
trademarks of Microchip Technology Incorporated in the
U.S.A. and other countries.
FilterLab, Linear Active Thermistor, MXDEV, MXLAB,
SEEVAL, SmartSensor and The Embedded Control Solutions
Company are registered trademarks of Microchip Technology
Incorporated in the U.S.A.
Analog-for-the-Digital Age, Application Maestro, CodeGuard,
dsPICDEM, dsPICDEM.net, dsPICworks, dsSPEAK, ECAN,
ECONOMONITOR, FanSense, In-Circuit Serial
Programming, ICSP, ICEPIC, Mindi, MiWi, MPASM, MPLAB
Certified logo, MPLIB, MPLINK, mTouch, PICkit, PICDEM,
PICDEM.net, PICtail, PIC32 logo, PowerCal, PowerInfo,
PowerMate, PowerTool, REAL ICE, rfLAB, Select Mode, Total
Endurance, WiperLock and ZENA are trademarks of
Microchip Technology Incorporated in the U.S.A. and other
countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
© 2009, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
Microchip received ISO/TS-16949:2002 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
© 2009 Microchip Technology Inc.
DS21711J-page 33
WORLDWIDE SALES AND SERVICE
AMERICAS
ASIA/PACIFIC
ASIA/PACIFIC
EUROPE
Corporate Office
2355 West Chandler Blvd.
Chandler, AZ 85224-6199
Tel: 480-792-7200
Fax: 480-792-7277
Technical Support:
http://support.microchip.com
Web Address:
www.microchip.com
Asia Pacific Office
Suites 3707-14, 37th Floor
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Tel: 852-2401-1200
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Tel: 91-11-4160-8631
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Fax: 86-24-2334-2393
Singapore
Tel: 65-6334-8870
Fax: 65-6334-8850
China - Shenzhen
Tel: 86-755-8203-2660
Fax: 86-755-8203-1760
Taiwan - Hsin Chu
Tel: 886-3-572-9526
Fax: 886-3-572-6459
China - Wuhan
Tel: 86-27-5980-5300
Fax: 86-27-5980-5118
Taiwan - Kaohsiung
Tel: 886-7-536-4818
Fax: 886-7-536-4803
China - Xiamen
Tel: 86-592-2388138
Fax: 86-592-2388130
Taiwan - Taipei
Tel: 886-2-2500-6610
Fax: 886-2-2508-0102
China - Xian
Tel: 86-29-8833-7252
Fax: 86-29-8833-7256
Thailand - Bangkok
Tel: 66-2-694-1351
Fax: 66-2-694-1350
Italy - Milan
Tel: 39-0331-742611
Fax: 39-0331-466781
Netherlands - Drunen
Tel: 31-416-690399
Fax: 31-416-690340
Spain - Madrid
Tel: 34-91-708-08-90
Fax: 34-91-708-08-91
UK - Wokingham
Tel: 44-118-921-5869
Fax: 44-118-921-5820
China - Zhuhai
Tel: 86-756-3210040
Fax: 86-756-3210049
02/04/09
DS21711J-page 34
© 2009 Microchip Technology Inc.