NUP412VP5 Low Capacitance Quad Array for ESD Protection This integrated transient voltage suppressor device (TVS) is designed for applications requiring transient overvoltage protection. It is intended to be used in sensitive equipment such as wireless headsets, PDAs, digital cameras, computers, printers, communication systems, and other applications. The integrated design provides very effective and reliable protection for four separate lines using only one package. This device is ideal for situations where board space is at a premium. Features • • • • • • ESD Protection: IEC61000−4−2: Level 4 Four Separate Unidirectional Configurations for Protection Low Leakage Current < 1 mA @ 9 V Small SOT−953 SMT Package Low Capacitance These are Pb−Free Devices http://onsemi.com 1 5 2 3 4 SOT−953 CASE 526AB Benefits • • • • Provides Protection for ESD Industry Standards: IEC 61000, HBM Protects Four Lines Against Transient Voltage Conditions Minimize Power Consumption of the System Minimize PCB Board Space MARKING DIAGRAM 2M 1 Typical Applications • • • • Cellular and Portable Electronics Serial and Parallel Ports Microprocessor Based Equipment Notebooks, Desktops, Servers 2 = Specific Device Code M = Date & Assembly Code ORDERING INFORMATION Device NUP412VP5T5G Package Shipping† SOT−953 (Pb−Free) 8000 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. © Semiconductor Components Industries, LLC, 2008 May, 2008 − Rev. 1 1 Publication Order Number: NUP412VP5/D NUP412VP5 ELECTRICAL CHARACTERISTICS I (TA = 25°C unless otherwise noted) Symbol IF Parameter IPP Maximum Reverse Peak Pulse Current VC Clamping Voltage @ IPP VRWM IR VBR IT QVBR VC VBR VRWM Working Peak Reverse Voltage V IR VF IT Maximum Reverse Leakage Current @ VRWM Breakdown Voltage @ IT Test Current Maximum Temperature Coefficient of VBR IF Forward Current VF Forward Voltage @ IF ZZT Maximum Zener Impedance @ IZT IZK Reverse Current ZZK Maximum Zener Impedance @ IZK IPP Uni−Directional MAXIMUM RATINGS (TA = 25°C unless otherwise noted) Characteristic Symbol Value Unit Peak Power Dissipation (8 X 20 ms @ TA = 25°C) (Note 1) PPK 18 W Thermal Resistance Junction−to−Ambient Above 25°C, Derate RqJA 560 4.5 °C/W mW/°C TJmax 150 °C TJ Tstg −55 to +150 °C TL 260 °C ESD 8000 400 V Maximum Junction Temperature Operating Junction and Storage Temperature Range Lead Solder Temperature (10 seconds duration) Human Body Model (HBM) Machine Model (MM) Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Non−repetitive current. ELECTRICAL CHARACTERISTICS (TA = 25°C) Device NUP412VP5 (Note 3) Device Marking 2 Typ Capacitance @ 0 V Bias (pF) (Note 2) Typ Capacitance @ 3 V Bias (pF) (Note 2) Breakdown Voltage VBR @ 5 mA (Volts) Leakage Current IRM @ VRM Min Nom Max VRWM IRWM (mA) Typ Max Typ Max 11.4 12 12.7 9.0 0.5 6.5 10 3.5 5.0 2. Capacitance of one diode at f = 1 MHz, TA = 25°C. 3. VBR at 5 mA. http://onsemi.com 2 NUP412VP5 TYPICAL ELECTRICAL CHARACTERISTICS 7.5 0.003 TYPICAL CAPACITANCE (pF) 1 MHz FREQUENCY IR, REVERSE LEAKAGE (mA) 0.0035 0.0025 0.002 0.0015 0.001 0.0005 0 −60 −40 −20 0 20 40 60 80 7 6.5 6 5.5 5 4.5 4 3.5 3 100 120 140 160 0 0.5 1 1.5 T, TEMPERATURE (°C) Figure 1. Reverse Leakage versus Temperature PULSE WIDTH (tP) IS DEFINED AS THAT POINT WHERE THE PEAK CURRENT DECAY = 8 ms 80 70 60 HALF VALUE IRSM/2 @ 20 ms 50 40 30 tP 20 3 0 20 40 60 0.001 5 80 TA = 25°C 0.6 0.8 1.0 1.2 1.4 VF, FORWARD VOLTAGE (V) Figure 3. 8 × 20 ms Pulse Waveform Figure 4. Forward Voltage 110 100 90 80 70 60 50 40 30 20 0 4.5 0.01 t, TIME (ms) 10 0 4 0.1 10 0 3.5 1 IF, FORWARD CURRENT (A) 90 2.5 Figure 2. Capacitance PEAK VALUE IRSM @ 8 ms tr % OF RATED POWER OR IPP % OF PEAK PULSE CURRENT 100 2 BIAS VOLTAGE (V) 25 50 75 100 125 TA, AMBIENT TEMPERATURE (°C) Figure 5. Power Derating Curve http://onsemi.com 3 150 1.6 1.8 NUP412VP5 PACKAGE DIMENSIONS SOT−953 CASE 527AB−01 ISSUE B A −Y− D NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETERS 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. L −X− 5 4 1 2 3 HE E e DIM A b C D E e L HE C b 5X 0.08 X Y MILLIMETERS MIN NOM MAX 0.34 0.42 0.50 0.10 0.15 0.20 0.05 0.10 0.15 0.95 1.00 1.05 0.75 0.80 0.85 0.35 BSC 0.05 0.10 0.15 0.95 1.00 1.05 INCHES NOM MAX 0.017 0.020 0.006 0.008 0.004 0.006 0.039 0.041 0.032 0.034 0.014 BSC 0.002 0.004 0.006 0.037 0.039 0.041 MIN 0.013 0.004 0.002 0.037 0.03 SOLDERING FOOTPRINT* 0.35 0.014 0.35 0.014 0.90 0.0354 0.20 0.08 0.20 0.08 SCALE 20:1 mm Ǔ ǒinches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. 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