Low Power, Wide Supply Range, Low Cost Difference Amplifiers, G = ½, 2 AD8278/AD8279 FEATURES FUNCTIONAL BLOCK DIAGRAMS +VS Wide input range beyond supplies Rugged input overvoltage protection Low supply current: 200 μA maximum (per amplifier) Low power dissipation: 0.5 mW at VS = 2.5 V Bandwidth: 1 MHz (G = ½) CMRR: 80 dB minimum, dc to 20 kHz (G = ½, B Grade) Low offset voltage drift: ±1 μV/°C maximum (B Grade) Low gain drift: 1 ppm/°C maximum (B Grade) Enhanced slew rate: 1.4 V/μs Wide power supply range Single supply: 2 V to 36 V Dual supplies: ±2 V to ±18 V 8-lead SOIC, 14-lead SOIC, and 8-lead MSOP packages 7 AD8278 +IN 3 20kΩ 40kΩ 20kΩ The AD8278 and AD8279 operate on single supplies (2.0 V to 36 V) or dual supplies (±2 V to ±18 V). The maximum quiescent supply current is 200 μA, which is ideal for battery-operated and portable systems. For unity-gain difference amplifiers with similar performance, refer to the AD8276 and AD8277 data sheets. OUT 1 REF Figure 1. AD8278 +VS 11 –INA +INA 3 –INB 6 40kΩ 20kΩ 40kΩ 20kΩ 40kΩ 20kΩ +INB 5 40kΩ 20kΩ 12 SENSEA 13 OUTA 14 REFA 10 SENSEB 9 OUTB 8 REFB 4 –VS 08308-058 AD8279 2 GENERAL DESCRIPTION The AD8278 and AD8279 can be used as difference amplifiers with G = ½ or G = 2. They can also be connected in a high precision, single-ended configuration for non inverting and inverting gains of −½, −2, +3, +2, +1½, +1, or +½. The AD8278 and AD8279 provide an integrated precision solution that has a smaller size, lower cost, and better performance than a discrete alternative. 6 4 Voltage measurement and monitoring Current measurement and monitoring Instrumentation amplifier building block Portable, battery-powered equipment Test and measurement The common-mode range of the amplifier extends to almost triple the supply voltage (for G = ½), making the amplifer ideal for single-supply applications that require a high commonmode voltage range. The internal resistors and ESD circuitry at the inputs also provide overvoltage protection to the op amp. SENSE –VS APPLICATIONS The AD8278 and AD8279 are general-purpose difference amplifiers intended for precision signal conditioning in power critical applications that require both high performance and low power. The AD8278 and AD8279 provide exceptional commonmode rejection ratio (80 dB) and high bandwidth while amplifying input signals that are well beyond the supply rails. The on-chip resistors are laser trimmed for excellent gain accuracy and high CMRR. They also have extremely low gain drift vs. temperature. 5 08308-001 –IN 2 40kΩ Figure 2. AD8279 Table 1. Difference Amplifiers by Category Low Distortion AD8270 AD8271 AD8273 AD8274 AMP03 High Voltage AD628 AD629 Current Sensing1 AD8202 (U) AD8203 (U) AD8205 (B) AD8206 (B) AD8216 (B) Low Power AD8276 AD8277 1 U = unidirectional, B = bidirectional. The AD8278 is available in the space-saving 8-lead MSOP and SOIC packages, and the AD8279 is offered in a 14-lead SOIC package. Both are specified for performance over the industrial temperature range of −40°C to +85°C and are fully RoHS compliant. Rev. C Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2009–2011 Analog Devices, Inc. All rights reserved. AD8278/AD8279 TABLE OF CONTENTS Features .............................................................................................. 1 Typical Performance Characteristics ..............................................9 Applications....................................................................................... 1 Theory of Operation ...................................................................... 16 General Description ......................................................................... 1 Circuit Information.................................................................... 16 Functional Block Diagrams............................................................. 1 Driving the AD8278 and AD8279 ........................................... 16 Revision History ............................................................................... 2 Input Voltage Range................................................................... 16 Specifications..................................................................................... 3 Power Supplies ............................................................................ 17 Absolute Maximum Ratings............................................................ 7 Applications Information .............................................................. 18 Thermal Resistance ...................................................................... 7 Configurations............................................................................ 18 Maximum Power Dissipation ..................................................... 7 Differential Output .................................................................... 19 Short-Circuit Current .................................................................. 7 Instrumentation Amplifier........................................................ 19 ESD Caution.................................................................................. 7 Outline Dimensions ....................................................................... 20 Pin Configurations and Function Descriptions ........................... 8 Ordering Guide .......................................................................... 21 REVISION HISTORY 1/11—Rev. B to Rev. C Change to Impedance/Differential Parameter, Table 3 ............... 4 Change to Impedance/Differential Parameter, Table 5 ............... 6 4/10—Rev. A to Rev. B Changed Supply Current Parameters to AD8278 Supply Current Parameter and AD8279 Supply Current Parameter, Table 5 ...... 6 Updated Outline Dimensions ....................................................... 20 10/09—Rev. 0 to Rev. A Added AD8279 and 14-Lead SOIC Model .....................Universal Changes to Features.......................................................................... 1 Changes to General Description .................................................... 1 Change to Table 2 ............................................................................. 3 Change to Table 3 ..............................................................................4 Change to Table 4 ..............................................................................5 Change to Table 5 ..............................................................................6 Added Figure 6 and Table 9 .............................................................8 Changes to Figure 31 and Figure 32............................................. 13 Changes to Figure 40, Figure 41, and Figure 42 ......................... 14 Added Figure 47; Renumbered Sequentially .............................. 15 Changes to Figure 51 to Figure 57................................................ 18 Added Differential Output Section.............................................. 19 Changes to Figure 59...................................................................... 19 Updated Outline Dimensions....................................................... 21 Changes to Ordering Guide .......................................................... 21 7/09—Revision 0: Initial Version Rev. C | Page 2 of 24 AD8278/AD8279 SPECIFICATIONS VS = ±5 V to ±15 V, VREF = 0 V, TA = 25°C, RL = 10 kΩ connected to ground, G = ½ difference amplifier configuration, unless otherwise noted. Table 2. G=½ Parameter INPUT CHARACTERISTICS System Offset 1 Over Temperature vs. Power Supply Average Temperature Coefficient Common-Mode Rejection Ratio (RTI) Input Voltage Range 2 Impedance 3 Differential Common Mode DYNAMIC PERFORMANCE Bandwidth Slew Rate Channel Separation Settling Time to 0.01% Settling Time to 0.001% GAIN Gain Error Gain Drift Gain Nonlinearity OUTPUT CHARACTERISTICS Output Voltage Swing 4 Short-Circuit Current Limit Capacitive Load Drive NOISE 5 Output Voltage Noise POWER SUPPLY 6 AD8278 Supply Current Over Temperature AD8279 Supply Current Over Temperature Operating Voltage Range 7 TEMPERATURE RANGE Operating Range Conditions Grade B Typ Max Min 250 250 5 μV μV μV/V 0.3 1 2 5 μV/°C +3 (VS − 1.5) dB V +3 (VS − 1.5) 1 1.4 130 74 −3 (VS + 0.1) 1.1 120 30 kΩ kΩ 1 1.4 130 MHz V/μs dB 9 10 0.005 TA = −40°C to +85°C VOUT = 20 V p-p VS = ±15 V, RL = 10 kΩ TA = −40°C to +85°C −VS + 0.2 0.02 1 7 +VS − 0.2 0.01 −VS + 0.2 ±15 200 f = 0.1 Hz to 10 Hz f = 1 kHz Unit 50 120 30 f = 1 kHz 10 V step on output, CL = 100 pF Max 100 100 2.5 80 −3 (VS + 0.1) 1.1 Grade A Typ 50 TA = −40°C to +85°C VS = ±5 V to ±18 V TA = −40°C to +85°C VS = ±15 V, VCM = ±27 V, RS = 0 Ω Min 1.4 47 9 10 μs μs 0.05 5 12 % ppm/°C ppm +VS − 0.2 V mA pF ±15 200 1.4 47 50 50 μV p-p nV/√Hz μA μA μA μA V °C ±2 200 250 350 400 ±18 ±2 200 250 350 400 ±18 −40 +125 −40 +125 TA = −40°C to +85°C 300 TA = −40°C to +85°C 1 300 Includes input bias and offset current errors, RTO (referred to output). The input voltage range may also be limited by absolute maximum input voltage or by the output swing. See the Input Voltage Range for details. Internal resistors are trimmed to be ratio matched and have ±20% absolute accuracy. 4 Output voltage swing varies with supply voltage and temperature. See Figure 22 through Figure 25 for details. 5 Includes amplifier voltage and current noise, as well as noise from internal resistors. 6 Supply current varies with supply voltage and temperature. See Figure 26 and Figure 28 for details. 7 Unbalanced dual supplies can be used, such as −VS = −0.5 V and +VS = +2 V. The positive supply rail must be at least 2 V above the negative supply and reference voltage. 2 3 Rev. C | Page 3 of 24 AD8278/AD8279 VS = ±5 V to ±15 V, VREF = 0 V, TA = 25°C, RL = 10 kΩ connected to ground, G = 2 difference amplifier configuration, unless otherwise noted. Table 3. G=2 Parameter INPUT CHARACTERISTICS System Offset 1 Over Temperature vs. Power Supply Average Temperature Coefficient Common-Mode Rejection Ratio (RTI) Input Voltage Range 2 Impedance 3 Differential Common Mode DYNAMIC PERFORMANCE Bandwidth Slew Rate Channel Separation Settling Time to 0.01% Settling Time to 0.001% GAIN Gain Error Gain Drift Gain Nonlinearity OUTPUT CHARACTERISTICS Output Voltage Swing 4 Short-Circuit Current Limit Capacitive Load Drive NOISE 5 Output Voltage Noise POWER SUPPLY 6 AD8278 Supply Current Over Temperature AD8279 Supply Current Over Temperature Operating Voltage Range 7 TEMPERATURE RANGE Operating Range Conditions Grade B Typ Max Min 100 500 500 10 μV μV μV/V 0.6 2 2 5 μV/°C +1.5 (VS − 1.5) dB V 80 +1.5 (VS − 1.5) −1.5 (VS + 0.1) 30 30 550 1.4 130 f = 1 kHz 10 V step on output, CL = 100 pF 1.1 30 30 kΩ kΩ 550 1.4 130 kHz V/μs dB 10 11 0.005 TA = −40°C to +85°C VOUT = 20 V p-p VS = ±15 V, RL = 10 kΩ, TA = −40°C to +85°C −VS + 0.2 0.02 1 7 +VS − 0.2 0.01 −VS + 0.2 ±15 350 f = 0.1 Hz to 10 Hz f = 1 kHz 2.8 90 10 11 μs μs 0.05 5 12 % ppm/°C ppm +VS − 0.2 V ±15 350 2.8 90 95 mA pF 95 μV p-p nV/√Hz μA μA μA μA V °C ±2 200 250 350 400 ±18 ±2 200 250 350 400 ±18 −40 +125 −40 +125 TA = −40°C to +85°C 300 TA = −40°C to +85°C Unit 200 200 5 86 −1.5 (VS + 0.1) 1.1 Grade A Typ Max 100 TA = −40°C to +85°C VS = ±5 V to ±18 V TA = −40°C to +85°C VS = ±15 V, VCM = ±27 V, RS = 0 Ω Min 1 300 Includes input bias and offset current errors, RTO (referred to output). The input voltage range may also be limited by absolute maximum input voltage or by the output swing. See the Input Voltage Range section for details. 3 Internal resistors are trimmed to be ratio matched and have ±20% absolute accuracy. 4 Output voltage swing varies with supply voltage and temperature. See Figure 22 through Figure 25 for details. 5 Includes amplifier voltage and current noise, as well as noise from internal resistors. 6 Supply current varies with supply voltage and temperature. See Figure 26 and Figure 28 for details. 7 Unbalanced dual supplies can be used, such as −VS = −0.5 V and +VS = +2 V. The positive supply rail must be at least 2 V above the negative supply and reference voltage. 2 Rev. C | Page 4 of 24 AD8278/AD8279 VS = +2.7 V to <±5 V, VREF = midsupply, TA = 25°C, RL = 10 kΩ connected to midsupply, G = ½ difference amplifier configuration, unless otherwise noted. Table 4. G=½ Parameter INPUT CHARACTERISTICS System Offset 1 Over Temperature vs. Power Supply Average Temperature Coefficient Common-Mode Rejection Ratio (RTI) Input Voltage Range 2 Impedance 3 Differential Common Mode DYNAMIC PERFORMANCE Bandwidth Slew Rate Channel Separation Settling Time to 0.01% GAIN Gain Error Gain Drift OUTPUT CHARACTERISTICS Output Swing 4 Short-Circuit Current Limit Capacitive Load Drive NOISE 5 Output Voltage Noise POWER SUPPLY 6 AD8278 Supply Current AD8279 Supply Current Operating Voltage Range TEMPERATURE RANGE Operating Range Conditions Grade B Typ Max Min 250 250 5 μV μV μV/V 0.3 1 2 5 μV/°C 74 +3 (VS − 1.5) dB 74 −3 (VS + 0.1) +3 (VS − 1.5) dB V 120 30 120 30 kΩ kΩ 870 1.3 130 870 1.3 130 kHz V/μs dB 7 7 μs 0.005 TA = −40°C to +85°C −VS + 0.1 0.02 1 +VS − 0.15 0.01 −VS + 0.1 ±10 200 1.4 47 TA = −40°C to +85°C TA = −40°C to +85°C Unit 75 80 −3 (VS + 0.1) f = 0.1 Hz to 10 Hz f = 1 kHz Max 150 150 2.5 80 f = 1 kHz 2 V step on output, CL = 100 pF, VS = 2.7 V RL = 10 kΩ, TA = −40°C to +85°C Grade A Typ 75 TA = −40°C to +85°C VS = ±5 V to ±18 V TA = −40°C to +85°C VS = 2.7 V, VCM = 0 V to 2.4 V, RS = 0 Ω VS = ±5 V, VCM = −10 V to +7 V, RS = 0 Ω Min 0.05 5 % ppm/°C +VS − 0.15 V mA pF ±10 200 1.4 47 50 50 μV p-p nV/√Hz μA μA V °C 2.0 200 375 36 2.0 200 375 36 −40 +125 −40 +125 1 Includes input bias and offset current errors, RTO (referred to output). The input voltage range may also be limited by absolute maximum input voltage or by the output swing. See the Input Voltage Range section for details. 3 Internal resistors are trimmed to be ratio matched and have ±20% absolute accuracy. 4 Output voltage swing varies with supply voltage and temperature. See Figure 22 through Figure 25 for details. 5 Includes amplifier voltage and current noise, as well as noise from internal resistors. 6 Supply current varies with supply voltage and temperature. See Figure 27 and Figure 28 for details. 2 Rev. C | Page 5 of 24 AD8278/AD8279 VS = +2.7 V to <±5 V, VREF = midsupply, TA = 25°C, RL = 10 kΩ connected to midsupply, G = 2 difference amplifier configuration, unless otherwise noted. Table 5. G=2 Parameter INPUT CHARACTERISTICS System Offset 1 Over Temperature vs. Power Supply Average Temperature Coefficient Common-Mode Rejection Ratio (RTI) Input Voltage Range 2 Impedance 3 Differential Common Mode DYNAMIC PERFORMANCE Bandwidth Slew Rate Channel Separation Settling Time to 0.01% GAIN Gain Error Gain Drift OUTPUT CHARACTERISTICS Output Swing 4 Short-Circuit Current Limit Capacitive Load Drive NOISE 5 Output Voltage Noise POWER SUPPLY 6 AD8278 Supply Current AD8279 Supply Current Operating Voltage Range TEMPERATURE RANGE Operating Range Conditions Grade B Typ Max Min 150 500 500 10 μV μV μV/V 0.6 2 3 5 μV/°C 80 86 −1.5 (VS + 0.1) +1.5 (VS − 1.5) dB 80 −1.5 (VS + 0.1) +1.5 (VS − 1.5) dB V 30 30 30 30 kΩ kΩ 450 1.3 130 450 1.3 130 kHz V/μs dB 9 9 μs 0.005 TA = −40°C to +85°C −VS + 0.1 0.02 1 +VS − 0.15 0.01 −VS + 0.1 ±10 200 f = 0.1 Hz to 10 Hz f = 1 kHz Unit 300 300 5 86 f = 1 kHz 2 V step on output, CL = 100 pF, VS = 2.7 V RL = 10 kΩ, TA = −40°C to +85°C Grade A Typ Max 150 TA = −40°C to +85°C VS = ±5 V to ±18 V TA = −40°C to +85°C VS = 2.7 V, VCM = 0 V to 2.4 V, RS = 0 Ω VS = ±5 V, VCM = −10 V to +7 V, RS = 0 Ω Min 2.8 94 TA = −40°C to +85°C TA = −40°C to +85°C 0.05 5 % ppm/°C +VS − 0.15 V mA pF ±10 200 2.8 94 100 100 μV p-p nV/√Hz μA μA V °C 2.0 200 375 36 2.0 200 375 36 −40 +125 −40 +125 1 Includes input bias and offset current errors, RTO (referred to output). The input voltage range may also be limited by absolute maximum input voltage or by the output swing. See the Input Voltage Range section for details. 3 Internal resistors are trimmed to be ratio matched and have ±20% absolute accuracy. 4 Output voltage swing varies with supply voltage and temperature. See Figure 22 through Figure 25 for details. 5 Includes amplifier voltage and current noise, as well as noise from internal resistors. 6 Supply current varies with supply voltage and temperature. See Figure 27 and Figure 28 for details. 2 Rev. C | Page 6 of 24 AD8278/AD8279 ABSOLUTE MAXIMUM RATINGS 2.0 Table 6. THERMAL RESISTANCE SOIC θJA = 121°C/W 1.2 0.8 MSOP θJA = 135°C/W 0.4 0 –50 –25 0 25 50 75 100 125 AMBIENT TEMERATURE (°C) Figure 3. Maximum Power Dissipation vs. Ambient Temperature SHORT-CIRCUIT CURRENT The AD8278 and AD8279 have built-in, short-circuit protection that limits the output current (see Figure 29 for more information). While the short-circuit condition itself does not damage the part, the heat generated by the condition can cause the part to exceed its maximum junction temperature, with corresponding negative effects on reliability. Figure 3 and Figure 29, combined with knowledge of the supply voltages and ambient temperature of the part, can be used to determine whether a short circuit will cause the part to exceed its maximum junction temperature. The θJA values in Table 7 assume a 4-layer JEDEC standard board with zero airflow. Table 7. Thermal Resistance θJA 135 121 105 1.6 08308-002 Rating ±18 V −VS + 40 V +VS − 40 V −65°C to +150°C −40°C to +85°C 150°C Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Package Type 8-Lead MSOP 8-Lead SOIC 14-Lead SOIC MAXIMUM POWER DISSIPATION (W) TJ MAX = 150°C Parameter Supply Voltage Maximum Voltage at Any Input Pin Minimum Voltage at Any Input Pin Storage Temperature Range Specified Temperature Range Package Glass Transition Temperature (TG) Unit °C/W °C/W °C/W MAXIMUM POWER DISSIPATION ESD CAUTION The maximum safe power dissipation for the AD8278 and AD8279 are limited by the associated rise in junction temperature (TJ) on the die. At approximately 150°C, which is the glass transition temperature, the properties of the plastic change. Even temporarily exceeding this temperature limit may change the stresses that the package exerts on the die, permanently shifting the parametric performance of the amplifiers. Exceeding a temperature of 150°C for an extended period may result in a loss of functionality. Rev. C | Page 7 of 24 AD8278/AD8279 8 NC REF 1 AD8278 7 –IN 2 TOP VIEW (Not to Scale) +VS 6 OUT 5 SENSE –IN 2 +IN 3 –VS 4 NC = NO CONNECT Description Reference Voltage Input. Inverting Input. Noninverting Input. Negative Supply. Sense Terminal. Output. Positive Supply. No Connect. NC 1 14 REFA –INA 2 +INA 3 13 OUTA AD8279 12 SENSEA –VS 4 11 +VS TOP VIEW 10 SENSEB (Not to Scale) 9 OUTB –INB 6 NC 7 8 REFB NC = NO CONNECT 08308-059 +INB 5 Figure 6. 14-Lead SOIC Pin Configuration Table 9. AD8279 Pin Function Descriptions Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 Mnemonic NC −INA +INA −VS +INB −INB NC REFB OUTB SENSEB +VS SENSEA OUTA REFA NC 7 +VS 6 OUT 5 SENSE Figure 5. SOIC Pin Configuration Table 8. AD8278 Pin Function Descriptions Mnemonic REF −IN +IN −VS SENSE OUT +VS NC 8 NC = NO CONNECT Figure 4. MSOP Pin Configuration Pin No. 1 2 3 4 5 6 7 8 AD8278 TOP VIEW +IN 3 (Not to Scale) –VS 4 08308-003 REF 1 08308-004 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS Description No Connect. Channel A Inverting Input. Channel A Noninverting Input. Negative Supply. Channel B Noninverting Input. Channel B Inverting Input. No Connect. Channel B Reference Voltage Input. Channel B Output. Channel B Sense Terminal. Positive Supply. Channel A Sense Terminal. Channel A Output. Channel A Reference Voltage Input. Rev. C | Page 8 of 24 AD8278/AD8279 TYPICAL PERFORMANCE CHARACTERISTICS VS = ±15 V, TA = 25°C, RL = 10 kΩ connected to ground, G = ½ difference amplifier configuration, unless otherwise noted. 600 80 N = 3840 MEAN = –16.8 SD = 41.7673 60 500 SYSTEM OFFSET (µV) NUMBER OF HITS 40 400 300 200 20 0 –20 –40 –60 100 –150 –100 –50 0 50 100 REPRESENTATIVE DATA –100 –50 –35 –20 –5 10 08308-005 0 150 SYSTEM OFFSET VOLTAGE (µV) Figure 7. Distribution of Typical System Offset Voltage, G = 2 800 40 55 70 85 Figure 10. System Offset vs. Temperature, Normalized at 25°, G = ½ 20 N = 3837 MEAN = 7.78 SD = 13.569 700 25 TEMPERATURE (°C) 08308-008 –80 15 10 GAIN ERROR (µV/V) NUMBER OF HITS 600 500 400 300 5 0 –5 –10 –15 200 –20 100 –20 0 20 40 60 REPRESENTATIVE DATA –30 –50 –35 –20 –5 10 CMRR (µV/V) Figure 8. Distribution of Typical Common-Mode Rejection, G = 2 40 55 70 85 Figure 11. Gain Error vs. Temperature, Normalized at 25°C, G = ½ 30 5 20 COMMON-MODE VOLTAGE (V) 10 0 –5 –10 –15 VS = ±15V 10 0 VS = ±5V –10 –20 REPRESENTATIVE DATA –20 –50 –35 –20 –5 10 25 40 55 70 85 TEMPERATURE (°C) –30 –20 08308-007 CMRR (µV/V) 25 TEMPERATURE (°C) –15 –10 –5 0 5 10 15 20 OUTPUT VOLTAGE (V) Figure 9. CMRR vs. Temperature, Normalized at 25°C, G = ½ Figure 12. Input Common-Mode Voltage vs. Output Voltage, ±15 V and ±5 V Supplies, G = ½ Rev. C | Page 9 of 24 08308-010 –40 08308-006 –60 08308-009 –25 0 AD8278/AD8279 10 5 VREF = MIDSUPPLY VS = 5V VS = 5V 6 4 2 0 VS = 2.7V –2 –4 –6 2.5 3.5 4.5 5.5 1 12 –1 1.5 2.5 3.5 4.5 5.5 Figure 16. Input Common-Mode Voltage vs. Output Voltage, 5 V and 2.7 V Supplies, VREF = Midsupply, G = 2 6 VREF = 0V VS = 5V 5 COMMON-MODE VOLTAGE (V) VS = 5V 8 6 4 2 VS = 2.7V 0 0.5 OUTPUT VOLTAGE (V) VREF = 0V 10 –2 4 3 2 1 VS = 2.7V 0 1.5 2.5 3.5 4.5 5.5 OUTPUT VOLTAGE (V) –2 –0.5 08308-012 0.5 0.5 1.5 2.5 3.5 4.5 5.5 OUTPUT VOLTAGE (V) Figure 14. Input Common-Mode Voltage vs. Output Voltage, 5 V and 2.7 V Supplies, VREF = 0 V, G = ½ Figure 17. Input Common-Mode Voltage vs. Output Voltage, 5 V and 2.7 V Supplies, VREF = 0 V, G = 2 30 18 VS = ±15V 08308-015 –1 –4 12 20 6 GAIN = 2 0 0 GAIN (dB) 10 VS = ±5V –10 –6 GAIN = ½ –12 –18 –24 –20 –30 –20 –15 –10 –5 0 5 10 15 20 OUTPUT VOLTAGE (V) Figure 15. Input Common-Mode Voltage vs. Output Voltage, ±15 V and ±5 V Supplies, G = 2 –36 100 1k 10k 100k 1M FREQUENCY (Hz) Figure 18. Gain vs. Frequency, ±15 V Supplies Rev. C | Page 10 of 24 10M 08308-016 –30 08308-013 COMMON-MODE VOLTAGE (V) VS = 2.7V 0 –3 –0.5 Figure 13. Input Common-Mode Voltage vs. Output Voltage, 5 V and 2.7 V Supplies, VREF = Midsupply, G = ½ COMMON-MODE VOLTAGE (V) 2 08308-014 1.5 08308-011 0.5 OUTPUT VOLTAGE (V) –6 –0.5 3 –2 –8 –10 –0.5 VREF = MIDSUPPLY 4 COMMON-MODE VOLTAGE (V) COMMON-MODE VOLTAGE (V) 8 AD8278/AD8279 18 +VS –0.1 OUTPUT VOLTAGE SWING (V) REFERRED TO SUPPLY VOLTAGES 12 GAIN = 2 6 GAIN = ½ –6 –12 –18 –24 –30 TA = –40°C TA = +25°C TA = +85°C TA = +125°C +0.4 +0.3 +0.2 100k 1M 10M –VS 2 4 6 8 10 12 14 18 16 SUPPLY VOLTAGE (±VS) 08308-020 10k 08308-017 1k FREQUENCY (Hz) Figure 22. Output Voltage Swing vs. Supply Voltage and Temperature, RL = 10 kΩ Figure 19. Gain vs. Frequency, +2.7 V Single Supply 120 +VS –0.2 100 GAIN = ½ 80 60 40 0 1 10 100 1k 10k 100k 1M FREQUENCY (Hz) –0.6 –0.8 –1.0 TA = –40°C TA = +25°C TA = +85°C TA = +125°C –1.2 +1.2 +1.0 +0.8 +0.6 +0.4 +0.2 –VS 08308-018 20 –0.4 2 4 6 8 10 12 14 16 18 SUPPLY VOLTAGE (±VS) 08308-021 OUTPUT VOLTAGE SWING (V) REFERRED TO SUPPLY VOLTAGES GAIN = 2 CMRR (dB) –0.4 +0.1 –36 100 Figure 23. Output Voltage Swing vs. Supply Voltage and Temperature, RL = 2 kΩ Figure 20. CMRR vs. Frequency +VS OUTPUT VOLTAGE SWING (V) REFERRED TO SUPPLY VOLTAGES 120 100 –PSRR 80 60 +PSRR 40 20 0 1 10 100 1k 10k FREQUENCY (Hz) Figure 21. PSRR vs. Frequency 100k 1M –4 –8 TA = –40°C TA = +25°C TA = +85°C TA = +125°C +8 +4 –VS 1k 08308-019 PSRR (dB) –0.3 10k 100k LOAD RESISTANCE (Ω) Figure 24. Output Voltage Swing vs. RL and Temperature, VS = ±15 V Rev. C | Page 11 of 24 08308-022 GAIN (dB) 0 –0.2 AD8278/AD8279 +VS 250 VREF = MIDSUPPLY 200 –1.0 SUPPLY CURRENT (µA) OUTPUT VOLTAGE SWING (V) REFERRED TO SUPPLY VOLTAGES –0.5 –1.5 –2.0 TA = –40°C TA = +25°C TA = +85°C TA = +125°C +2.0 +1.5 150 VS = ±15V 100 VS = +2.7V 50 +1.0 0 1 2 3 4 5 6 7 8 9 10 OUTPUT CURRENT (mA) 0 –50 08308-023 –VS –30 –10 10 30 50 70 90 110 130 TEMPERATURE (°C) Figure 25. Output Voltage Swing vs. IOUT and Temperature, VS = ±15 V 08308-026 +0.5 Figure 28. Supply Current per Channel vs. Temperature 180 30 25 SHORT-CIRCUIT CURRENT (mA) SUPPLY CURRENT (µA) 170 160 150 140 130 20 15 ISHORT+ 10 5 0 –5 –10 ISHORT– 0 2 4 6 8 10 12 14 16 18 SUPPLY VOLTAGE (±V) –20 –50 08308-024 120 –30 –10 10 Figure 26. Supply Current per Channel vs. Dual-Supply Voltage, VIN = 0 V 50 70 90 110 130 Figure 29. Short-Circuit Current per Channel vs. Temperature 180 2.0 –SLEW RATE 1.8 170 1.6 160 SLEW RATE (V/µs) SUPPLY CURRENT (µA) 30 TEMPERATURE (°C) 08308-027 –15 150 140 1.4 +SLEW RATE 1.2 1.0 0.8 0.6 0.4 130 5 10 15 20 25 SUPPLY VOLTAGE (V) 30 35 40 Figure 27. Supply Current per Channel vs. Single-Supply Voltage, VIN = 0 V, VREF = 0 V Rev. C | Page 12 of 24 0 –50 –30 –10 10 30 50 70 90 110 130 TEMPERATURE (°C) Figure 30. Slew Rate vs. Temperature, VIN = 20 V p-p, 1 kHz 08308-028 0 08308-025 0.2 120 AD8278/AD8279 10 8 NONLINEARITY (2ppm/DIV) 6 4 1V/DIV 2 3.64µs TO 0.01% 4.12µs TO 0.001% 0 –2 0.002%/DIV –4 –8 4µs/DIV –4 –3 –2 –1 0 1 2 3 4 5 OUTPUT VOLTAGE (V) TIME (µs) 08308-029 –10 –5 Figure 31. Gain Nonlinearity, VS = ±15 V, RL ≥ 2 kΩ, G = ½ 08308-032 –6 Figure 34. Large Signal Pulse Response and Settling Time, 2 V Step, VS = 2.7 V, G = ½ 20 16 NONLINEARITY (2ppm/DIV) 12 8 5V/DIV 4 7.6µs TO 0.01% 9.68µs TO 0.001% 0 –4 0.002%/DIV –8 –16 40µs/DIV –3 –2 –1 0 1 2 3 4 5 OUTPUT VOLTAGE (V) TIME (µs) Figure 35. Large Signal Pulse Response and Settling Time, 10 V Step, VS = ±15 V, G = 2 Figure 32. Gain Nonlinearity, VS = ±15 V, RL ≥ 2 kΩ, G = 2 1V/DIV 5V/DIV 4.34µs TO 0.01% 5.12µs TO 0.001% 6.24µs TO 0.01% 7.92µs TO 0.001% 0.002%/DIV 0.002%/DIV TIME (µs) 4µs/DIV 08308-031 40µs/DIV TIME (µs) 08308-034 –4 08308-030 –20 –5 08308-033 –12 Figure 36. Large Signal Pulse Response and Settling Time, 2 V Step, VS = 2.7 V Figure 33. Large Signal Pulse Response and Settling Time, 10 V Step, VS = ±15 V, G = ½ Rev. C | Page 13 of 24 AD8278/AD8279 5.0 4.5 VS = 5V 2V/DIV OUTPUT VOLTAGE (V p-p) 4.0 3.5 3.0 VS = 2.7V 2.5 2.0 1.5 1.0 10µs/DIV 0 100 1k 10k 100k 1M FREQUENCY (Hz) 08308-038 08308-035 0.5 Figure 40. Maximum Output Voltage vs. Frequency, VS = 5 V, 2.7 V 5V/DIV 20mV/DIV Figure 37. Large Signal Step Response, G = ½ 08308-036 CL = 100pF CL = 147pF CL = 247pF 10µs/DIV 40µs/DIV Figure 38. Large Signal Step Response, G = 2 08308-039 NO LOAD Figure 41. Small Signal Step Response for Various Capacitive Loads, G = ½ 30 VS = ±15V 20 20mV/DIV 15 10 VS = ±5V CL = 100pF CL = 200pF 5 CL = 247pF CL = 347pF 1k 10k FREQUENCY (Hz) 100k 1M 40µs/DIV 08308-037 0 100 Figure 39. Maximum Output Voltage vs. Frequency, VS = ±15 V, ±5 V 08308-040 OUTPUT VOLTAGE (V p-p) 25 Figure 42. Small Signal Step Response for Various Capacitive Loads, G = 2 Rev. C | Page 14 of 24 AD8278/AD8279 50 GAIN = 2 45 40 ±2V ±5V 30 1µV/DIV OVERSHOOT (%) 35 25 ±15V 20 GAIN = ½ ±18V 15 10 0 50 100 150 200 250 CAPACITIVE LOAD (pF) 1s/DIV 08308-041 0 Figure 46. 0.1 Hz to 10 Hz Voltage Noise Figure 43. Small Signal Overshoot vs. Capacitive Load, RL ≥ 2 kΩ, G = ½ 160 35 140 CHANNEL SEPARATION (dB) 30 ±2V 20 15 ±5V ±15V 10 ±18V 5 2kΩ LOAD 120 100 80 60 40 0 0 50 100 150 200 250 300 350 CAPACITIVE LOAD (pF) 08308-042 20 Figure 44. Small Signal Overshoot vs. Capacitive Load, RL ≥ 2 kΩ, G = 2 1k GAIN = 2 100 10 0.1 1 10 100 1k 10k FREQUENCY (Hz) 100k 08308-043 GAIN = ½ Figure 45. Voltage Noise Density vs. Frequency Rev. C | Page 15 of 24 0 10 100 1k 10k FREQUENCY (Hz) Figure 47. Channel Separation 100k 08308-060 OVERSHOOT (%) 25 NOISE (nV/ Hz) 08308-044 5 AD8278/AD8279 THEORY OF OPERATION CIRCUIT INFORMATION AC Performance Each channel of the AD8278 and AD8279 consists of a low power, low noise op amp and four laser-trimmed on-chip resistors. These resistors can be externally connected to make a variety of amplifier configurations, including difference, noninverting, and inverting configurations. Taking advantage of the integrated resistors of the AD8278 and AD8279 provides the designer with several benefits over a discrete design, including smaller size, lower cost, and better ac and dc performance. Component sizes and trace lengths are much smaller in an IC than on a PCB; therefore, the corresponding parasitic elements are also smaller. This results in better ac performance of the AD8278 and AD8279. For example, the positive and negative input terminals of the AD8278 and AD8279 op amps are intentionally not pinned out. By not connecting these nodes to the traces on the PCB, their capacitance remains low and balanced, resulting in improved loop stability and excellent common-mode rejection over frequency. +VS 7 DRIVING THE AD8278 AND AD8279 AD8278 20kΩ 40kΩ 5 SENSE 6 OUT 1 REF 4 –VS Care should be taken to drive the AD8278 and AD8279 with a low impedance source, for example, another amplifier. Source resistance of even a few kilohms (kΩ) can unbalance the resistor ratios and, therefore, significantly degrade the gain accuracy and common-mode rejection of the AD8278 and AD8279. Because all configurations present several kilohms (kΩ) of input resistance, the AD8278 and AD8279 do not require a high current drive from the source and are easy to drive. Figure 48. Functional Block Diagram INPUT VOLTAGE RANGE DC Performance Much of the dc performance of op amp circuits depends on the accuracy of the surrounding resistors. Using superposition to analyze a typical difference amplifier circuit, as is shown in Figure 49, the output voltage is found to be ⎛ R2 ⎞⎛ ⎟ 1 + R4 ⎞⎟ − V IN − ⎛⎜ R4 ⎞⎟ VOUT = V IN + ⎜ ⎜ R1 + R2 ⎟⎜⎝ R3 ⎠ ⎝ R3 ⎠ ⎠ ⎝ This equation demonstrates that the gain accuracy and commonmode rejection ratio of the AD8278 and AD8279 is determined primarily by the matching of resistor ratios. Even a 0.1% mismatch in one resistor degrades the CMRR to 69 dB for a G = 2 difference amplifier. The AD8278 and AD8279 are able to measure input voltages beyond the supply rails. The internal resistors divide down the voltage before it reaches the internal op amp and provide protection to the op amp inputs. Figure 49 shows an example of how the voltage division works in a difference amplifier configuration. For the AD8278 and AD8279 to measure correctly, the input voltages at the input nodes of the internal op amp must stay below 1.5 V of the positive supply rail and can exceed the negative supply rail by 0.1 V. Refer to the Power Supplies section for more details. R2 (V ) R1 + R2 IN+ R4 VIN– The difference amplifier output voltage equation can be reduced to VOUT = VIN+ R4 (VIN + − VIN − ) R3 R3 R1 R2 as long as the following ratio of the resistors is tightly matched: R2 R4 = R1 R3 The resistors on the AD8278 and AD8279 are laser trimmed to match accurately. As a result, the AD8278 and AD8279 provide superior performance over a discrete solution, enabling better CMRR, gain accuracy, and gain drift, even over a wide temperature range. R2 (V ) R1 + R2 IN+ 08308-062 +IN 3 20kΩ 08308-045 –IN 2 40kΩ Figure 49. Voltage Division in the Difference Amplifier Configuration The AD8278 and AD8279 have integrated ESD diodes at the inputs that provide overvoltage protection. This feature simplifies system design by eliminating the need for additional external protection circuitry and enables a more robust system. The voltages at any of the inputs of the parts can safely range from +VS − 40 V up to −VS + 40 V. For example, on ±10 V supplies, input voltages can go as high as ±30 V. Care should be taken to not exceed the +VS − 40 V to −VS + 40 V input limits to avoid damaging the parts. Rev. C | Page 16 of 24 AD8278/AD8279 The AD8278 and AD8279 are typically specified at single and dual supplies, but they can be used with unbalanced supplies as well; for example, −VS = −5 V, +VS = +20 V. The difference between the two supplies must be kept below 36 V. The positive supply rail must be at least 2 V above the negative supply. The AD8278 and AD8279 operate extremely well over a very wide range of supply voltages. They can operate on a single supply as low as 2 V and as high as 36 V, under appropriate setup conditions. R1 (V ) R1 + R2 REF For best performance, the user should ensure that the internal op amp is biased correctly. The internal input terminals of the op amp must have sufficient voltage headroom to operate properly. Proper operation of the part requires at least 1.5 V between the positive supply rail and the op amp input terminals. This relationship is expressed in the following equation: R4 R3 R1 R2 VREF R1 (V ) R1 + R2 REF R1 V REF < + VS − 1.5 V R1 + R2 08308-046 POWER SUPPLIES Figure 50. Ensure Sufficient Voltage Headroom on the Internal Op Amp Inputs For example, when operating on a +VS= 2 V single supply and VREF = 0 V, it can be seen from Figure 50 that the op amp input terminals are biased at 0 V, allowing more than the required 1.5 V headroom. However, if VREF = 1 V under the same conditions, the input terminals of the op amp are biased at 0.66 V (G = ½). Now the op amp does not have the required 1.5 V headroom and cannot function. Therefore, the user must increase the supply voltage or decrease VREF to restore proper operation. Use a stable dc voltage to power the AD8278 and AD8279. Noise on the supply pins can adversely affect performance. Place a bypass capacitor of 0.1 μF between each supply pin and ground, as close as possible to each supply pin. Use a tantalum capacitor of 10 μF between each supply and ground. It can be farther away from the supply pins and, typically, it can be shared by other precision integrated circuits. Rev. C | Page 17 of 24 AD8278/AD8279 APPLICATIONS INFORMATION –IN The AD8278 and AD8279 can be configured in several ways (see Figure 51 to Figure 57). These configurations have excellent gain accuracy and gain drift because they rely on the internal matched resistors. Note that Figure 53 shows the AD8278 and AD8279 as difference amplifiers with a midsupply reference voltage at the noninverting input. This allows the AD8278 and AD8279 to be used as a level shifter, which is appropriate in single-supply applications that are referenced to midsupply. Table 10 lists several single-ended amplifier configurations that are not illustrated. 5 20kΩ +IN 1 20kΩ 3 40kΩ 20kΩ AD8278 IN 2 40kΩ 5 OUT 6 20kΩ AD8278 VOUT = –½VIN Figure 55. Inverting Amplifier, Gain = −½ 1 08308-047 2 40kΩ 5 OUT 1 20kΩ IN 2 3 40kΩ AD8278 OUT 6 20kΩ 6 Figure 51. Difference Amplifier, Gain = ½ 40kΩ 20kΩ 3 40kΩ AD8278 5 20kΩ VREF = MIDSUPPLY Figure 54. Difference Amplifier, Gain = 2, Referenced to Midsupply OUT VOUT = ½ (VIN+ − VIN−) –IN 3 VOUT = 2 (VIN+ − VIN−) + VREF 5 6 +IN 40kΩ 08308-051 20kΩ OUT 08308-052 2 40kΩ 2 6 1 –IN 40kΩ 08308-050 CONFIGURATIONS VOUT = 1.5VIN Figure 56. Noninverting Amplifier, Gain = 1.5 40kΩ 3 5 20kΩ AD8278 40kΩ 08308-048 +IN 1 20kΩ VOUT = 2(VIN+ − VIN−) 2 6 OUT Figure 52. Difference Amplifier, Gain = 2 2 40kΩ 20kΩ IN 5 6 OUT 1 20kΩ 40kΩ 3 AD8278 VOUT = 2VIN 08308-053 –IN Figure 57. Noninverting Amplifier, Gain = 2 3 40kΩ 20kΩ AD8278 VOUT = ½ (VIN+ − VIN−) + VREF 1 VREF = MIDSUPPLY 08308-049 +IN Figure 53. Difference Amplifier, Gain = ½, Referenced to Midsupply Table 10. AD8278 Difference and Single-Ended Amplifier Configurations Amplifier Configuration Difference Amplifier Difference Amplifier Single-Ended Inverting Amplifier Single-Ended Inverting Amplifier Single-Ended Noninverting Amplifier Single-Ended Noninverting Amplifier Single-Ended Noninverting Amplifier Single-Ended Noninverting Amplifier Single-Ended Noninverting Amplifier Single-Ended Noninverting Amplifier Signal Gain +½ +2 −½ −2 +3⁄2 +3 +½ +1 +1 +2 Pin 1 (REF) GND IN+ GND GND IN IN GND IN GND IN Rev. C | Page 18 of 24 Pin 2 (VIN−) IN− OUT IN OUT GND OUT GND GND OUT OUT Pin 3 (VIN+) IN+ GND GND GND IN IN IN GND IN GND Pin 5 (SENSE) OUT IN− OUT IN OUT GND OUT OUT GND GND AD8278/AD8279 The reference must be driven with a low impedance source to maintain the internal resistor ratio. An example using the low power, low noise OP1177 as a reference is shown in Figure 58. INCORRECT CORRECT AD8278 AD8278 REF REF V INSTRUMENTATION AMPLIFIER The AD8278 and AD8279 can be used as building blocks for a low power, low cost instrumentation amplifier. An instrumentation amplifier provides high impedance inputs and delivers high common-mode rejection. Combining the AD8278 with an Analog Devices, Inc., low power amplifier (see Table 11) creates a precise, power efficient voltage measurement solution suitable for power critical systems. V –IN A1 + 20kΩ RG Figure 58. Driving the Reference Pin RF DIFFERENTIAL OUTPUT A2 VDIFF_OUT = V+OUT − V−OUT = 2 × GAD8279 × (VIN+ – VIN−) If the AD8279 amplifiers are each configured for G = ½, the differential gain is 1×; if the AD8279 amplifiers are each configured for G = 2, the differential gain is 4×. +VS 11 AD8279 12 20kΩ 40kΩ 2 13 +IN 14 10 20kΩ 40kΩ 20kΩ 40kΩ REF Figure 60. Low Power Precision Instrumentation Amplifier Table 11. Low Power Op Amps Op Amp (A1, A2) AD8506 AD8607 AD8617 AD8667 It is preferable to use dual op amps for the high impedance inputs because they have better matched performance and track each other over temperature. The AD8278 and AD8279 difference amplifiers cancel out common-mode errors from the input op amps, if they track each other. The differential gain accuracy of the in-amp is proportional to how well the input feedback resistors (RF) match each other. The CMRR of the in-amp increases as the differential gain is increased (1 + 2RF/RG), but a higher gain also reduces the common-mode voltage range. 6 20kΩ 40kΩ 4 –VS Features Dual micropower op amp Precision dual micropower op amp Low cost CMOS micropower op amp Dual precision CMOS micropower op amp Refer to A Designer’s Guide to Instrumentation Amplifiers for more design ideas and considerations at www.analog.com, under Technical Documentation. 3 9 8 +OUT AD8278/ AD8279 VOUT = (1 + 2RF/RG) (VIN+ – VIN–) × 2 –OUT 5 08308-061 –IN 40kΩ +IN The two difference amplifiers of the AD8279 can be configured to provide a differential output, as shown in Figure 59. This differential output configuration is suitable for various applications, such as strain gage excitation and single-ended-to-differential conversion. The differential output voltage has a gain twice that of a single AD8279 channel, as shown in the following equation: VOUT 20kΩ 08308-056 08308-054 – 40kΩ RF OP1177 Figure 59. AD8279 Differential Output G = 4 Configuration Rev. C | Page 19 of 24 AD8278/AD8279 OUTLINE DIMENSIONS 5.00 (0.1968) 4.80 (0.1890) 8 4.00 (0.1574) 3.80 (0.1497) 5 1 4 1.27 (0.0500) BSC 0.25 (0.0098) 0.10 (0.0040) 6.20 (0.2441) 5.80 (0.2284) 1.75 (0.0688) 1.35 (0.0532) 0.51 (0.0201) 0.31 (0.0122) COPLANARITY 0.10 SEATING PLANE 0.50 (0.0196) 0.25 (0.0099) 45° 8° 0° 0.25 (0.0098) 0.17 (0.0067) 1.27 (0.0500) 0.40 (0.0157) 012407-A COMPLIANT TO JEDEC STANDARDS MS-012-AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. Figure 61. 8-Lead Standard Small Outline Package [SOIC_N] Narrow Body (R-8) Dimensions shown in millimeters and (inches) 3.20 3.00 2.80 3.20 3.00 2.80 8 1 5.15 4.90 4.65 5 4 PIN 1 IDENTIFIER 0.65 BSC 0.95 0.85 0.75 15° MAX 1.10 MAX 0.40 0.25 6° 0° 0.23 0.09 COMPLIANT TO JEDEC STANDARDS MO-187-AA Figure 62. 8-Lead Mini Small Outline Package [MSOP] (RM-8) Dimensions shown in millimeters Rev. C | Page 20 of 24 0.80 0.55 0.40 10-07-2009-B 0.15 0.05 COPLANARITY 0.10 AD8278/AD8279 8.75 (0.3445) 8.55 (0.3366) 8 14 1 7 1.27 (0.0500) BSC 0.25 (0.0098) 0.10 (0.0039) COPLANARITY 0.10 0.51 (0.0201) 0.31 (0.0122) 6.20 (0.2441) 5.80 (0.2283) 0.50 (0.0197) 0.25 (0.0098) 1.75 (0.0689) 1.35 (0.0531) SEATING PLANE 45° 8° 0° 0.25 (0.0098) 0.17 (0.0067) 1.27 (0.0500) 0.40 (0.0157) COMPLIANT TO JEDEC STANDARDS MS-012-AB CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. 060606-A 4.00 (0.1575) 3.80 (0.1496) Figure 63. 14-Lead Standard Small Outline Package [SOIC_N] Narrow Body (R-14) Dimensions shown in millimeters and (inches) ORDERING GUIDE Model 1 AD8278ARZ AD8278ARZ-R7 AD8278ARZ-RL AD8278BRZ AD8278BRZ-R7 AD8278BRZ-RL AD8278ARMZ AD8278ARMZ-R7 AD8278ARMZ-RL AD8278BRMZ AD8278BRMZ-R7 AD8278BRMZ-RL AD8279ARZ AD8279ARZ-R7 AD8279ARZ-RL AD8279BRZ AD8279BRZ-R7 AD8279BRZ-RL 1 Temperature Range −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C Package Description 8-Lead SOIC_N 8-Lead SOIC_N, 7" Tape and Reel 8-Lead SOIC_N, 13" Tape and Reel 8-Lead SOIC_N 8-Lead SOIC_N, 7" Tape and Reel 8-Lead SOIC_N, 13" Tape and Reel 8-Lead MSOP 8-Lead MSOP, 7" Tape and Reel 8-Lead MSOP, 13" Tape and Reel 8-Lead MSOP 8-Lead MSOP, 7" Tape and Reel 8-Lead MSOP, 13" Tape and Reel 14-Lead SOIC_N 14-Lead SOIC_N, 7" Tape and Reel 14-Lead SOIC_N, 13" Tape and Reel 14-Lead SOIC_N 14-Lead SOIC_N, 7" Tape and Reel 14-Lead SOIC_N, 13" Tape and Reel Z = RoHS Compliant Part. Rev. C | Page 21 of 24 Package Option R-8 R-8 R-8 R-8 R-8 R-8 RM-8 RM-8 RM-8 RM-8 RM-8 RM-8 R-14 R-14 R-14 R-14 R-14 R-14 Branding Y21 Y21 Y21 Y22 Y22 Y22 AD8278/AD8279 NOTES Rev. C | Page 22 of 24 AD8278/AD8279 NOTES Rev. C | Page 23 of 24 AD8278/AD8279 NOTES ©2009–2011 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D08308-0-1/11(C) Rev. C | Page 24 of 24