Preliminary Technical Data Low Power, Wide Supply Range, Low Cost Difference Amplifiers, G = ½, 2 AD8279 FEATURES FUNCTIONAL BLOCK DIAGRAM Wide input range beyond supplies Rugged input overvoltage protection Low supply current: 200 μA maximum Low power dissipation: 0.5 mW at VS = 2.5 V Bandwidth: 1 MHz (G = ½) CMRR: 80 dB minimum, dc to 20 kHz (G = ½) Low offset voltage drift: ±2 μV/°C maximum (B Grade) Low gain drift: 1 ppm/°C maximum (B Grade) Enhanced slew rate: 1.4 V/μs Wide power supply range: Single supply: 2 V to 36 V Dual supplies: ±2 V to ±18 V APPLICATIONS Voltage measurement and monitoring Current measurement and monitoring Instrumentation amplifier building block Portable, battery-powered equipment Test and measurement GENERAL DESCRIPTION The AD8279 consists of two general-purpose difference amplifiers intended for precision signal conditioning in power critical applications that require both high performance and low power. The AD8279 provides exceptional common-mode rejection ratio (80 dB) and high bandwidth while amplifying signals well beyond the supply rails. The on-chip resistors are laser-trimmed for excellent gain accuracy and high CMRR. They also have extremely low gain drift vs. temperature. The common-mode range of the amplifiers extend to almost triple the supply voltage (for G = ½), making them ideal for single-supply applications that require a high common-mode voltage range. The internal resistors and ESD circuitry at the inputs also provide overvoltage protection to the op amp. The AD8279 can be used as difference amplifiers with G = ½ or G = 2. It can also be connected in a high precision, single-ended configuration for non-inverting and inverting gains of −½, −2, +3, +2, +1½, +1, or +½. The AD8279 provide an integrated precision solution that has a smaller size, lower cost, and better performance than a discrete alternative. Figure 1. The AD8279 operates on single supplies (2.0 V to 36 V) or dual supplies (±2 V to ±18 V). The maximum quiescent supply current is 200 μA per channel, which is ideal for battery-operated and portable systems. The AD8279 is available in a 14-lead SOIC package. It is specified for performance over the industrial temperature range of −40°C to +85°C and are fully RoHS compliant. Table 1. Difference Amplifiers by Category Low Distortion AD8270 AD8271 AD8273 AD8274 AMP03 1 High Voltage AD628 AD629 Current Sensing1 AD8202 (U) AD8203 (U) AD8205 (B) AD8206 (B) AD8216 (B) Low Power AD8276 AD8277 AD8278 AD8279 U = unidirectional, B = bidirectional. Rev. PrA Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2009 Analog Devices, Inc. All rights reserved. AD8279 Preliminary Technical Data TABLE OF CONTENTS Features .............................................................................................. 1 ESD Caution...................................................................................7 Applications ....................................................................................... 1 Pin Configurations and Function Descriptions ............................8 General Description ......................................................................... 1 Typical Performance Characteristics ..............................................9 Functional Block Diagram .............................................................. 1 Theory of Operation ...................................................................... 16 Revision History ............................................................................... 2 Circuit Information.................................................................... 16 Specifications..................................................................................... 3 Driving the AD8279................................................................... 16 Absolute Maximum Ratings............................................................ 7 Input Voltage Range ................................................................... 16 Thermal Resistance ...................................................................... 7 Power Supplies ............................................................................ 17 Maximum Power Dissipation ..................................................... 7 Outline Dimensions ....................................................................... 18 Short-Circuit Current .................................................................. 7 REVISION HISTORY Rev. PrA | Page 2 of 18 Preliminary Technical Data AD8279 SPECIFICATIONS VS = ±5 V to ±15 V, VREF = 0 V, TA = 25°C, RL = 10 kΩ connected to ground, G = ½ difference amplifier configuration, unless otherwise noted. Table 2. G=½ Parameter INPUT CHARACTERISTICS System Offset1 vs. Temperature Average Temperature Coefficient vs. Power Supply Common-Mode Rejection Ratio (RTI) Input Voltage Range2 Impedance3 Differential Common Mode DYNAMIC PERFORMANCE Bandwidth Slew Rate Settling Time to 0.01% Settling Time to 0.001% Channel Separation GAIN Gain Error Gain Drift Gain Nonlinearity OUTPUT CHARACTERISTICS Output Voltage Swing4 Short-Circuit Current Limit Capacitive Load Drive NOISE5 Output Voltage Noise POWER SUPPLY Supply Current6 vs. Temperature Operating Voltage Range7 TEMPERATURE RANGE Operating Range Conditions Min Grade B Typ Max 50 250 250 μV μV 0.3 1 2.5 2 5 5 μV/°C μV/V +3(VS − 1.5) 74 −3(VS + 0.1) 120 30 1 1.4 10 V step on output, CL = 100 pF 130 0.005 TA = −40°C to +85°C VOUT = 20 V p-p VS = ±15 V, RL = 10 kΩ TA = −40°C to +85°C 1.1 dB +3(VS − 1.5) V 120 30 kΩ kΩ 1 1.4 MHz V/μs 9 10 f = 1 kHz −VS + 0.2 0.02 1 5 +VS − 0.2 1.4 47 9 10 μs μs dB 0.05 5 10 % ppm/°C ppm +VS − 0.2 V mA pF 130 0.01 −VS + 0.2 ±15 200 f = 0.1 Hz to 10 Hz f = 1 kHz Unit 100 100 80 −3(VS + 0.1) 1.1 Grade A Typ Max 50 TA = −40°C to +85°C TA = −40°C to +85°C VS = ±5 V to ±18 V VS = ±15 V, VCM = ±27 V, RS = 0 Ω Min ±15 200 1.4 47 50 50 μV p-p nV/√Hz μA μA V °C ±2 200 250 ±18 ±2 200 250 ±18 −40 +125 −40 +125 TA = −40°C to +85°C 1 Includes input bias and offset current errors, RTO (referred to output) The input voltage range may also be limited by absolute maximum input voltage or by the output swing. See the Input Voltage Range section in the Theory of Operation for details. 3 Internal resistors are trimmed to be ratio matched and have ±20% absolute accuracy. 4 Output voltage swing varies with supply voltage and temperature. See Figure 19 through Figure 22 for details. 5 Includes amplifier voltage and current noise, as well as noise from internal resistors. 6 Supply current varies with supply voltage and temperature. See Figure 23 and Figure 25 for details. 7 Unbalanced dual supplies can be used, such as −VS = −0.5 V and +VS = +2 V. The positive supply rail must be at least 2 V above the negative supply and reference voltage. 2 Rev. PrA | Page 3 of 18 AD8279 Preliminary Technical Data VS = ±5 V to ±15 V, VREF = 0 V, TA = 25°C, RL = 10 kΩ connected to ground, G = 2 difference amplifier configuration, unless otherwise noted. Table 3. G=2 Parameter INPUT CHARACTERISTICS System Offset1 vs. Temperature Average Temperature Coefficient vs. Power Supply Common-Mode Rejection Ratio (RTI) Input Voltage Range2 Impedance3 Differential Common Mode DYNAMIC PERFORMANCE Bandwidth Slew Rate Settling Time to 0.01% Settling Time to 0.001% Channel Separation GAIN Gain Error Gain Drift Gain Nonlinearity OUTPUT CHARACTERISTICS Output Voltage Swing4 Short-Circuit Current Limit Capacitive Load Drive NOISE5 Output Voltage Noise POWER SUPPLY Supply Current6 vs. Temperature Operating Voltage Range7 TEMPERATURE RANGE Operating Range Conditions Grade B Typ Max Min 100 500 500 μV μV 0.6 2 5 2 5 10 μV/°C μV/V +1.5(VS − 1.5) dB V 80 +1.5(VS − 1.5) −1.5(VS + 0.1) 120 30 550 1.4 10 V step on output, CL = 100 pF 1.1 130 kΩ kΩ 550 1.4 kHz V/μs 0.005 0.02 1 VOUT = 20 V p-p 5 −VS + 0.2 +VS − 0.2 0.01 −VS + 0.2 ±15 350 f = 0.1 Hz to 10 Hz f = 1 kHz 2.8 90 10 11 μs μs dB 0.05 5 10 % ppm/° C ppm +VS − 0.2 V 130 TA = −40°C to +85°C VS = ±15 V, RL = 10 kΩ TA = −40°C to +85°C 120 30 10 11 f = 1 kHz ±15 350 2.8 90 95 mA pF 95 μV p-p nV/√Hz μA μA V °C ±2 200 250 ±18 ±2 200 250 ±18 −40 +125 −40 +125 TA = −40°C to +85°C Unit 200 200 86 −1.5(VS + 0.1) 1.1 Grade A Typ Max 100 TA = −40°C to +85°C TA = −40°C to +85°C VS = ±5 V to ±18 V VS = ±15 V, VCM = ±27 V, RS = 0 Ω Min 1 Includes input bias and offset current errors, RTO (referred to output). The input voltage range may also be limited by absolute maximum input voltage or by the output swing. See the Input Voltage Range section in the Theory of Operation for details. 3 Internal resistors are trimmed to be ratio matched and have ±20% absolute accuracy. 4 Output voltage swing varies with supply voltage and temperature. See Figure 19 through Figure 22 for details. 5 Includes amplifier voltage and current noise, as well as noise from internal resistors. 6 Supply current varies with supply voltage and temperature. See Figure 23 and Figure 25 for details. 7 Unbalanced dual supplies can be used, such as −VS = −0.5 V and +VS = +2 V. The positive supply rail must be at least 2 V above the negative supply and reference voltage. 2 Rev. PrA | Page 4 of 18 Preliminary Technical Data AD8279 VS = +2.7 V to <±5 V, VREF = midsupply, TA = 25°C, RL = 10 kΩ connected to midsupply, G = ½ difference amplifier configuration, unless otherwise noted. Table 4. G=½ Parameter INPUT CHARACTERISTICS System Offset1 vs. Temperature Average Temperature Coefficient vs. Power Supply Common-Mode Rejection Ratio (RTI) Input Voltage Range2 Impedance3 Differential Common Mode DYNAMIC PERFORMANCE Bandwidth Slew Rate Settling Time to 0.01% Channel Separation GAIN Gain Error Gain Drift OUTPUT CHARACTERISTICS Output Swing4 Short-Circuit Current Limit Capacitive Load Drive NOISE5 Output Voltage Noise POWER SUPPLY Supply Current6 Operating Voltage Range TEMPERATURE RANGE Operating Range Conditions Grade B Typ Max Min 75 250 250 μV μV 0.3 1 2.5 2 5 5 μV/°C μV/V 74 80 −3(VS + 0.1) +3(VS − 1.5) 74 −3(VS + 0.1) +3(VS − 1.5) dB V 120 30 kΩ kΩ 870 1.3 870 1.3 kHz V/μs 7 130 7 130 μs dB 0.005 −VS + 0.1 0.02 1 +VS − 0.15 0.01 −VS + 0.1 ±10 200 1.4 47 TA = −40°C to +85°C dB 120 30 TA = −40°C to +85°C f = 0.1 Hz to 10 Hz f = 1 kHz Unit 150 150 80 2 V step on output, CL = 100 pF, VS = 2.7 V f = 1 kHz RL = 10 kΩ , TA = −40°C to +85°C Grade A Typ Max 75 TA = −40°C to +85°C TA = −40°C to +85°C VS = ±5 V to ±18 V VS = 2.7 V, VCM = 0 V to 2.4 V, RS = 0 Ω VS = ±5 V, VCM = −10 V to +7 V, RS = 0 Ω Min 0.05 5 % ppm/°C +VS − 0.15 V mA pF ±10 200 1.4 47 50 50 μV p-p nV/√Hz 2.0 200 36 2.0 200 36 μA V −40 +125 −40 +125 °C 1 Includes input bias and offset current errors, RTO (referred to output). The input voltage range may also be limited by absolute maximum input voltage or by the output swing. See the Input Voltage Range section in the Theory of Operation section for details. 3 Internal resistors are trimmed to be ratio matched and have ±20% absolute accuracy. 4 Output voltage swing varies with supply voltage and temperature. See Figure 19 through Figure 22 for details. 5 Includes amplifier voltage and current noise, as well as noise from internal resistors. 6 Supply current varies with supply voltage and temperature. See Figure 24 and Figure 25 for details. 2 Rev. PrA | Page 5 of 18 AD8279 Preliminary Technical Data VS = +2.7 V to <±5 V, VREF = midsupply, TA = 25°C, RL = 10 kΩ connected to midsupply, G = 2 difference amplifier configuration, unless otherwise noted. Table 5. G=2 Parameter INPUT CHARACTERISTICS System Offset1 vs. Temperature Average Temperature Coefficient vs. Power Supply Common-Mode Rejection Ratio (RTI) Input Voltage Range2 Impedance3 Differential Common Mode DYNAMIC PERFORMANCE Bandwidth Slew Rate Settling Time to 0.01% Channel Separation GAIN Gain Error Gain Drift OUTPUT CHARACTERISTICS Output Swing4 Short-Circuit Current Limit Capacitive Load Drive NOISE5 Output Voltage Noise POWER SUPPLY Supply Current6 Operating Voltage Range TEMPERATURE RANGE Operating Range Conditions Grade B Typ Max Min 150 500 500 μV μV 0.6 2 5 3 5 10 μV/°C μV/V 80 86 −1.5(VS + 0.1) dB 80 +1.5(VS − 1.5) −1.5(VS + 0.1) dB +1.5(VS − 1.5) V 120 30 120 30 kΩ kΩ 450 1.3 450 1.3 kHz V/μs 9 130 9 130 μs dB 0.005 TA = −40°C to +85°C −VS + 0.1 0.02 1 +VS − 0.15 0.01 −VS + 0.1 ±10 200 f = 0.1 Hz to 10 Hz f = 1 kHz Unit 300 300 86 2 V step on output, CL = 100 pF, VS = 2.7 V f = 1 kHz RL = 10 kΩ, TA = −40°C to +85°C Grade A Typ Max 150 TA = −40°C to +85°C TA = −40°C to +85°C VS = ±5 V to ±18 V VS = 2.7 V, VCM = 0 V to 2.4 V, RS = 0 Ω VS = ±5 V, VCM = −10 V to +7 V, RS = 0 Ω Min 2.8 94 TA = −40°C to +85°C 0.05 5 % ppm/°C +VS − 0.15 V mA pF ±10 200 2.8 94 100 100 μV p-p nV/√Hz 2.0 200 36 2.0 220 36 μA V −40 +125 −40 +125 °C 1 Includes input bias and offset current errors, RTO (referred to output). The input voltage range may also be limited by absolute maximum input voltage or by the output swing. See the Input Voltage Range section in the Theory of Operation section for details. 3 Internal resistors are trimmed to be ratio matched and have ±20% absolute accuracy. 4 Output voltage swing varies with supply voltage and temperature. See Figure 19 through Figure 22 for details. 5 Includes amplifier voltage and current noise, as well as noise from internal resistors. 6 Supply current varies with supply voltage and temperature. See Figure 24 and Figure 25 for details. 2 Rev. PrA | Page 6 of 18 Preliminary Technical Data AD8279 ABSOLUTE MAXIMUM RATINGS 2.0 Table 6. Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. THERMAL RESISTANCE Table 7. Thermal Resistance θJA 105 14-LEAD SOIC θJA = 105°C/W 1.2 8-LEAD SOIC θJA = 121°C/W 0.8 8-LEAD MSOP θJA = 135°C/W 0.4 0 –50 –25 0 25 50 75 100 125 AMBIENT TEMERATURE (°C) Figure 2. Maximum Power Dissipation vs. Ambient Temperature SHORT-CIRCUIT CURRENT The AD8279 has built-in, short-circuit protection that limits the output current (see Figure 26 for more information). While the short-circuit condition itself does not damage the part, the heat generated by the condition can cause the part to exceed its maximum junction temperature, with corresponding negative effects on reliability. Figure 2 and Figure 26, combined with knowledge of the supply voltages and ambient temperature of the part can be used to determine whether a short circuit will cause the part to exceed its maximum junction temperature. The θJA values in Table 7 assume a 4-layer JEDEC standard board with zero airflow. Package Type 14-Lead SOIC 1.6 07692-002 Rating ±18 V −VS + 40 V +VS − 40 V −65°C to +150°C −40°C to +85°C 150°C MAXIMUM POWER DISSIPATION (W) TJ MAX = 150°C Parameter Supply Voltage Maximum Voltage at Any Input Pin Minimum Voltage at Any Input Pin Storage Temperature Range Specified Temperature Range Package Glass Transition Temperature (TG) Unit °C/W MAXIMUM POWER DISSIPATION The maximum safe power dissipation for the AD8279 is limited by the associated rise in junction temperature (TJ) on the die. At approximately 150°C, which is the glass transition temperature, the properties of the plastic change. Even temporarily exceeding this temperature limit may change the stresses that the package exerts on the die, permanently shifting the parametric performance of the amplifiers. Exceeding a temperature of 150°C for an extended period may result in a loss of functionality. ESD CAUTION Rev. PrA | Page 7 of 18 AD8279 Preliminary Technical Data PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS NC 1 –INA 2 +INA 3 14 REFA AD8279 AD8277 13 OUTA 12 SENSEA TOP VIEW 11 +VS (Not to Scale) +INB 5 10 SENSEB –INB 6 9 OUTB NC 7 8 REFB NC = NO CONNECT 07692-053 –VS 4 Figure 3. AD8279 14-Lead SOIC Pin Configuration Table 8. AD8279 Pin Function Descriptions Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 Mnemonic NC −INA +INA −VS +INB −INB NC REFB OUTB SENSEB +VS SENSEA OUTA REFA Description No Connect. Channel A Inverting Input. Channel A Noninverting Input. Negative Supply. Channel B Noninverting Input. Channel B Inverting Input. No Connect. Channel B Reference Voltage Input. Channel B Output. Channel B Sense Terminal. Positive Supply. Channel A Sense Terminal. Channel A Output. Channel A Reference Voltage Input. Rev. PrA | Page 8 of 18 Preliminary Technical Data AD8279 TYPICAL PERFORMANCE CHARACTERISTICS VS = ±15 V, TA = 25°C, RL = 10 kΩ connected to ground, G = ½ difference amplifier configuration, unless otherwise noted. 600 80 N = 3840 MEAN = –16.8 SD = 41.7673 60 500 SYSTEM OFFSET (µV) NUMBER OF HITS 40 400 300 200 20 0 –20 –40 –60 100 –150 –100 –50 0 50 100 REPRESENTATIVE DATA –100 –50 –35 –20 –5 10 08308-005 0 150 SYSTEM OFFSET VOLTAGE (µV) Figure 4. Distribution of Typical System Offset Voltage, G = 2 800 40 55 70 85 Figure 7. System Offset vs. Temperature, Normalized at 25°, G = ½ 20 N = 3837 MEAN = 7.78 SD = 13.569 700 25 TEMPERATURE (°C) 08308-008 –80 15 10 GAIN ERROR (µV/V) NUMBER OF HITS 600 500 400 300 5 0 –5 –10 –15 200 –20 100 –20 0 20 40 60 REPRESENTATIVE DATA –30 –50 –35 –20 –5 10 CMRR (µV/V) Figure 5. Distribution of Typical Common-Mode Rejection, G = 2 40 55 70 85 Figure 8. Gain Error vs. Temperature, Normalized at 25°C, G = ½ 30 5 20 COMMON-MODE VOLTAGE (V) 10 0 –5 –10 –15 VS = ±15V 10 0 VS = ±5V –10 –20 REPRESENTATIVE DATA –20 –50 –35 –20 –5 10 25 40 55 70 85 TEMPERATURE (°C) 08308-007 CMRR (µV/V) 25 TEMPERATURE (°C) Figure 6. CMRR vs. Temperature, Normalized at 25°C, G = ½ –30 –20 –15 –10 –5 0 5 10 15 20 OUTPUT VOLTAGE (V) Figure 9. Input Common-Mode Voltage vs. Output Voltage, ±15 V and ±5 V Supplies, G = ½ Rev. PrA | Page 9 of 18 08308-010 –40 08308-006 –60 08308-009 –25 0 AD8279 Preliminary Technical Data 10 5 VREF = MIDSUPPLY VS = 5V VS = 5V 6 4 2 0 VS = 2.7V –2 –4 –6 2.5 3.5 4.5 5.5 1 12 –1 1.5 2.5 3.5 4.5 5.5 Figure 13. Input Common-Mode Voltage vs. Output Voltage, 5 V and 2.7 V Supplies, VREF = Midsupply, G = 2 6 VREF = 0V VS = 5V 5 COMMON-MODE VOLTAGE (V) VS = 5V 8 6 4 2 VS = 2.7V 0 0.5 OUTPUT VOLTAGE (V) VREF = 0V 10 –2 4 3 2 1 VS = 2.7V 0 1.5 2.5 3.5 4.5 5.5 OUTPUT VOLTAGE (V) –2 –0.5 08308-012 0.5 0.5 1.5 2.5 3.5 4.5 5.5 OUTPUT VOLTAGE (V) Figure 11. Input Common-Mode Voltage vs. Output Voltage, 5 V and 2.7 V Supplies, VREF = 0 V, G = ½ Figure 14. Input Common-Mode Voltage vs. Output Voltage, 5 V and 2.7 V Supplies, VREF = 0 V, G = 2 30 18 VS = ±15V 08308-015 –1 –4 12 20 6 GAIN = 2 0 0 GAIN (dB) 10 VS = ±5V –10 –6 GAIN = ½ –12 –18 –24 –20 –30 –20 –15 –10 –5 0 5 10 15 20 OUTPUT VOLTAGE (V) Figure 12. Input Common-Mode Voltage vs. Output Voltage, ±15 V and ±5 V Supplies, G = 2 –36 100 1k 10k 100k 1M FREQUENCY (Hz) Figure 15. Gain vs. Frequency, ±15 V Supplies Rev. PrA | Page 10 of 18 10M 08308-016 –30 08308-013 COMMON-MODE VOLTAGE (V) VS = 2.7V 0 –3 –0.5 Figure 10. Input Common-Mode Voltage vs. Output Voltage, 5 V and 2.7 V Supplies, VREF = Midsupply, G = ½ COMMON-MODE VOLTAGE (V) 2 08308-014 1.5 08308-011 0.5 OUTPUT VOLTAGE (V) –6 –0.5 3 –2 –8 –10 –0.5 VREF = MIDSUPPLY 4 COMMON-MODE VOLTAGE (V) COMMON-MODE VOLTAGE (V) 8 Preliminary Technical Data AD8279 18 +VS –0.1 OUTPUT VOLTAGE SWING (V) REFERRED TO SUPPLY VOLTAGES 12 GAIN = 2 6 GAIN = ½ –6 –12 –18 –24 –30 TA = –40°C TA = +25°C TA = +85°C TA = +125°C +0.4 +0.3 +0.2 100k 1M 10M –VS 2 4 6 8 10 12 14 16 18 SUPPLY VOLTAGE (±VS) 08308-020 10k 08308-017 1k FREQUENCY (Hz) Figure 19. Output Voltage Swing vs. Supply Voltage and Temperature, RL = 10 kΩ Figure 16. Gain vs. Frequency, +2.7 V Single Supply 120 +VS –0.2 100 GAIN = ½ 80 60 40 0 1 10 100 1k 10k 100k 1M FREQUENCY (Hz) –0.6 –0.8 –1.0 TA = –40°C TA = +25°C TA = +85°C TA = +125°C –1.2 +1.2 +1.0 +0.8 +0.6 +0.4 +0.2 –VS 08308-018 20 –0.4 2 4 6 8 10 12 14 16 18 SUPPLY VOLTAGE (±VS) 08308-021 OUTPUT VOLTAGE SWING (V) REFERRED TO SUPPLY VOLTAGES GAIN = 2 CMRR (dB) –0.4 +0.1 –36 100 Figure 20. Output Voltage Swing vs. Supply Voltage and Temperature, RL = 2 kΩ Figure 17. CMRR vs. Frequency +VS OUTPUT VOLTAGE SWING (V) REFERRED TO SUPPLY VOLTAGES 120 100 –PSRR 80 60 +PSRR 40 20 0 1 10 100 1k 10k FREQUENCY (Hz) Figure 18. PSRR vs. Frequency 100k 1M –4 –8 TA = –40°C TA = +25°C TA = +85°C TA = +125°C +8 +4 –VS 1k 08308-019 PSRR (dB) –0.3 10k 100k LOAD RESISTANCE (Ω) Figure 21. Output Voltage Swing vs. RL and Temperature, VS = ±15 V Rev. PrA | Page 11 of 18 08308-022 GAIN (dB) 0 –0.2 AD8279 Preliminary Technical Data +VS 250 VREF = MIDSUPPLY 200 –1.0 SUPPLY CURRENT (µA) OUTPUT VOLTAGE SWING (V) REFERRED TO SUPPLY VOLTAGES –0.5 –1.5 –2.0 TA = –40°C TA = +25°C TA = +85°C TA = +125°C +2.0 +1.5 150 VS = ±15V 100 VS = +2.7V 50 +1.0 0 1 2 3 4 5 6 7 8 9 10 OUTPUT CURRENT (mA) 0 –50 08308-023 –VS –30 –10 10 30 50 70 90 110 130 TEMPERATURE (°C) Figure 22. Output Voltage Swing vs. IOUT and Temperature, VS = ±15 V 08308-026 +0.5 Figure 25. Supply Current per Channel vs. Temperature 180 30 25 SHORT-CIRCUIT CURRENT (mA) SUPPLY CURRENT (µA) 170 160 150 140 130 20 15 ISHORT+ 10 5 0 –5 –10 ISHORT– 0 2 4 6 8 10 12 14 16 18 SUPPLY VOLTAGE (±V) –20 –50 08308-024 120 –30 –10 10 Figure 23. Supply Current per Channel vs. Dual-Supply Voltage, VIN = 0 V 50 70 90 110 130 Figure 26. Short-Circuit Current per Channel vs. Temperature 180 2.0 –SLEW RATE 1.8 170 1.6 160 SLEW RATE (V/µs) SUPPLY CURRENT (µA) 30 TEMPERATURE (°C) 08308-027 –15 150 140 1.4 +SLEW RATE 1.2 1.0 0.8 0.6 0.4 130 5 10 15 20 25 SUPPLY VOLTAGE (V) 30 35 40 Figure 24. Supply Current per Channel vs. Single-Supply Voltage, VIN = 0 V, VREF = 0 V Rev. PrA | Page 12 of 18 0 –50 –30 –10 10 30 50 70 90 110 130 TEMPERATURE (°C) Figure 27. Slew Rate vs. Temperature, VIN = 20 V p-p, 1 kHz 08308-028 0 08308-025 0.2 120 Preliminary Technical Data AD8279 8 4 1V/DIV 2 3.64µs TO 0.01% 4.12µs TO 0.001% 0 –2 0.002%/DIV –4 –6 4µs/DIV –4 –3 –2 –1 0 1 2 3 4 5 OUTPUT VOLTAGE (V) TIME (µs) 08308-029 –8 –5 Figure 28. Gain Nonlinearity, VS = ±15 V, RL ≥ 2 kΩ, G = ½ 08308-032 NONLINEARITY (2ppm/DIV) 6 Figure 31. Large-Signal Pulse Response and Settling Time, 2 V Step, VS = 2.7 V, G = ½ 8 4 5V/DIV 2 7.6µs TO 0.01% 9.68µs TO 0.001% 0 –2 0.002%/DIV –6 40µs/DIV –8 –6 –4 –2 0 2 4 6 8 10 OUTPUT VOLTAGE (V) TIME (µs) 08308-030 –8 –10 08308-033 –4 Figure 32. Large-Signal Pulse Response and Settling Time, 10 V Step, VS = ±15 V, G = 2 Figure 29. Gain Nonlinearity, VS = ±15 V, RL ≥ 2 kΩ, G = 2 5V/DIV 1V/DIV 6.24µs TO 0.01% 7.92µs TO 0.001% 4.34µs TO 0.01% 5.12µs TO 0.001% 0.002%/DIV 0.002%/DIV TIME (µs) 4µs/DIV 08308-031 40µs/DIV TIME (µs) Figure 30. Large-Signal Pulse Response and Settling Time, 10 V Step, VS = ±15 V, G = ½ 08308-034 NONLINEARITY (2ppm/DIV) 6 Figure 33. Large-Signal Pulse Response and Settling Time, 2 V Step, VS = 2.7 V Rev. PrA | Page 13 of 18 AD8279 Preliminary Technical Data 5.0 4.5 VS = ±5V 2V/DIV OUTPUT VOLTAGE (V p-p) 4.0 3.5 3.0 VS = ±2.5V 2.5 2.0 1.5 1.0 10µs/DIV 0 100 1k 10k 100k 1M FREQUENCY (Hz) 08308-038 08308-035 0.5 Figure 37. Maximum Output Voltage vs. Frequency, VS = 5 V, 2.7 V 5V/DIV 20mV/DIV Figure 34. Large-Signal Step Response, G = ½ 08308-036 RL = 200pF RL = 147pF RL = 247pF 10µs/DIV 40µs/DIV Figure 35. Large-Signal Step Response, G = 2 08308-039 NO LOAD Figure 38. Small-Signal Step Response for Various Capacitive Loads, G = ½ 30 VS = ±15V 20 20mV/DIV 15 10 VS = ±5V RL = 100pF RL = 200pF 5 RL = 247pF RL = 347pF 1k 10k FREQUENCY (Hz) 100k 1M 40µs/DIV 08308-037 0 100 Figure 36. Maximum Output Voltage vs. Frequency, VS = ±15 V, ±5 V 08308-040 OUTPUT VOLTAGE (V p-p) 25 Figure 39. Small-Signal Step Response for Various Capacitive Loads, G = 2 Rev. PrA | Page 14 of 18 Preliminary Technical Data AD8279 50 1k 45 40 ±2V ±5V NOISE (nV/ Hz) OVERSHOOT (%) 35 30 25 ±15V 20 ±18V 15 GAIN = 2 100 GAIN = ½ 10 0 50 100 150 200 250 CAPACITIVE LOAD (pF) 10 0.1 1 10 100 1k 10k 100k FREQUENCY (Hz) Figure 40. Small-Signal Overshoot vs. Capacitive Load, RL ≥ 2 kΩ, G = ½ Figure 42. Voltage Noise Density vs. Frequency 35 GAIN = 2 30 ±2V 20 15 1µV/DIV OVERSHOOT (%) 25 ±5V GAIN = ½ ±15V 10 ±18V 0 50 100 150 200 250 CAPACITIVE LOAD (pF) 300 350 Figure 41. Small-Signal Overshoot vs. Capacitive Load, RL ≥ 2 kΩ, G = 2 Rev. PrA | Page 15 of 18 1s/DIV Figure 43. 0.1 Hz to 10 Hz Voltage Noise 08308-044 0 08308-042 5 08308-043 0 08308-041 5 AD8279 Preliminary Technical Data THEORY OF OPERATION CIRCUIT INFORMATION Each channel of the AD8279 consists of a low power, low noise op amp and four laser-trimmed on-chip resistors. These resistors can be externally connected to make a variety of amplifier configurations, including difference, noninverting, and inverting configurations. Taking advantage of the integrated resistors of the AD8279 provides the designer with several benefits over a discrete design, including smaller size, lower cost, and better ac and dc performance. The resistors on the AD8279 are laser trimmed to match accurately. As a result, the AD8279 provides superior performance over a discrete solution, enabling better CMRR, gain accuracy, and gain drift, even over a wide temperature range. AC Performance Component sizes and trace lengths are much smaller in an IC than on a PCB, so the corresponding parasitic elements are also smaller. This results in better ac performance of the AD8279. For example, the positive and negative input terminals of the AD8279 op amps are intentionally not pinned out. By not connecting these nodes to the traces on the PCB, their capacitance remains low and balanced, resulting in improved loop stability and excellent common-mode rejection over frequency. DRIVING THE AD8279 Care should be taken to drive the AD8279 with a low impedance source: for example, another amplifier. Source resistance of even a few kilohms (kΩ) can unbalance the resistor ratios and, therefore, significantly degrade the gain accuracy and commonmode rejection of the AD8279. Because all configurations present several kilohms (kΩ) of input resistance, the AD8279 does not require a high current drive from the source and so is easy to drive. INPUT VOLTAGE RANGE DC Performance Much of the dc performance of op amp circuits depends on the accuracy of the surrounding resistors. Using superposition to analyze a typical difference amplifier circuit, as is shown in Figure 45, the output voltage is found to be VOUT R2 (V ) R1 + R2 IN+ R4 ⎛ R2 ⎞⎛ ⎟ 1 + R4 ⎞⎟ − V IN − ⎛⎜ R4 ⎞⎟ = V IN + ⎜ ⎜ R1 + R2 ⎟⎜⎝ R3 ⎠ ⎝ R3 ⎠ ⎝ ⎠ VIN– VIN+ This equation demonstrates that the gain accuracy and commonmode rejection ratio of the AD8279 is determined primarily by the matching of resistor ratios. Even a 0.1% mismatch in one resistor degrades the CMRR to 69 dB for a G = 2 difference amplifier. The difference amplifier output voltage equation can be reduced to VOUT = R4 (VIN + − VIN − ) R3 as long as the following ratio of the resistors is tightly matched: R2 R4 = R1 R3 R3 R1 R2 R2 (V ) R1 + R2 IN+ 08308-046 Figure 44. Functional Block Diagram The AD8279 is able to measure input voltages beyond the supply rails. The internal resistors divide down the voltage before it reaches the internal op amp, and provide protection to the op amp inputs. Figure 45 shows an example of how the voltage division works in a difference amplifier configuration. For the AD8279 to measure correctly, the input voltages at the input nodes of the internal op amp must stay below 1.5 V of the positive supply rail and can exceed the negative supply rail by 0.1 V. Refer to the Power Supplies section for more details. Figure 45. Voltage Division in the Difference Amplifier Configuration The AD8279 has integrated ESD diodes at the inputs that provide overvoltage protection. This feature simplifies system design by eliminating the need for additional external protection circuitry, and enables a more robust system. The voltages at any of the inputs of the parts can safely range from +VS − 40 V up to −VS + 40 V. For example, on ±10 V supplies, input voltages can go as high as ±30 V. Care should be taken to not exceed the +VS − 40 V to −VS + 40 V input limits to avoid risking damage to the parts. Rev. PrA | Page 16 of 18 Preliminary Technical Data AD8279 The AD8279 operates extremely well over a very wide range of supply voltages. They can operate on a single supply as low as 2 V and as high as 36 V, under appropriate setup conditions. For best performance, the user must exercise care that the setup conditions ensure that the internal op amp is biased correctly. The internal input terminals of the op amp must have sufficient voltage headroom to operate properly. Proper operation of the part requires at least 1.5 V between the positive supply rail and the op amp input terminals. This relationship is expressed in the following equation: The AD8279 are typically specified at single- and dual-supplies, but it can be used with unbalanced supplies as well; for example, −VS = −5 V, +VS = 20 V. The difference between the two supplies must be kept below 36 V. The positive supply rail must be at least 2 V above the negative supply and reference voltage. R1 (V ) R1 + R2 REF R4 R3 R1 R2 VREF R1 (V ) R1 + R2 REF R1 V REF < + VS − 1.5 V R1 + R2 08308-046 POWER SUPPLIES Figure 46. Ensure Sufficient Voltage Headroom on the Internal Op Amp Inputs For example, when operating on a +VS= 2 V single supply and VREF = 0 V, it can be seen from Figure 46 that the op amps input terminals are biased at 0 V, allowing more than the required 1.5 V headroom. However, if VREF = 1 V under the same conditions, the input terminals of the op amp are biased at 0.66 V (G = ½). Now the op amp does not have the required 1.5 V headroom and can not function. Therefore, the user needs to increase the supply voltage or decrease VREF to restore proper operation. Use a stable dc voltage to power the AD8279. Noise on the supply pins can adversely affect performance. Place a bypass capacitor of 0.1 μF between each supply pin and ground, as close as possible to each supply pin. Use a tantalum capacitor of 10 μF between each supply and ground. It can be farther away from the supply pins and, typically, it can be shared by other precision integrated circuits. Rev. PrA | Page 17 of 18 AD8279 Preliminary Technical Data OUTLINE DIMENSIONS Figure 47. 14-Lead Standard Small Outline Package [SOIC_N] Narrow Body (R-14) Dimensions shown in millimeters and (inches) ©2009 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. PR08445-0-8/09(PrA) Rev. PrA | Page 18 of 18