PDF Data Sheet Rev. D

General-Purpose, −55°C to +125°C,
Wide Bandwidth, DC-Coupled VGA
AD8336
Data Sheet
FEATURES
GENERAL DESCRIPTION
Low noise
Voltage noise: 3 nV/√Hz
Current noise: 3 pA/√Hz
Small-signal BW: 115 MHz
Large-signal BW: 2 V p-p = 80 MHz
Slew rate: 550 V/µs, 2 V p-p
Gain ranges (specified)
−14 dB to +46 dB
0 dB to 60 dB
Gain scaling: 50 dB/V
DC-coupled
Single-ended input and output
Supplies: ±3 V to ±12 V
Temperature range: −55°C to +125°C
Power
150 mW at ±3 V, −55°C < T < +125°C
84 mW at ±3 V, PWRA = 3 V
The AD8336 is a low noise, single-ended, linear in dB, generalpurpose variable gain amplifier, usable over a large range of
supply voltages. It features an uncommitted preamplifier with a
usable gain range of 6 dB to 26 dB. The VGA gain range is 0 dB
to 60 dB, with absolute gain limits of −26 dB to +34 dB. When
the preamplifier gain is adjusted for 12 dB, the combined 3 dB
bandwidth of the preamplifier and VGA is 100 MHz, and the
amplifier is fully usable to 80 MHz. With ±5 V supplies, the
maximum output swing is 7 V p-p.
Because of the X-AMP® architecture, frequency response is
maintained across the entire gain range of the VGA. The differential gain control interface provides precise linear in dB gain scaling
of 50 dB/V over the temperature span of −55°C to +125°C and
is simple to interface with a variety of external sources.
The large supply voltage range makes the AD8336 suited for
industrial medical applications and video circuits. Dual-supply
operation enables bipolar input signals, such as those generated
by photodiodes or photomultiplier tubes.
APPLICATIONS
Industrial process controls
High performance AGC systems
I/Q signal processing
Video
Industrial and medical ultrasound
Radar receivers
The fully independent voltage feedback preamplifier allows both
inverting and noninverting gain topologies. The AD8336 can be
used within the specified gain range of −14 dB to +60 dB by
selecting a preamplifier gain between 6 dB and 26 dB and choosing
appropriate feedback resistors. For the nominal preamplifier gain of
4×, the overall gain range is −14 dB to +46 dB.
If required, quiescent power is limited to a safe level by
asserting the PWRA pin.
FUNCTIONAL BLOCK DIAGRAM
AD8336
INPN 5
+
PREAMP
–
PRAO
VGAI
8
9
ATTENUATOR
–60dB TO 0dB
1
VOUT
GAIN CONTROL
INTERFACE
BIAS
PWRA 2
34dB
10
13
3
11
12
VNEG
VPOS
VCOM
GPOS
GNEG
06228-001
INPP 4
Figure 1.
Rev. D
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Tel: 781.329.4700 ©2006–2016 Analog Devices, Inc. All rights reserved.
Technical Support
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AD8336
Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Setting the Gain .......................................................................... 21
Applications ....................................................................................... 1
Noise ............................................................................................ 21
General Description ......................................................................... 1
Offset Voltage.............................................................................. 21
Functional Block Diagram .............................................................. 1
Applications Information .............................................................. 22
Revision History ............................................................................... 2
Amplifier Configuration ........................................................... 22
Specifications..................................................................................... 3
Preamplifier ................................................................................. 22
Absolute Maximum Ratings ............................................................ 5
Using the Power Adjust Feature ............................................... 23
ESD Caution .................................................................................. 5
Driving Capacitive Loads .......................................................... 23
Pin Configuration and Function Descriptions ............................. 6
Evaluation Board ............................................................................ 24
Typical Performance Characteristics ............................................. 7
Optional Circuitry...................................................................... 24
Test Circuits ..................................................................................... 16
Board Layout Considerations ................................................... 24
Theory of Operation ...................................................................... 20
Outline Dimensions ....................................................................... 27
Overview...................................................................................... 20
Ordering Guide .......................................................................... 27
Preamplifier ................................................................................. 20
VGA.............................................................................................. 20
REVISION HISTORY
5/2016—Rev. C to Rev. D
Changes to General Description Section and Figure 1 ............... 1
Changes to Figure 2 and Table 3 ..................................................... 6
Change to Overview Section ......................................................... 20
Updated Outline Dimensions ....................................................... 26
Changes to Ordering Guide .......................................................... 26
5/2011—Rev. B to Rev. C
Change to Figure 2 and Table 3 ...................................................... 6
Changes to OG ................................................................................ 26
4/2011—Rev. A to Rev. B
Change to Table 2 ............................................................................. 5
Changes to Figure 77 and Preamplifier Section ......................... 20
Changes to Evaluation Board Section, Optional Circuitry
Section, and Board Layout Considerations Section ................... 24
Added Table 6.................................................................................. 24
Deleted Figure 83; Renumbered Figures Sequentially ............... 24
Changes to Figure 82, Figure 83, and Figure 84 ......................... 24
Changes to Figure 85, Figure 86, Figure 87, and Figure 88 ....... 25
Deleted Table 6 ................................................................................ 26
9/2008—Rev. 0 to Rev. A
Change to General Description Section .........................................1
Deleted Input Capacitance Parameter, Table 1 ..............................3
Added Exposed Pad Notation to Figure 2......................................6
Changes to Figure 11.........................................................................8
Changes to Figure 55...................................................................... 15
Change to Preamplifier Section .................................................... 20
Changes to Noise Section .............................................................. 21
Change to Circuit Configuration for Noninverting
Gain Section .................................................................................... 22
Changes to Table 5.......................................................................... 22
Changes to Figure 89 and Table 6................................................. 26
Updated Outline Dimensions ....................................................... 27
Changes to Ordering Guide .......................................................... 27
10/2006—Revision 0: Initial Version
Rev. D | Page 2 of 28
Data Sheet
AD8336
SPECIFICATIONS
VS = ±5 V, T = 25°C, gain range = −14 dB to +46 dB, preamplifier gain = 4×, f = 1 MHz, CL = 5 pF, RL = 500 Ω, PWRA = GND, unless
otherwise specified.
Table 1.
Parameter
PREAMPLIFIER
−3 dB Small-Signal Bandwidth
−3 dB Large-Signal Bandwidth
Bias Current, Either Input
Differential Offset Voltage
Input Resistance
Input Capacitance
PREAMPLIFIER + VGA
−3 dB Small-Signal Bandwidth
−3 dB Large-Signal Bandwidth
Slew Rate
Short-Circuit Preamplifier Input
Voltage
Noise Spectral Density
Input Current Noise Spectral Density
Output-Referred Noise
DYNAMIC PERFORMANCE
Harmonic Distortion
HD2
HD3
HD2
HD3
Input 1 dB Compression Point
Two-Tone Intermodulation
Distortion (IMD3)
Output Third-Order Intercept
Overdrive Recovery
Group Delay Variation
Preamplifier Gain = 20×
Test Conditions/Comments
Min
Typ
Max
Unit 1
VOUT = 10 mV p-p
VOUT = 2 V p-p
150
85
725
±600
900
3
MHz
MHz
nA
μV
kΩ
pF
VOUT = 10 mV p-p
VOUT = 10 mV p-p, PWRA = 5 V
VOUT = 10 mV p-p, preamplifier gain = 20×
VOUT = 10 mV p-p, preamplifier gain = −3×
115
40
20
125
MHz
MHz
MHz
MHz
VOUT = 2 V p-p
VOUT = 2 V p-p, PWRA = 5 V
VOUT = 2 V p-p, preamplifier gain = 20×
VOUT = 2 V p-p, preamplifier gain = −3×
VOUT = 2 V p-p
±3 V ≤ VS ≤ ±12 V
80
30
20
100
550
3.0
MHz
MHz
MHz
MHz
V/µs
nV/√Hz
VGAIN = 0.7 V, preamplifier gain = 4×
VGAIN = −0.7 V, preamplifier gain = 4×
VGAIN = 0.7 V, preamplifier gain = 20×
VGAIN = −0.7 V, preamplifier gain = 20×
VGAIN = 0.7 V, −55°C ≤ T ≤ +125°C
VGAIN = −0.7 V, −55°C ≤ T ≤ +125°C
3.0
600
190
2500
200
700
250
pA/√Hz
nV/√Hz
nV/√Hz
nV/√Hz
nV/√Hz
nV/√Hz
nV/√Hz
VGAIN = 0 V, VOUT = 1 V p-p
f = 1 MHz
f = 1 MHz
f = 10 MHz
f = 10 MHz
VGAIN = −0.7 V
VGAIN = +0.7 V
VGAIN = 0 V, VOUT = 1 V p-p, f1 = 0.95 MHz, f2 = 1.05 MHz
VGAIN = 0 V, VOUT = 1 V p-p, f1 = 9.95 MHz, f2 = 10.05 MHz
VGAIN = 0 V, VOUT = 2 V p-p, f1 = 0.95 MHz, f2 = 1.05 MHz
VGAIN = 0 V, VOUT = 2 V p-p, f1 = 9.95 MHz, f2 = 10.05 MHz
VGAIN = 0 V, VOUT = 1 V p-p, f = 1 MHz
VGAIN = 0 V, VOUT = 1 V p-p, f = 10 MHz
VGAIN = 0 V, VOUT = 2 V p-p, f = 1 MHz
VGAIN = 0 V, VOUT = 2 V p-p, f = 10 MHz
VGAIN = 0.7 V, VIN = 100 mV p-p to 5 mV p-p
1 MHz < f < 10 MHz, full gain range
1 MHz < f < 10 MHz, full gain range
−58
−68
−60
−60
11
−23
−71
−69
−60
−58
34
32
34
33
50
±1
±3
dBc
dBc
dBc
dBc
dBm
dBm
dBc
dBc
dBc
dBc
dBm
dBm
dBm
dBm
ns
ns
ns
Rev. D | Page 3 of 28
AD8336
Parameter
ABSOLUTE GAIN ERROR 2
GAIN CONTROL INTERFACE
Gain Scaling Factor
Intercept
Gain Range
Input Voltage (VGAIN) Range
Input Current
Response Time
OUTPUT PERFORMANCE
Output Impedance, DC to 10 MHz
Output Signal Swing
Output Current
Short-Circuit Current
Output Offset Voltage
PWRA PIN
Normal Power (Logic Low)
Low Power (Logic High)
Normal Power (Logic Low)
Low Power (Logic High)
Normal Power (Logic Low)
Low Power (Logic High)
POWER SUPPLY
Supply Voltage Operating Range
Quiescent Current
VS = ±3 V
Data Sheet
Test Conditions/Comments
−0.7 V < VGAIN < −0.6 V
−0.6 V < VGAIN < −0.5 V
−0.5 V < VGAIN < +0.5 V
−0.5 V < VGAIN < +0.5 V, ±3 V ≤ VS ≤ ±12 V
−0.5 V < VGAIN < +0.5 V, −55°C ≤ T ≤ +125°C
−0.5 V < VGAIN < +0.5 V, preamplifier gain = −3×
0.5 V < VGAIN < +0.6 V
0.6 V < VGAIN < +0.7 V
48
±3 V ≤ VS ≤ ±12 V
RL ≥ 500 Ω (for |VS| ≤ ±5 V); RL ≥ 1 kΩ above that
RL ≥ 1 kΩ (for |VS| = ±12 V)
Linear operation − minimum discernable distortion
VS = ±3 V
VS = ±5 V
VS = ±12 V
VGAIN = 0.7 V, gain = 200×
±3 V ≤ VS ≤ ±12 V
−55°C ≤ T ≤ +125°C
2.5
|VS| − 1.5
|VS| − 2.25
20
+123/−72
+123/−72
+72/−73
−125
−200
−200
Ω
V
V
mA
mA
mA
mA
mV
mV
mV
VS = ±3 V
VS = ±3 V
VS = ±5 V
VS = ±5 V
VS = ±12 V
VS = ±12 V
52
62
+VS
+150
0.7
1.5
1.2
2.0
3.2
4.0
±3
22
VS = ±12 V
2
0
0
Unit 1
dB
dB
dB
dB
dB
dB
dB
dB
1
300
−250
49.9
16.4
4.5
60
Max
6
3
+1.25
+1.25
60 dB gain change
58
−VS
No foldover
−55°C ≤ T ≤ +125°C
PWRA = 5 V
1
Typ
1 to 5
0.5 to 1.5
±0.2
±0.5
±0.5
±0.5
−1.5 to −3.0
−1 to −5
dB/V
dB
dB
dB
V
μA
ns
VS = ±5 V
Power Supply Rejection Ratio (PSRR)
−4.0
−9.0
Preamplifier + VGA
VGA only
−55°C ≤ T ≤ +125°C
PWRA = 3 V
Power Dissipation
Min
0
0
−1.25
−55°C ≤ T ≤ +125°C
PWRA = 5 V
VS = ±3 V
VS = ±5 V
VS = ±12 V
VGAIN = 0.7 V, f = 1 MHz
All dBm values are calculated with 50 Ω reference, unless otherwise noted.
Conformance to theoretical gain expression (see the Setting the Gain section).
Rev. D | Page 4 of 28
10
22
10
23
±12
25
23 to 31
14
26
23 to 31
14
28
24 to 33
16
150
260
672
−40
V
V
V
V
V
V
V
30
mA
18
30
mA
18
31
mA
mW
mW
mW
dB
Data Sheet
AD8336
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter
Supply Voltage (VPOS, VNEG)
Input Voltage (INPP, INPN)
Gain Voltage (GPOS, GNEG)
PWRA
VGAI
Power Dissipation
VS ≤ ±5 V
±5 V < VS ≤ ±12 V
Operating Temperature Range
±3 V < VS ≤ ±10 V
±10 V < VS ≤ ±12 V
Storage Temperature Range
Lead Temperature (Soldering 60 sec)
Thermal Data 1
θJA
θJB
θJC
ΨJT
ΨJB
1
Rating
±15 V
VPOS, VNEG
VPOS, VNEG
5 V, GND
VPOS + 0.6 V, VNEG − 0.6 V
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
ESD CAUTION
0.43 W
1.12 W
−55°C to +125°C
−55°C to +85°C
−65°C to +150°C
300°C
58.2°C/W
35.9°C/W
9.2°C/W
1.1°C/W
34.5°C/W
4-layer JEDEC board, no airflow, exposed pad soldered to printed circuit board.
Rev. D | Page 5 of 28
AD8336
Data Sheet
13 VPOS
14 NC
16 NC
15 NC
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
VOUT 1
12 GNEG
PWRA 2
AD8336
11 GPOS
VCOM 3
TOP VIEW
(Not to Scale)
10 VNEG
NOTES
1. NC = NO CONNECT.
2. THE EXPOSED PAD IS NOT CONNECTED INTERNALLY.
FOR INCREASED RELIABILITY OF THE SOLDER
JOINTS AND MAXIMUM THERMAL CAPABILITY, IT IS
RECOMMENDED THAT THE PADDLE BE SOLDERED
TO THE GROUND PLANE.
06228-002
NC 7
VGAI
PRAO 8
NC 6
9
INPN 5
INPP 4
Figure 2. Pin Configuration
Table 3. Pin Function Descriptions
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Not applicable
Mnemonic
VOUT
PWRA
VCOM
INPP
INPN
NC
NC
PRAO
VGAI
VNEG
GPOS
GNEG
VPOS
NC
NC
NC
EPAD
Description
Output Voltage.
Power Control. Normal power when grounded; power reduced by half if PWRA is pulled high.
Common-Mode Voltage. Normally GND when using a dual supply.
Positive Input to Preamplifier.
Negative Input to Preamplifier.
No Connect.
No Connect.
Preamplifier Output.
VGA Input.
Negative Supply.
Positive Gain Control Input.
Negative Gain Control Input.
Positive Supply.
No Connect.
No Connect.
No Connect.
The Exposed Pad is Not Connected Internally. For increased reliability of the solder joints and maximum
thermal capability, it is recommended that the paddle be soldered to the ground plane.
Rev. D | Page 6 of 28
Data Sheet
AD8336
TYPICAL PERFORMANCE CHARACTERISTICS
VS = ±5 V, T = 25°C, gain range = −14 dB to +46 dB, preamplifier gain = 4×, f = 1 MHz, CL = 5 pF, RL = 500 Ω, PWRA = GND, unless
otherwise specified.
2.0
50
T = +125°C
T = +25°C
T = –55°C
40
1.0
GAIN ERROR (dB)
20
10
0
0.5
0
–0.5
–1.0
–10
–1.5
–600
–400
–200
0
200
VGAIN (mV)
400
600
800
–2.0
–800
06228-003
–20
–800
Figure 3. Gain vs. VGAIN for Three Values of Temperature (T)
(See Figure 56)
–600
–400
–200
0
200
VGAIN (mV)
400
800
Figure 6. Gain Error vs. VGAIN for Three Values of Temperature (T)
(See Figure 56)
50
2.0
VS = ±12V
VS = ±5V
VS = ±3V
40
600
06228-006
GAIN (dB)
30
VS = ±12V
VS = ±5V
VS = ±3V
1.5
1.0
GAIN ERROR (dB)
30
GAIN (dB)
T = +125°C
T = +25°C
T = –55°C
1.5
20
10
0.5
0
–0.5
0
–1.0
–10
–600
–400
–200
0
200
VGAIN (mV)
400
600
800
–2.0
–800
06228-004
–20
–800
Figure 4. Gain vs. VGAIN for Three Values of Supply Voltage (VS)
(See Figure 56)
–400
–200
0
200
VGAIN (mV)
400
600
800
Figure 7. Gain Error vs. VGAIN for Three Values of Supply Voltage (VS)
(See Figure 56)
70
2.0
60
1.5
50
PREAMP GAIN = 20×
PREAMP GAIN = 4×
1.0
30
PREAMP GAIN = 20×
PREAMP GAIN = 4×
20
10
0.5
0
–0.5
0
–1.0
–10
–1.5
–600
–400
–200
200
0
VGAIN (mV)
400
600
800
–2.0
–800
06228-005
–20
–800
Figure 5. Gain vs. VGAIN for Preamplifier Gains of 4× and 20×
(See Figure 56)
–600
–400
–200
0
200
VGAIN (mV)
400
600
800
Figure 8. Gain Error vs. VGAIN for Preamplifier Gains of 4× and 20×
(See Figure 56)
Rev. D | Page 7 of 28
06228-008
GAIN ERROR (dB)
40
GAIN (dB)
–600
06228-007
–1.5
AD8336
Data Sheet
2.0
50
PREAMP GAIN =
PREAMP GAIN =
PREAMP GAIN =
PREAMP GAIN =
1.5
60 UNITS
VGAIN = –0.3V
VGAIN = +0.3V
4×, f = 1MHz
4×, f = 10MHz
20×, f = 1MHz
20×, f = 10MHz
40
0.5
% OF UNITS
GAIN ERROR (dB)
1.0
0
–0.5
30
20
–1.0
10
Figure 12. Gain Error Histogram
50
PREAMP GAIN = –3×, f = 1MHz
PREAMP GAIN = –3×, f = 10MHz
PREAMP GAIN = –19×, f = 1MHz
PREAMP GAIN = –19×, f = 10MHz
1.5
06228-012
GAIN ERROR (dB)
Figure 9. Gain Error vs. VGAIN at 1 MHz and 10 MHz and
for Preamplifier Gains of 4× and 20× (See Figure 56)
2.0
0.16
0
0.12
800
0.08
600
0.04
400
–0.04
200
0
VGAIN (mV)
–0.08
–200
–0.12
–400
–600
06228-009
–2.0
–800
0
–1.5
60 UNITS
–0.3V ≤ VGAIN ≤ 0.3V
40
% OF UNITS
0.5
0
–0.5
30
20
–1.0
10
–1.5
–400
–200
400
200
0
VGAIN (mV)
600
800
0
49.6
49.7
49.8
49.9
50.0
50.1
06228-013
–600
06228-010
–2.0
–800
50.2
GAIN SCALING (dB/V)
Figure 10. Gain Error vs. VGAIN at 1 MHz and 10 MHz and
for Inverting Preamplifier Gains of −3× and −19× (See Figure 56)
Figure 13. Gain Scaling Factor Histogram
50
20
0
40
OUTPUT OFFSET VOLTAGE (mV)
VS = ±12V
VS = ±5V
VS = ±3V
35
0
–5
–15
–15
–10
–5
0
5
10
COMMON-MODE VOLTAGE VGAIN (V)
15
06228-011
–10
–20
–40
–60
–80
–100
–120
–140
–160
–180
–200
–220
–0.8
Figure 11. Gain vs. Common-Mode Voltage at VGAIN
T
T
T
T
T
= +125°C
= +85°C
= +25°C
= –40°C
= –55°C
–0.6
–0.4
–0.2
0
0.2
VGAIN (V)
0.4
0.6
Figure 14. Output Offset Voltage vs. VGAIN for
Various Values of Temperature (T)
Rev. D | Page 8 of 28
0.8
06228-014
45
GAIN (dB)
GAIN ERROR (dB)
1.0
Data Sheet
AD8336
20
50
40
–20
30
–60
20
0V
10
–0.2V
GAIN (dB)
–40
–80
–100
+0.2V
0
–120
–0.5V
–140
–10
–0.7V
–160
–200
–0.8
VS = ±12V
VS = ±5V
VS = ±3V
–20
–0.4
–0.6
–0.2
0
0.2
VGAIN (V)
0.4
0.6
0.8
–30
100k
50
SAMPLE SIZE = 60 UNITS
VGAIN = 0.7V
VGAIN = +0.7V
+0.5V
30
10
+0.2V
GAIN (dB)
% OF UNITS
20
0
30
–200
–160
–120
–80
–40
OUTPUT OFFSET (mV)
0
40
80
0V
10
–0.2V
0
SAMPLE SIZE = 60 UNITS
VGAIN = 0V
20
100M 200M
40
20
–240
10M
FREQUENCY (Hz)
Figure 18. Frequency Response for Various Values of VGAIN
(See Figure 57)
Figure 15. Output Offset Voltage vs. VGAIN for
Three Values of Supply Voltage (VS)
30
1M
06228-018
–180
06228-015
OUTPUT OFFSET VOLTAGE (mV)
VGAIN = +0.7V
+0.5V
0
–0.5V
–10
–0.7V
–20
10
–20
–16
–12
–8
–4
OUTPUT OFFSET (mV)
0
4
06228-016
–24
8
Figure 16. Output Offset Histogram
1M
10M
FREQUENCY (Hz)
100M 200M
06228-019
LOW POWER MODE
–30
100k
0
Figure 19. Frequency Response for Various Values of VGAIN, Low Power Mode
(See Figure 57)
70
50
60 UNITS
60
VGAIN = +0.7V
+0.5V
40
40
GAIN (dB)
30
20
30
+0.2V
0V
–0.2V
20
0
16.30
16.35
16.40
16.45
INTERCEPT (dB)
16.50
16.55
–0.7V
PREAMP GAIN = 20×
–10
100k
1M
0
16.25
–0.5V
Figure 17. Intercept Histogram
10M
FREQUENCY (Hz)
100M 200M
Figure 20. Frequency Response for Various Values of VGAIN
When the Preamplifier Gain is 20×
(See Figure 57)
Rev. D | Page 9 of 28
06228-020
10
10
06228-017
% OF UNITS
50
AD8336
Data Sheet
50
30
VGAIN = +0.7V
+0.5V
40
25
30
GAIN = –19×
20
20
15
GAIN (dB)
GAIN (dB)
+0.2V
0V
10
–0.2V
GAIN = –3×
10
0
5
–0.5V
–10
0
–20
–5
PREAMP GAIN = –3×
1M
10M
FREQUENCY (Hz)
100M 200M
–10
100k
06228-021
–30
100k
VS = ±12V
VS = ±5V
VS = ±3V
1M
10M
FREQUENCY (Hz)
100M
500M
06228-024
–0.7V
Figure 24. Preamplifier Frequency Response for Three Values of Supply
Voltage (VS) When the Inverting Gain Value is −3× or −19×
(See Figure 69)
Figure 21. Frequency Response for Various Values of VGAIN
When the Preamplifier Gain is −3×
(See Figure 69 and Figure 57)
20
25
PREAMP GAIN = 20×
PREAMP GAIN = 4×
VGAIN = 0V
20
15
GROUP DELAY (ns)
10
5
0
5
CL =
CL =
CL =
CL =
47pF
22pF
10pF
0pF
–10
100k
1M
10M
FREQUENCY (Hz)
100M 200M
0
1M
06228-022
–5
10
Figure 22. Frequency Response for Various Values of Load Capacitance (CL)
(See Figure 57)
10M
FREQUENCY (Hz)
100M
06228-025
GAIN (dB)
15
Figure 25. Group Delay vs. Frequency for Preamplifier Gains of 4× and 20×
(See Figure 59)
1k
30
GAIN = 20×
25
100
GAIN (dB)
15
OUTPUT RESISTANCE (Ω)
20
GAIN = 4×
10
5
0
10
1
1M
10M
FREQUENCY (Hz)
100M
500M
06228-023
–10
100k
VS = ±12V
VS = ±5V
VS = ±3V
Figure 23. Preamplifier Frequency Response for Three Values of Supply
Voltage (VS) When the Preamplifier Gain is 4× or 20×
(See Figure 58)
Rev. D | Page 10 of 28
0.01
100k
1M
10M
FREQUENCY (Hz)
100M
500M
Figure 26. Output Resistance vs. Frequency of the Preamplifier
(See Figure 61)
06228-026
0.1
–5
Data Sheet
AD8336
1k
INPUT-REFERRED NOISE (nV/√Hz)
1k
10
1
0.1
VS = ±12V
VS = ±5V
VS = ±3V
10
PREAMP GAIN = 20×
1M
10M
FREQUENCY (Hz)
100M
500M
1
–800
06228-027
0.01
100k
PREAMP GAIN = 4×
100
–600
–400
–200
200
0
VGAIN (mV)
400
600
800
06228-030
OUTPUT RESISTANCE (Ω)
100
f = 5MHz
Figure 30. Input-Referred Noise vs. VGAIN for Preamplifier Gains of 4× and 20×
(See Figure 62)
Figure 27. Output Resistance vs. Frequency of the VGA
for Three Values of Supply Voltage (VS)
(See Figure 61)
1000
6
f = 5MHz
VGAIN = 0.7V
700
600
500
400
300
T
T
T
T
T
200
100
0
–800
–600
–400
–200
200
0
VGAIN (mV)
400
= +125°C
= +85°C
= +25°C
= –40°C
= –55°C
600
800
Figure 28. Output-Referred Noise vs. VGAIN at Various Temperatures (T)
(See Figure 62)
5
4
3
2
1
VS = ±12V
VS = ±5V
VS = ±3V
0
100k
1M
10M
FREQUENCY (Hz)
100M
06228-031
INPUT-REFERRED NOISE (nV/√Hz)
800
06228-028
OUTPUT-REFERRED NOISE (nV/√Hz)
900
Figure 31. Short-Circuit Input-Referred Noise vs. Frequency at Maximum
Gain for Three Values of Supply Voltage (VS)
(See Figure 62)
6
2400
5
2100
1800
1500
1200
900
T
T
T
T
T
600
300
0
–800
–600
–400
–200
200
0
VGAIN (mV)
400
= +125°C
= +85°C
= +25°C
= –40°C
= –55°C
600
800
Figure 29. Output-Referred Noise vs. VGAIN at Various Temperatures (T)
When the Preamplifier Gain is 20×
(See Figure 62)
Rev. D | Page 11 of 28
VGAIN = 0.7V
PREAMP GAIN = –3×
4
3
2
1
0
100k
1M
10M
FREQUENCY (Hz)
100M
Figure 32. Short-Circuit Input-Referred Noise vs. Frequency
at Maximum Inverting Gain
(See Figure 73)
06228-032
INPUT-REFERRED NOISE (nV/√Hz)
f = 5MHz
2700 PREAMP GAIN = 20×
06228-029
OUTPUT-REFERRED NOISE (nV/√Hz)
3000
AD8336
–40
HARMONIC DISTORTION (dBc)
–45
10
INPUT-REFERRED NOISE
RS THERMAL NOISE ALONE
1
–50
HD2
–55
HD3
–60
10k
100
1k
SOURCE RESISTANCE (Ω)
–70
Figure 33. Input-Referred Noise vs. Source Resistance
(See Figure 72)
15
20
30
35
25
LOAD CAPACITANCE (pF)
45
40
50
–20
50
SIMULATED
DATA
40
30
50Ω SOURCE
10
–400
–200
0
200
VGAIN (mV)
400
600
800
Figure 34. Noise Figure vs. VGAIN
(See Figure 63)
–20
HARMONIC DISTORTION (dBc)
HD2
–55
HD3
–60
–65
600
800 1.0k 1.2k 1.4k 1.6k 1.8k 2.0k 2.2k
LOAD RESISTANCE (Ω)
06228-035
400
–200
HD2
f = 5MHz
0
200
VGAIN (mV)
400
600
800
OUTPUT SWING OF PREAMP LIMITS
VGAIN LEVELS
–40
–50
–60
–70
200
–400
–30
–50
0
HD2 @ 1MHz
HD2 @ 10MHz
HD3 @ 1MHz
HD3 @ 10MHz
Figure 37. Second and Third Harmonic Distortion vs. VGAIN at 1 MHz and 10 MHz
(See Figure 64)
VOUT = 2V p-p
VGAIN = 0V
f = 5MHz
–45
–60
Figure 35. Harmonic Distortion vs. Load Resistance
(See Figure 64)
–80
–600
VOUT = 0.5V p-p
VOUT = 1V p-p
VOUT = 2V p-p
VOUT = 4V p-p
–400
–200
0
200
VGAIN (mV)
400
600
Figure 38. Second Harmonic Distortion vs. VGAIN
for Four Values of Output Voltage (VOUT)
(See Figure 64)
Rev. D | Page 12 of 28
800
06228-038
–40
–50
–80
–600
06228-034
–600
–40
–70
UNTERMINATED
0
–800
–30
06228-037
HARMONIC DISTORTION (dBc)
60
20
OUTPUT SWING OF PREAMP
LIMITS VGAIN TO 400mV
VOUT = 1V p-p
f = 10MHz
NOISE FIGURE (dB)
10
Figure 36. Harmonic Distortion vs. Load Capacitance
(See Figure 64)
70
–70
5
0
06228-036
–65
0.1
10
HARMONIC DISTORTION (dBc)
VOUT = 2V p-p
VGAIN = 0V
f = 5MHz
VGAIN = 0.7V
06228-033
INPUT-REFERRED NOISE (nV/√Hz)
100
Data Sheet
Data Sheet
–20
AD8336
40
HD3
f = 5MHz
OUTPUT SWING OF PREAMP LIMITS
MINIMUM USABLE VGAIN LEVELS
1MHz 500mV
1MHz 1V
10MHz 500mV
10MHz 1V
35
OUTPUT IP3 (dBm)
30
–40
–50
–60
25
20
15
10
–80
–600
–200
–400
5
0
200
VGAIN (mV)
400
600
800
VOUT = 1V p-p
VGAIN = 0V
COMPOSITE INPUTS SEPARATED BY 100kHz
0
–800
Figure 39. Third Harmonic Distortion vs. VGAIN
for Four Values of Output Voltage (VOUT)
(See Figure 64)
–400
200
–200
0
VGAIN (mV)
400
600
800
Figure 42. Output-Referred IP3 (OIP3) vs. VGAIN
at Two Frequencies and Two Input Levels
(see Figure 76)
30
VOUT = 2V p-p
VGAIN = 0V
INPUT LEVEL LIMITED
BY GAIN OF PREAMP
VS = ±12V
20
–30
VS = ±5V
10
IP1dB (dBm)
HARMONIC DISTORTION (dBc)
–20
–600
06228-042
VOUT = 0.5V p-p
VOUT = 1V p-p
VOUT = 2V p-p
VOUT = 4V p-p
–70
06228-039
HARMONIC DISTORTION (dBc)
–30
–40
HD2
–50
VS = ±3V
0
–10
–60
–20
10M
FREQUENCY (Hz)
50M
Figure 40. Harmonic Distortion vs. Frequency
(See Figure 64)
0
–10
–30
–800
06228-040
–70
1M
–600
–400
–200
200
0
VGAIN (mV)
400
600
800
06228-043
HD3
Figure 43. Input P1dB (IP1dB) vs. VGAIN at Three Power Supply Values (VS)
(see Figure 74 and Figure 75)
3
VOUT = 1V p-p
VGAIN = 0V
TONES SEPARATED BY 100kHz
2
–20
1
VOLTAGE (V)
–40
–50
0
VIN (V)
VOUT (V)
–1
–60
–70
–2
–90
1M
10M
FREQUENCY (Hz)
100M
–3
–100
0
100
TIME (ns)
200
300
Figure 44. Large-Signal Pulse Response of the Preamplifier
(See Figure 65)
Figure 41. IMD3 vs. Frequency
(see Figure 76)
Rev. D | Page 13 of 28
06228-044
–80
06228-041
IMD3 (dBc)
–30
AD8336
Data Sheet
0.6
25
60
2.5
VGAIN = 0.7V
OUTPUT
20
0
–0.2
VIN (mV)
VOUT (mV)
0
–20
–0.4
–0.6
–100
–50
0
50
100
150
TIME (ns)
200
250
300
–60
350
5
0.5
0
–5
–0.5
–15
–1.5
–20
–2.0
–25
–100
20
60
50
200
250
300
–2.5
350
2.0
VGAIN = 0.7V
VS= ±3V
15
0.2
1.5
10
1.0
5
0.5
0
0
INPUT
–10
–40
–0.4
–15
0
50
100
150
TIME (ns)
200
250
300
–60
350
–20
–100
Figure 46. Inverting Gain Small-Signal Pulse Response
(See Figure 70)
25
2.5
30
1.5
10
1.0
5
0.5
0
0
–5
–0.5
–10
–1.0
–1.5
INPUT
OUTPUT WHEN PWRA = 0
OUTPUT WHEN PWRA = 1
–20
–25
–100
–50
0
50
100
150
TIME (ns)
200
50
100 150 200
TIME (ns)
250
300
350
VOUT (V)
–2.0
400
3
VGAIN = 0.7V
VS = ±5V
20
2
10
1
0
0
–10
INPUT
CL = 0pF
CL = 10pF
CL = 22pF
CL = 47pF*
–1
–2
–20
–2.0
250
300
–2.5
350
06228-047
–15
VIN (mV)
15
VOUT (mV)
2.0
0
–1.5
Figure 49. Large-Signal Pulse Response for Various Values of Load
Capacitance Using ±3 V Power Supplies
(See Figure 65)
VGAIN = 0.7V
20
–50
–1.0
*WITH 20Ω RESISTOR IN SERIES WITH OUTPUT.
–30
50
200
100
150
250
–100 –50
0
TIME (ns)
300
–3
350
Figure 50. Large-Signal Pulse Response for Various Values of Load
Capacitance Using ±5 V Power Supplies
(See Figure 65)
Figure 47. Large-Signal Pulse Response for Both Power Levels
(See Figure 65)
Rev. D | Page 14 of 28
06228-050
–50
06228-046
–0.6
–100
–0.5
INPUT
CL = 0pF
CL = 10pF
CL = 22pF
CL = 47pF
06228-049
–5
–20
VOUT (mV)
0
VIN (mV)
0
VOUT (mV)
20
–0.2
VIN (mV)
100
150
TIME (ns)
40
VGAIN = 0.7V
PREAMP GAIN = –3×
VIN (mV)
0
–50
Figure 48. Inverting Gain Large-Signal Pulse Response
(See Figure 70)
OUTPUT
0.4
–1.0
INPUT
Figure 45. Noninverting Small-Signal Pulse Response for Both Power Levels
(See Figure 65)
0.6
1.0
0
–10
–40
INPUT
OUTPUT WHEN PWRA = 0
OUTPUT WHEN PWRA = 1
1.5
VGAIN = 0.7V
PREAMP GAIN = –3×
10
20
06228-045
VIN (mV)
0.2
2.0
15
VOUT (mV)
40
06228-048
0.4
Data Sheet
3
10
20
2
0
10
1
0
0
–20
–30
–1
–40
–2
–20
*WITH 20Ω RESISTOR IN SERIES WITH OUTPUT
–30
–100
–50
50
0
200
100
150
TIME (ns)
300
250
–50
–3
350
–60
100k
Figure 51. Large-Signal Pulse Response for Various Values of Load
Capacitance Using ±12 V Power Supplies
(See Figure 65)
5M
0.5
VOUT
VGAIN
–0.5
–2.5
–0.5
0
0.5
1.0
TIME (µs)
1.5
2.0
06228-052
–1.5
5
0.5
4
0.3
3
0.2
2
0.1
1
0
0
–0.1
–1
–0.2
–2
OUTPUT VOLTAGE (V)
VGAIN = 0.7V
0.4
–3
–0.3
VIN (V)
VOUT (V)
–4
–5
–6
–3
0
3
TIME (µs)
6
06228-053
–0.5
–9
20
LOW POWER
10
VS = ±12V
VS = ±5V
VS = ±3V
0
–65
–45
–25
–5
15
35
55
75
TEMPERATURE (°C)
95
115
135
Figure 55. IQ vs. Temperature for Three Values of Supply Voltage
and High and Low Power
(See Figure 68)
Figure 52. Gain Response
(See Figure 66)
–0.4
HIGH POWER
30
Figure 53. VGA Overdrive Recovery
(See Figure 67)
Rev. D | Page 15 of 28
06228-055
QUIESCENT SUPPLY CURRENT (mA)
40
1.5
VOLTAGE (V)
1M
FREQUENCY (Hz)
Figure 54. PSRR vs. Frequency for Three Values of VGAIN
(See Figure 71)
2.5
INPUT VOLTAGE (V)
VGAIN = 0.7V
VGAIN = 0V
VGAIN = –0.7V
06228-054
–10
PSRR (dB)
INPUT
CL = 0pF
CL = 10pF*
CL = 22pF*
CL = 47pF*
PSRR
VPOS VNEG
–10
VOUT (mV)
VGAIN = 0.7V
VS = ±12V
06228-051
VIN (mV)
30
AD8336
AD8336
Data Sheet
TEST CIRCUITS
NETWORK ANALYZER
NETWORK ANALYZER
OUT
OUT
IN
50Ω
IN
50Ω
50Ω
AD8336
+
5
PREAMP
–
AD8336
453Ω
4
1
49.9Ω
8
9
12
5
1
11
8
301Ω
100Ω
9
12
11
301Ω
06228-056
VGAIN
453Ω
+
PREAMP
–
06228-059
49.9Ω
4
50Ω
100Ω
Figure 56. Gain vs. VGAIN and Gain Error vs. VGAIN
Figure 59. Group Delay
NETWORK ANALYZER
OUT
IN
50Ω
50Ω
453Ω
AD8336
49.9Ω
4
+
5
PREAMP
–
AD8336
4
1
5
+
PREAMP
–
1
453Ω
50Ω
DMM
12
11
OPTIONAL
CL
301Ω
NETWORK ANALYZER
50Ω
0Ω
453Ω NC
1
8
9
AD8336
NC
+
PREAMP
–
301Ω
CONFIGURE TO
MEASURE
Z-CONVERTED S22
IN
50Ω
AD8336
5
+
Figure 60. Offset Voltage
IN
50Ω
4
11
¯
NETWORK ANALYZER
49.9Ω
12
100Ω
Figure 57. Frequency Response
OUT
9
301Ω
06228-057
VGAIN
100Ω
8
06228-060
8
12
49.9Ω
4
+
5
PREAMP
–
11
1
8
NC
12
11
301Ω
453Ω
100Ω
100Ω
06228-058
NC = NO CONNECT
9
0Ω
NC
NC = NO CONNECT
Figure 61. Output Resistance vs. Frequency
Figure 58. Frequency Response of the Preamplifier
Rev. D | Page 16 of 28
06228-061
5
Data Sheet
AD8336
OSCILLOSCOPE
PULSE
GENERATOR
SPECTRUM ANALYZER
POWER
SPLITTER
OUT
CH2
CH1
50Ω
50Ω
IN
50Ω
AD8336
AD8336
4
5
1
OPTIONAL
20Ω 453Ω
+
PREAMP
–
4
+
PREAMP
–
5
1
49.9Ω
8
8
12
9
11
0.7V
06228-065
100Ω
06228-062
VGAIN
100Ω
12
9
301Ω
11
301Ω
Figure 62. Input-Referred Noise and Output-Referred Noise
Figure 65. Pulse Response
OSCILLOSCOPE
PULSE
FUNCTION
GENERATOR GENERATOR
NOISE FIGURE METER
NOISE
SOURCE
DRIVE
SINE
WAVE
SQUARE
WAVE
5
50Ω
50Ω
DIFFERENTIAL
FET PROBE
11
0Ω
AD8336
AD8336
49.9Ω
(OR ∞)
CH2
CH1
INPUT
NOISE
SOURCE
4
POWER
SPLITTER
4
+
PREAMP
–
0Ω
1
49.9Ω
5
453Ω
+
PREAMP
–
8
8
9
12
NC
1
9
12
301Ω
11
301Ω
06228-063
06228-066
100Ω
VGAIN
100Ω
NC = NO CONNECT
Figure 66. Gain Response
Figure 63. Noise Figure vs. VGAIN
OSCILLOSCOPE
ARBITRARY
WAVEFORM
GENERATOR
SPECTRUM ANALYZER
RL
INPUT
SIGNAL
GENERATOR
–20dB
50Ω
LOW-PASS
FILTER
5
1
+
PREAMP
–
CL
8
9
12
453Ω
1
8
301Ω
11
301Ω
100Ω
50Ω
9
12
NC
11
0.7V
100Ω
VGAIN
06228-067
5
4
49.9Ω
+
PREAMP
–
06228-064
49.9Ω
50Ω
AD8336
AD8336
4
CH2
CH1
POWER
SPLITTER
NC = NO CONNECT
Figure 64. Harmonic Distortion
Figure 67. VGA Overdrive Recovery
Rev. D | Page 17 of 28
AD8336
Data Sheet
POWER SUPPLIES
CONNECTED TO
NETWORK ANALYZER
BIAS PORT
NETWORK ANALYZER
BENCH
POWER SUPPLY
DMM
(+I)
OUT
IN
50Ω
50Ω
13
AD8336
4
5
+
PREAMP
–
BYPASS
CAPACITORS
REMOVED FOR
MEASUREMENT
1
VPOS OR VNEG
AD8336
+
PREAMP
–
4
49.9Ω
9
8
12
5
10
11
1
DIFFERENTIAL
FET PROBE
301Ω
9
8
DMM
(–I)
12
11
06228-068
301Ω
VGAIN
100Ω
06228-071
100Ω
Figure 71. PSRR
Figure 68. Supply Current
NETWORK ANALYZER
SPECTRUM ANALYZER
OUT
IN
50Ω
50Ω
IN
50Ω
453Ω
AD8336
AD8336
100Ω
100Ω
5
49.9Ω
+
PREAMP
–
+
PREAMP
–
4
1
5
8
12
9
1
11
9
8
301Ω
12
11
VGAIN
06228-069
301Ω
0.7V
100Ω
Figure 69. Frequency Response, Inverting Gain
06228-072
4
Figure 72. Input-Referred Noise vs. Source Resistance
SPECTRUM ANALYZER
OSCILLOSCOPE
PULSE
GENERATOR
POWER
SPLITTER
IN
CH1
OUT
CH2
50Ω
50Ω
50Ω
AD8336
AD8336
4
5
+
PREAMP
–
1
453Ω
5
49.9Ω
1
8
301Ω
8
9
12
0.7V
9
12
11
301Ω
11
06228-070
100Ω
4
100Ω
Figure 70. Pulse Response, Inverting Gain
0.7V
06228-073
100Ω
+
PREAMP
–
Figure 73. Short-Circuit Input-Referred Noise vs. Frequency
Rev. D | Page 18 of 28
Data Sheet
AD8336
SPECTRUM
ANALYZER
SIGNAL
GENERATOR
IN
OUT
50Ω
50Ω
OPTIONAL 20dB
ATTENUATOR
22dB
AD8336
49.9Ω
453Ω
+
PREAMP
–
4
5
1
8
9
12
11
301Ω
06228-074
VGAIN
100Ω
Figure 74. IP1dB vs. VGAIN
SPECTRUM
ANALYZER
SIGNAL
GENERATOR
OUT
IN
50Ω
50Ω
–20dB
AD8336 AMPLIFIER
49.9Ω
5
4
1
5
8
9
12
11
301Ω
453Ω
+
PREAMP
–
1
8
9
12
11
301Ω
0.7V
100Ω
VGAIN
100Ω
06228-075
4
AD8336 DUT
0Ω
+
PREAMP
–
Figure 75. IP1dB vs. VGAIN, High Signal Level Inputs
SPECTRUM ANALYZER
INPUT
50Ω
–6dB
COMBINER
–6dB
4
+22dB
–6dB
453Ω
AD8336 DUT
49.9Ω
5
SIGNAL
GENERATOR
+
PREAMP
–
1
8
9
12
11
301Ω
100Ω
Figure 76. IMD and OIP3
Rev. D | Page 19 of 28
VGAIN
06228-076
+22dB
SIGNAL
GENERATOR
AD8336
Data Sheet
THEORY OF OPERATION
OVERVIEW
PREAMPLIFIER
The AD8336 is the first VGA designed for operation over
exceptionally broad ranges of temperature and supply voltage.
The performance has been characterized from temperatures
extending from −55°C to +125°C, and supply voltages from ±3 V
to ±12 V. It is ideal for applications requiring dc coupling, large
output voltage swings, very large gain ranges, extreme temperature
variations, or a combination thereof.
The gain of the uncommitted voltage feedback preamplifier is set
with external resistors. The combined preamplifier and VGA gain
is specified in two ranges: −14 dB to +46 dB and 0 dB to 60 dB.
Since the VGA gain is fixed at 34 dB (50×), the preamplifier
gain is adjusted for gains of 12 dB (4×) and 26 dB (200×).
The simplified block diagram is shown in Figure 77. The
AD8336 includes a voltage feedback preamplifier, an amplifier
with a fixed gain of 34 dB, a 60 dB attenuator, and various bias
and interface circuitry. The independent voltage feedback
operational amplifier can be used in noninverting and inverting
configurations and functions as a preamplifier to the variable gain
amplifier (VGA). If desired, the preamplifier output (PRAO)
and VGA input (VGAI) pins provide for connection of an
interstage filter to eliminate noise and offset. The bandwidth of
the AD8336 is dc to 100 MHz with a gain range of 60 dB (−14 dB
to +46 dB).
For applications that require large supply voltages, a reduction
in power is advantageous. The power reduction pin (PWRA)
permits the power and bandwidth to be reduced by about half
in such applications.
PRAO VGAI
12dB
INPP
*
+
INPN PREAMP
–
–60dB TO 0dB
ATTENUATOR
AND GAIN
1.28kΩ CONTROL
INTERFACE
34dB
+
_
RFB2
301Ω
VOUT
4.48kΩ
91.43Ω
RFB1
100Ω
With low preamplifier gains between 2× and 4×, it can be desirable
to reduce the high frequency gain with a shunt capacitor across
RFB2 to ameliorate peaking in the frequency domain (see Figure 77).
To maintain stability, the gain of the preamplifier must be 6 dB
(2×) or greater.
Typical of voltage feedback amplifier configurations, the gainbandwidth product of the AD8336 is fixed (at 600); therefore,
the bandwidth decreases as the gain is increased beyond the
nominal gain value of 4×. For example, if the preamplifier gain
is increased to 20×, the bandwidth reduces by a factor of 5 to
about 20 MHz. The −3 dB bandwidth of the preamplifier with a
gain of 4× is about 150 MHz, and for the 20× gain is about 30 MHz.
The preamplifier gain diminishes for an amplifier configured
for inverting gain, using the same value of feedback resistors as for
a noninverting amplifier, but the bandwidth remains unchanged.
For example, if the noninverting gain is 4×, the inverting gain is
−3×, but the bandwidth stays the same as in the noninverting gain
of 4×. However, because the output-referred noise of the
preamplifier is the same in both cases, the input-referred noise
increases as the ratio of the two gain values increases. For the
previous example, the input-referred noise increases by a factor
of 4/3.
The output swing of the preamplifier is the same as for the VGA.
PWRA VPOS VNEG
GPOS
GNEG
VCOM
*OPTIONAL DEPEAKING CAPACITOR. SEE TEXT.
06228-077
BIAS
Figure 77. Simplified Block Diagram
To maintain low noise, the output stages of both the preamplifier
and the VGA are capable of driving relatively small load resistances.
However, at the largest supply voltages, the signal current can
exceed safe operating limits for the amplifiers and, therefore,
the load current must not exceed 50 mA. With a ±12 V supply
and ±10 V output voltage at the preamplifier or VGA output,
load resistances as low as 200 Ω are acceptable.
For power supply voltages ≥ ±10 V, the maximum operating
temperature range is derated to +85°C because the power can
exceed safe limits (see the Absolute Maximum Ratings section).
Because harmonic distortion products can increase for various
combinations of low impedance loads and high output voltage
swings, it is recommended that the user determine load and
drive conditions empirically.
VGA
The architecture of the variable gain amplifier (VGA) section
of the AD8336 is based on the Analog Devices, Inc., X-AMP
(exponential amplifier), found in a wide variety of Analog Devices
variable gain amplifiers. This type of VGA combines a ladder
attenuator and interpolator, followed by a fixed-gain amplifier.
The gain control interface is fully differential, permitting positive
or negative gain slopes. Note that the common-mode voltage of
the gain control inputs increases with increasing supply.
The gain slope is 50 dB/V and the intercept is 16.4 dB when the
nominal preamplifier gain is 4× (12 dB). The intercept changes
with the preamplifier gain; for example, when the preamplifier
gain is set to 20× (26 dB), the intercept becomes 30.4 dB.
Pin VGAI is connected to the input of the ladder attenuator.
The ladder ratio is R/2R and the nominal resistance is 320 Ω. To
reduce preamplifier loading and large-signal dissipation, the
input resistance at Pin VGAI is 1.28 kΩ. Safe current density
and power dissipation levels are maintained even when large dc
signals are applied to the ladder.
Rev. D | Page 20 of 28
Data Sheet
AD8336
The tap resistance of the resistors within the R/2R ladder is
640 Ω/3, or 213.3 Ω, and is the Johnson noise source of the
attenuator.
NOISE
The noise of the AD8336 is dependent on the value of the VGA
gain. At maximum VGAIN, the dominant noise source is the
preamplifier, but it shifts to the VGA as VGAIN diminishes.
SETTING THE GAIN
The overall gain of the AD8336 is the sum (in decibels) or the
product (magnitude) of the preamplifier gain and the VGA gain.
The preamplifier gain is calculated as with any operational
amplifier, as seen in the Applications Information section. It is
most convenient to think of the device gain in exponential terms
(that is, in decibels) since the VGA responds linearly in decibels
with changes in control voltage VGAIN at the gain pins.

50 dB 
VGA Gain (dB)  V GAIN (V) 
 4. 4 dB
V 

where VGAIN = VGPOS − VGNEG.
The gain and gain range of the VGA are both fixed at 34 dB and
60 dB, respectively; thus, the composite device gain is changed by
adjusting the preamplifier gain. For a preamplifier gain of 12 dB
(4×), the composite gain is −14 dB to +46 dB. Therefore, the
calculation for the composite gain (in decibels) is
Composite Gain = GPRA + [VGAIN (V) × 49.9 dB/V] + 4.4 dB
For example, the midpoint gain when the preamplifier gain is
12 dB is
12 dB + [0 V × 49.9 dB/V] + 4.4 dB = 16.4 dB
Figure 3 is a plot of gain in decibels vs. VGAIN in millivolts, when
the preamplifier gain is 12 dB (4×). Note that the computed
result closely matches the plot of actual gain.
In Figure 3, the gain slope flattens at the limits of the VGAIN
input. The gain response is linear in dB over the center 80% of
the control range of the device. Figure 78 shows the ideal gain
characteristics for the VGA stage gain, the composite gain, and
the preamplifier gain.
60
GAIN CHARACTERISTICS
COMPOSITE GAIN
VGA STAGE GAIN
50
GAIN (dB)
40
30
FOR PREAMP GAIN = 26dB
FOR PREAMP GAIN = 12dB
FOR PREAMP GAIN = 6dB
–0.3
–0.1
0.1
VGAIN (V)
0.3
0.5
Figure 78. Ideal Gain Characteristics of the AD8336
0.7
06228-078
–20
–0.5
At other than maximum gain, the noise of the VGA is
determined from the output noise. The noise in the center of
the gain range is about 150 nV/Hz. Because the gain of the
fixed-gain amplifier that is part of the VGA is 50×, the VGA
input-referred noise is approximately 3 nV/Hz, the same value
as the preamplifier and VGA combined. This is expected since
the input-referred noise is the same at the input of the attenuator at
maximum gain. However, the noise referred to the VGAI pin (the
preamplifier output) increases by the amount of attenuation
through the ladder network. The noise at any point along the
ladder network is primarily composed of the ladder resistance
noise, the noise of the input devices, and the feedback resistor
network noise. The ladder network and the input devices are
the largest noise sources.
Extensive cancellation circuitry included in the variable gain
amplifier section minimizes locally generated offset voltages.
However, when operated at very large values of gain, dc voltage
errors at the output can still result from small dc input voltages.
When configured for the nominal gain range of −14 dB to +46 dB,
the maximum gain is 200× and an offset of only 100 μV at the
input generates 20 mV at the output.
10
–30
–0.7
Using the values listed in Table 4, the total noise of the AD8336
is slightly less than 3 nV/Hz, referred to the input. Although
the input noise referred to the VGA is 3.1 nV/Hz, the inputreferred noise at the preamplifier is 0.77 nV/Hz when divided
by the preamplifier gain of 4×.
OFFSET VOLTAGE
20
–10
Noise Voltage (nV/√Hz)
2.6
0.96
0.55
0.77
At minimum gain, the output noise increases slightly to about
180 nV/Hz because of the finite structure of the X-AMP.
USABLE GAIN RANGE OF
AD8336
0
Table 4. AD8336 Noise Components for Preamplifier Gain = 4×
Noise Component
Op Amp (Gain = 4×)
RFB1 = 100 Ω
RFB2 = 301 Ω
VGA
The gain equation for the VGA is
70
The input-referred noise at the highest VGA gain and a
preamplifier gain of 4×, with RFB1 = 100 Ω and RFB2 = 301 Ω, is
3 nV/Hz and is determined by the preamplifier and the gain
setting resistors. See Table 4 for the noise components for the
preamplifier.
The primary source for dc offset errors is the preamplifier;
ac coupling between the PRAO and VGAI pins is the simplest
solution. In applications where dc coupling is essential, a compensating current can be injected at the INPN input (Pin 5) to
cancel preamplifier offset. The direction of the compensating
current depends on the polarity of the offset voltage.
Rev. D | Page 21 of 28
AD8336
Data Sheet
APPLICATIONS INFORMATION
AMPLIFIER CONFIGURATION
Circuit Configuration for Noninverting Gain
The AD8336 amplifiers can be configured in various options. In
addition to the 60 dB gain range variable gain stage, an uncommitted voltage gain amplifier is available to the user as a preamplifier.
The preamplifier connections are separate to enable noninverting
or inverting gain configurations or the use of interstage filtering.
The AD8336 can be used as a cascade connected VGA with preamp input, as a standalone VGA, or as a standalone preamplifier.
This section describes some of the possible applications.
The noninverting configuration is shown in Figure 80. The
preamplifier gain is described by the classical operational
amplifier gain equation:
INPN 5
VGAI
8
9
+
PREAMP
–
ATTENUATOR
–60dB TO 0dB
34dB
1
VOUT
AD8336
R FB 2
The practical gain limits for this amplifier are 6 dB to 26 dB.
The gain bandwidth product is about 600 MHz, so at 150 MHz,
the maximum achievable gain is 12 dB (4×). The minimum gain
is established internally by fixed loop compensation and is 6 dB
(2×). This amplifier is not designed for unity-gain operation.
Table 5 shows the gain and bandwidth for the noninverting gain
configuration.
INPP
PWRA 2
INPN
GAIN CONTROL
INTERFACE
BIAS
1
R FB 1
RFB1
100Ω
AD8336
5
RFB2
301Ω
13
3
11
12
VNEG
VPOS
VCOM
GPOS
GNEG
06228-079
8
10
PREAMPLIFIER
4
–60dB TO 0dB
GAIN = 12dB
1
VOUT
PWRA VNEG VCOM VPOS
VGAI
9
2
10
–5V
Figure 79. Application Block Diagram
34dB
PRAO
3
13
+5V
06228-080
INPP 4
PRAO
Gain 
Figure 80. Circuit Configuration for Noninverting Gain
PREAMPLIFIER
While observing just a few constraints, the uncommitted voltage
feedback preamplifier of the AD8336 can be connected in a variety
of standard high frequency operational amplifier configurations.
The amplifier is optimized for a gain of 4× (12 dB) and has a gain
bandwidth product of 600 MHz. At a gain of 4×, the bandwidth
is 150 MHz. The preamplifier gain can be adjusted to a minimum
gain of 2×; however, there will be a small peak in the response at
high frequencies. At higher preamplifier gains, the bandwidth
diminishes proportionally in conformance to the classical voltage
gain amplifier GBW relationship.
While setting the overall gain of the AD8336, the user must
consider the input-referred offset voltage of the preamplifier.
Although the offset of the attenuator and postamplifier are
almost negligible, the preamplifier offset voltage, if uncorrected,
is increased by the combined gain of the preamplifier and postamplifier. Therefore, for a maximum gain of 60 dB, an input offset
voltage of only 200 μV results in an error of 200 mV at the output.
The preamplifier output reliably sources and sinks currents up
to 50 mA. When using ±5 V power supplies, the suggested sum
of the output resistor values is 400 Ω total for the optimal tradeoff between distortion and noise. Much of the low gain value
device characterization was performed with resistor values of
301 Ω and 100 Ω, resulting in a preamplifier gain of 12 dB (4×).
With supply voltages between ±5 V and ±12 V, the sum of the
output resistance must be increased accordingly; a total
resistance of 1 kΩ is recommended. Larger resistance values,
subject to a trade-off in higher noise performance, can be used
if circuit power and load driving is an issue. When considering
the total power dissipation, remember that the input ladder
resistance of the VGA is part of the preamplifier load.
Table 5. Gain and Bandwidth for Noninverting Preamplifier
Configuration
Preamplifier Gain
Numerical
dB
4×
12
8×
18
16×
24
20×
26
Rev. D | Page 22 of 28
Preamplifier
BW (MHz)
150
60
30
25
Composite
Gain (dB)
−14 to +46
−8 to +52
−2 to +58
0 to +60
Data Sheet
AD8336
Circuit Configuration for Inverting Gain
USING THE POWER ADJUST FEATURE
The preamplifier can also be used in an inverting configuration,
as shown in Figure 81.
The AD8336 has the provision to operate at lower power with a
trade-off in bandwidth. The power reduction applies to the
preamplifier and the VGA sections, and the bandwidth is reduced
equally between them. Reducing the power is particularly useful
when operating with higher supply voltages and lower values of
output loading that otherwise stresses the output amplifiers. When
Pin PWRA is grounded, the amplifiers operate in their default
mode, and the combined 3 dB bandwidth is 80 MHz with the
preamplifier gain adjusted to 4×. When the voltage on Pin PWRA
is between 1.2 V and 5 V, the power is reduced by approximately
half and the 3 dB bandwidth reduces to approximately 35 MHz.
The voltage at Pin PWRA must not exceed 5 V.
AD8336
GAIN = 9.6dB INPN
RFB1
100Ω
RFB2
301Ω
PREAMPLIFIER
4
+
5
–
–60dB TO 0dB
8
34dB
1
VOUT
PRAO
VGAI
PWRA VNEG VCOM VPOS
9
2
10
–5V
3
13
+5V
06228-081
INPP
Figure 81. Circuit Configuration for Inverting Gain
The considerations regarding total resistance vs. distortion, noise,
and power that were noted in the noninverting case also apply
in the inverting case, except that the amplifier can be operated
at unity inverting gain. The signal gain is reduced while the
noise gain is the same as for the noninverting configuration:
Signal Gain 
RFB2
RFB1
and
Noise Gain 
RFB2
1
RFB1
DRIVING CAPACITIVE LOADS
The output stages of the AD8336 are stable with capacitive loads
up to 47 pF for a supply voltage of ±3 V and with capacitive loads
up to 10 pF for supply voltages up to ±8 V. For larger combined
values of load capacitance and/or supply voltage, a 20 Ω series
resistor is recommended for stability.
The influence of capacitance and supply voltage are shown in
Figure 50 and Figure 51, where representative combinations of
load capacitance and supply voltage requiring a 20 Ω resistor
are marked with an asterisk. No resistor is required for the ±3 V
plots in Figure 49, but a resistor is required for most of the ±12 V
plots in Figure 51.
Rev. D | Page 23 of 28
AD8336
Data Sheet
EVALUATION BOARD
An evaluation board, AD8336-EVALZ, is available online for
the AD8336. Figure 82 is a photo of the board.
The board is shipped from the factory configured for a noninverting preamplifier gain of 4×. To change the value of the
gain of the preamplifier or to change the gain polarity to inverting,
alter the component values or install components in the alternate
locations provided. All components are standard 0603 size, and
the board is compliant with RoHS requirements. Table 6 shows
the components to be removed and added to change the amplifier
configuration to inverting gain.
Remove
R4, R7
06228-083
Table 6. Component Changes for Inverting Configuration
Install
R5, R6
Figure 82. AD8336 Evaluation Board
The AD8336 features differential inputs for the gain control,
permitting nonzero or floating gain control inputs. To avoid any
delay in making the board operational, the gain input circuit is
shipped with Pin GNEG connected to ground via a 0 Ω resistor
in the R17 location. The user can adjust the gain of the device
by driving the GPOS test loop with a power supply or voltage
reference. Optional resistor networks R15/R17 and R13/R14
provide fixed-gain bias voltages at Pin GNEG and Pin GPOS for
non-zero common-mode voltages. The gain control can also be
driven with an active input such as a ramp. Provision is made for
an optional SMA connector at PRVG for monitoring the
preamplifier output or for driving the VGA from an external
source. Remove the 0 Ω resistor at R9 to isolate the preamplifier
from an external generator. The capacitor at Location C1 limits
the bandwidth of the preamplifier.
06228-084
OPTIONAL CIRCUITRY
Figure 83. Component Side Copper
BOARD LAYOUT CONSIDERATIONS
06228-085
The evaluation board uses four layers, with power and ground
planes located between two conductor layers. This arrangement
is highly recommended for customers, and several views of the
board are provided as reference for board layout details. When
laying out a printed circuit board for the AD8336, remember to
provide a pad beneath the device to solder the exposed pad of
the matching device. The pad in the board must have at least
five vias to provide a thermal path for the chip scale package.
Unlike leaded devices, the thermal pad is the primary means
to remove heat dissipated within the device.
Figure 84. Secondary Side Copper
Rev. D | Page 24 of 28
AD8336
06228-086
Data Sheet
06228-087
Figure 85. Component Side Silkscreen
06228-088
Figure 86. Internal Ground Plane Copper
Figure 87. Internal Power Plane Copper
Rev. D | Page 25 of 28
AD8336
Data Sheet
VPOS
GND GND1 GND2 GND3
+
L2
120nH
R1
0Ω
VOUT
VOUTL
VP
R16
4.99kΩ
CR1
5.1V
16
15
14
13
NC NC NC VPOS
1
LOW
R3
0Ω
VIN
R2
49.9Ω
C3
0.1µF
VOUTD
C8
0.1µF
NORM
VIN1
VOUT
3
GNEG
R4
0Ω
4
GPOS
AD8336
VCOM
VNEG
INPP
VGAI
R7
100Ω
GNEG
R17
0Ω
12
R14
11
GPOS
C7
1nF
10
C5
9 0.1µF
INPN NC NC PRAO
5
6
7
8
R8
301Ω
R15
C6
1nF
U1
POWER 2 PWRA
R6
R5
VP
L1
120nH
+
R11
0Ω
R9
0Ω
R13
R12
0Ω
C2
10µF
25V
–VS
PRVG
R10
49.9Ω
C1
NC = NO CONNECT. DO NOT CONNECT TO THIS PIN.
Figure 88. AD8336-EVALZ Schematic Shown as Shipped, Configured for a Noninverting Gain of 4×
Rev. D | Page 26 of 28
06228-082
C4
10µF
35V
Data Sheet
AD8336
OUTLINE DIMENSIONS
DETAIL A
(JEDEC 95)
0.35
0.30
0.25
13
0.65
BSC
PIN 1
INDIC ATOR AREA OPTIONS
(SEE DETAIL A)
16
1
12
2.25
2.10 SQ
1.95
EXPOSED
PAD
9
TOP VIEW
PKG-004025/5112
0.80
0.75
0.70
SEATING
PLANE
0.70
0.60
0.50
4
5
8
BOTTOM VIEW
0.05 MAX
0.02 NOM
COPLANARITY
0.08
0.203 REF
0.25 MIN
FOR PROPER CONNECTION OF
THE EXPOSED PAD, REFER TO
THE PIN CONFIGURATION AND
FUNCTION DESCRIPTIONS
SECTION OF THIS DATA SHEET.
COMPLIANT TO JEDEC STANDARDS MO-220-WGGC.
04-15-2016-A
PIN 1
INDICATOR
4.10
4.00 SQ
3.90
Figure 89. 16-Lead Lead Frame Chip Scale Package [LFCSP]
4 mm × 4 mm Body and 0.75 mm Package Height
(CP-16-23)
Dimensions shown in millimeters
ORDERING GUIDE
Model 1
AD8336ACPZ-R7
AD8336ACPZ-RL
AD8336ACPZ-WP
AD8336-EVALZ
1
Temperature Range
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
Package Description
16-Lead Lead Frame Chip Scale Package [LFCSP]
16-Lead Lead Frame Chip Scale Package [LFCSP]
16-Lead Lead Frame Chip Scale Package [LFCSP]
Evaluation Board
Z = RoHS Compliant Part.
Rev. D | Page 27 of 28
Package Option
CP-16-23
CP-16-23
CP-16-23
AD8336
Data Sheet
NOTES
©2006–2016 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D06228-0-5/16(D)
Rev. D | Page 28 of 28