PD70224 IdealBridge™ Dual MOSFET-based Bridge Rectifier Description Features PD70224 is a dual pack of MOSFET-based full-bridge rectifiers. It contains low-RDS 0.16Ω N-channel MOSFETs for much higher overall efficiency and higher output power, particularly when used in Powered Devices for Power over Ethernet (PoE) applications. The entire drive circuitry for driving the MOSFETs is on-chip, including a charge pump for driving the high-side N-channel MOSFETs. The total forward drop (bridge offset) introduced by the IdealBridge™ rectifier is only 192mV at 0.6A, compared to a standard bridge rectifier that typically presents 2000mV of forward drop. ♦ Active circuit with low forward-drop to replace dissipative passive diode bridges PD70224 IdealBridge™ can support over 1A current, making it the ideal choice not only for modern energysaving 2-pair applications compliant with IEEE802.3af and IEEE802.3at (Type 1 and Type 2), but also 4-pair Powered Devices such as UPOE and POH (Power over HDBase-T, 95W). In addition, PD70224 is capable of helping to identify at the physical layer itself whether a 2-pair PSE or a 4-pair PSE is providing power over the cable. It does that by sensing the voltage on the line (un-rectified) side of the pairs. ♦ Self-contained drive circuitry for MOSFETs ♦ Designed to support IEEE802.3af/at, UPOE and Power over HDBase-T (PoH) ♦ Integrated 0.16Ω N-Channel MOSFETs for 0.32Ω total path resistance ♦ “Power present” indicator signals for identifying 4-pair bridge power ♦ Low leakage, < 10µA during detection ♦ Wide operating voltage range up to 57V ♦ -40°C to +85°C ambient ♦ Available in 40 pin package ♦ RoHS Compliant Applications • Power over Ethernet (all IEEE compliant 2-pair modes) • Proprietary 4-pair standards, UPOE (Universal PoE) and POH Figure 1 Copyright © 2014 Rev. 1.2., November 25, 2014 Microsemi Analog Mixed Signal Group One Enterprise Aliso Viejo, CA 92656 USA CONFIDENTIAL Page 1 PD70224 IdealBridge™ Dual MOSFET-based Bridge Rectifier Pin Configuration and Pinout Figure 2: Internal Construction and Pinout Ordering Information Ambient Temperature Type Package Part Number Packaging Type Part Marking -40 to 85°C RoHS compliant, Pbfree, MSL3 MLP-Quad (40 lead) PD70224ILQ Bulk/Tube PD70224ILQ-TR Tape and Reel Microsemi Logo MSC PD70224 YYWWX* *Year / Week / Lot number Copyright © 2014 Rev. 1.2., November 25, 2014 Microsemi Analog Mixed Signal Group One Enterprise Aliso Viejo, CA 92656 USA CONFIDENTIAL Page 2 PD70224 IdealBridge™ Dual MOSFET-based Bridge Rectifier Pin Number PD70224 Pin Designator Description 1, 2, 3 4 5, 6, 7, 8 9 10, 11, 12 13, 14 OUTP N.A. IN2B N.A. OUTN IN2A 15 16 N.A. SUPP_SA 17 N.A. SUPP_SB 18 19, 20 N.A. IN1A 21, 22, 23 OUTN 24 25, 26, 27, 28 29 30, 31, 32 N.A. IN1B N.A. OUTP Rectified positive (upper) rail shared by both bridges Not applicable (pin not present) Input “2” of bridge rectifier number B Not applicable (pin not present) Rectified negative (lower) rail shared by both bridges Input “2” of bridge rectifier number A. Same as Pins 39 and 40. Note: These pins are not shorted to pins 39 and 40 inside the device. The device functionality relies on a copper trace on the PCB, between pins 13, 14, 39 and 40. Not applicable (pin not present) Input power supply detect pin for bride rectifier number A. Goes high when pairs connected to this bridge are powered by the PSE Not applicable (pin not present) Input power supply detect pin for bride rectifier number B. Goes high when pairs connected to this bridge are powered by the PSE Not applicable (pin not present) Input “1” of bridge rectifier number A. Same as Pins 33 and 34. Note: These pins are not shorted to pins 33 and 34 inside the device. The device functionality relies on a copper trace on the PCB, between pins 33, 34, 19 and 20. Rectified negative (lower) rail shared by both bridges, same as Pins 10, 11 and 12 Not applicable (pin not present) Input “1” of bridge rectifier number B Not applicable (pin not present) Rectified positive (upper) rail shared by both bridges. Same as Pins 1, 2 and 3 MLP-Quad 40 lead Copyright © 2014 Rev. 1.2., November 25, 2014 Microsemi Analog Mixed Signal Group One Enterprise Aliso Viejo, CA 92656 USA CONFIDENTIAL Page 3 PD70224 IdealBridge™ Dual MOSFET-based Bridge Rectifier 33, 34 IN1A 35 36 N.A. WA_EN 37 38 39, 40 N.A. N.C N.A. IN2A 41 42 EPAD1 EPAD2 Copyright © 2014 Rev. 1.2., November 25, 2014 Input “1” of bridge rectifier number A. Same as Pins 19 and 20. Note: These pins are not shorted to pins 19 and 20 inside the device. The device functionality relies on a copper trace on the PCB, between pins 33, 34, 19 and 20. Not applicable (pin not present) While this input is low (referenced to OUTN) the chip work according to internal flow diagram. When this input is high, it enable wall adapter feature, i.e. turn OFF internal switches and act as regular diode bridge. Not applicable (pin not present) Not connected; do not connect externally (leave floating) Not applicable (pin not present) Input “2” of bridge rectifier number A. Same as Pins 13 and 14. Note: These pins are not shorted to pins 13 and 14 inside the device. The device functionality relies on a copper trace on the PCB, between pins 13, 14, 39 and 40. Connect to OUTP on PCB Connect to OUTN on PCB Microsemi Analog Mixed Signal Group One Enterprise Aliso Viejo, CA 92656 USA CONFIDENTIAL Page 4 PD70224 IdealBridge™ Dual MOSFET-based Bridge Rectifier Figure 3: Block Diagram Copyright © 2014 Rev. 1.2., November 25, 2014 Microsemi Analog Mixed Signal Group One Enterprise Aliso Viejo, CA 92656 USA CONFIDENTIAL Page 5 PD70224 IdealBridge™ Dual MOSFET-based Bridge Rectifier Figure 4: Principle of Operation Copyright © 2014 Rev. 1.2., November 25, 2014 Microsemi Analog Mixed Signal Group One Enterprise Aliso Viejo, CA 92656 USA CONFIDENTIAL Page 6 PD70224 IdealBridge™ Dual MOSFET-based Bridge Rectifier Absolute Maximum Ratings Performance is not necessarily guaranteed over this entire range. These are maximum stress ratings only. Exceeding these ratings, even momentarily, can cause immediate damage, or negatively impact long-term operating reliability. IN1A, IN1B, IN2A, IN2B to OUTN IN1A to IN2A IN1B to IN2B IN1A, IN1B, IN2A, IN2B to OUTP IN1A, IN2A to IN1B IN1A, IN2A to IN2B OUTP to OUTN OUTP to IN1A, IN1B, IN2A, IN2B SUPP_SA, SUPP_SB to OUTN WA_EN to OUTN IINA, IINB (currents through bridge A or B) Junction Temperature Lead Soldering Temperature (40s, reflow) Storage Temperature ESD rating HBM MM CDM Min -0.3 -0.3 -0.3 -74 -0.3 -0.3 -0.3 -0.3 -0.3 -0.3 -65 Max 74 74 74 74 74 74 74 74 5.5 1.5 150 260 150 ±1250 * ±100 ±2000 Units V V V V V V V V V V A °C °C °C V V V (*) All pins pass 1250v, Except IN1A and IN2A that Pass 1000v Note: EPAD1 is connected by copper plane on PCB to OUTP, and EPAD2 is similarly connected to OUTN. OUTN is ground for IC. Operating Ratings Performance is generally guaranteed over this range as further detailed below under Electrical Characteristics. Min IN1A, IN1B to OUTN IN2A, IN2B to OUTN WA_EN to OUTN Junction Temperature Port Current (IINx) -0.3 -40 0 Max 57 57 5 125 1.5 Units V V V °C A Note: Corresponding Ambient Temperature is -40 to 85 °C Copyright © 2014 Rev. 1.2., November 25, 2014 Microsemi Analog Mixed Signal Group One Enterprise Aliso Viejo, CA 92656 USA CONFIDENTIAL Page 7 PD70224 IdealBridge™ Dual MOSFET-based Bridge Rectifier Thermal Properties Thermal Resistance θJA θJL θJC Min Typ 31 2.5 5 Max Units °C/W °C/W °C/W Note: The θJx numbers assume no forced airflow. Junction Temperature is calculated using TJ = TA + (PD x θJA). In particular, θJA is a function of the PCB construction. The stated number above is for a four-layer board in accordance with JESD-51 (JEDEC). Electrical Characteristics Unless otherwise specified under conditions, the Min and Max ratings stated below apply over the entire specified operating ratings of the device. Typ values stated are either by design or by production testing at 25°C ambient. Symbol VINx Parameter Conditions Input Voltage for Bridge “x”, where x is “A” or “B”. ∆IQ Differential Quiescent Current I(Vin=10.1V) – I(Vin=2.5V); IQ Quiescent Current (single bridge) Quiescent Current (both bridge combined) VTURN_ON 2.5V < VINx < 10.1V; No load between OUTP & OUTN; No load on SUPP_Sx pins. 10.2V < VINx < 23V; No load between OUTP & OUTN; No load on SUPP_Sx pins. VINx = 55V; No load between OUTP & OUTN; No load on SUPP_Sx pins. Active turn-on voltage of FETs Copyright © 2014 Rev. 1.2., November 25, 2014 Min 23.1 Microsemi Analog Mixed Signal Group One Enterprise Aliso Viejo, CA 92656 USA CONFIDENTIAL Typ Max 57 Units V 6 10 µA 85 µA 900 µA 32 V 27.5 Page 8 PD70224 IdealBridge™ Dual MOSFET-based Bridge Rectifier Symbol VHYST TALT VOFFSET RDS IR VBFD IMAX_Off IMAX_On IMAX_LOAD VD_SUPP IMAX _SUPP Parameter Conditions Turn-on voltage hysteresis Alternate input voltage polarity – Delay time required (Vin = 0V) while alternating input voltage polarity Bridge offset @ Off state VINx < VTURN_ON, two body diodes in series IINx = 40mA FET Drain to Source ID = 0.6A TJ = 25oC Resistance ID = 0.6A; -40oC ≤ TJ ≤ 125oC Leakage Current VOUTP – VOUTN = 57V (Reverse) Backfeed Voltage Between input terminals with 100kΩ resistor across them and 57V between OUTP and OUTN Maximum Forward Current (per bridge) below VTURN_ON Maximum input Current above VTURN_ON. Per bridge, while only one bridge out of the two is active. Maximum Load Current above VTURN_ON. Per device while two bridges are active and each bridge is supporting half load Maximum voltage drop Supp_Sx Loaded with between INx to SUPP_Sx 100kΩ resistor pins Maximum current to Copyright © 2014 Rev. 1.2., November 25, 2014 Microsemi Analog Mixed Signal Group One Enterprise Aliso Viejo, CA 92656 USA CONFIDENTIAL Min Typ 0.4 Max 200 Units V ms 0.16 1.8 V 0.26 0.38 Ω Ω 80 µA 2.7 V 0.45 A 1.5 A 2 A 2 V 10 mA Page 9 PD70224 IdealBridge™ Dual MOSFET-based Bridge Rectifier VIH VIL consume from SUPP_Sx pins WA_EN - Input high logic WA_EN - Input low logic 1.35 1.05 V V PD70224 SOA 10 9 Input Current (A) 8 7 1mS 6 10mS 5 100mS 1S 4 Single Pulse Temp = 25degC 3 2 70 75 80 85 90 Input Voltage (V) 95 100 105 Figure 5: Safe Operating Area Copyright © 2014 Rev. 1.2., November 25, 2014 Microsemi Analog Mixed Signal Group One Enterprise Aliso Viejo, CA 92656 USA CONFIDENTIAL Page 10 PD70224 IdealBridge™ Dual MOSFET-based Bridge Rectifier Applications Information PD70224 application is described in the following paragraph Peripheral devices PD applications utilizing PD70224 IC should use 1nF/100V ceramic capacitor at Bridge A inputs and at Bridge B inputs. A unidirectional 58V TVS should be placed between device output pins. An 10K ohm resistor should be placed on SUPP_SA and SUPP_SB lines between PD70224 and PD70210A device. When WA_EN function is not used connect WA_EN pin to OUTN Pin. When WA_EN function is used connect a 10V/100nF capacitor between WA_EN pin and OUTN Pin. The Devices are presented in Figure 6 and Figure 7. Operation with an External DC Source PD applications utilizing PD70224 IC may be operated with an external power source (DC wall adaptor). There are two cases of providing power with an external source, the cases are presented in Figure 6 and Figure 7. 1) External source connected to application’s low voltage supply rails. External source voltage level is dependent on DCDC output characteristics. This connection is not affected by the PD70224 use. 2) External source connected to PD device output connection toward the application (VPP to VPNOUT). External source voltage level is dependent on DCDC input requirements. Figure 6: External Power Input connected to Application supply Rails Copyright © 2014 Rev. 1.2., November 25, 2014 Microsemi Analog Mixed Signal Group One Enterprise Aliso Viejo, CA 92656 USA CONFIDENTIAL Page 11 PD70224 IdealBridge™ Dual MOSFET-based Bridge Rectifier Figure 7: External Power Input connected to PD70210A Output External source connected to PD device output (Figure 7) PD70224 WA_EN pin will be used for protecting the PSE when an external adapter is connected. In this mode the risk to PSE side exists, when a higher voltage external adapter is hot connected to the system. When WA_EN input voltage is higher than its threshold level, PD70224 internal FETs are disabled, converting the device into standard diode bridge. The PD70210A has a specific input pin, to disable the isolation switch, when an External adapter is connected. In this case WA_EN resistors divider depends on the “turn off” threshold of the PD70210A and of PD70224. Figure 8 is zooming into the resistors to be selected in external adapter connection. Figure 8: External Power Input resistors dividers Copyright © 2014 Rev. 1.2., November 25, 2014 Microsemi Analog Mixed Signal Group One Enterprise Aliso Viejo, CA 92656 USA CONFIDENTIAL Page 12 PD70224 IdealBridge™ Dual MOSFET-based Bridge Rectifier R1 and R2 sets a rough threshold for Pfet Q1 enable, to detect whether external adapter exists or not. It should be set to be lower threshold than PD70224 and PD70210A disable levels. R3, R4 and R5 sets PD70210A disable threshold and PD70224 disable threshold. PD70210A disable threshold should be set so that it will always be lower than PD70224 disable threshold. 1 Volt is a good choice for the margin between the two. So in case of 44V-57V external adapter. The disable setting can be selected as follows: Pfet enable threshold = 35V. PD70224 disable threshold = 43V. R1 and R2 setting should be so that the value of Q1 VGS < 20V at max voltage condition of external adapter. While external adapter voltage is above 35V, Q1 will be above its VGSth value. _ 1 1 2 Suppose VGSth is 3.5V thus we will set VGS=5V. R1 is selected as 2KΩ. 2 1 _ Using R1=2KΩ, Vext_adapter=30V and VGS= maximum VGSth =3.5V. we get R2 value. 2 15Ω 70210__ _ _70210x 2 1 4 3 4" _ 2 60ΩR3, R4 and R5 are set using the two equations below: Copyright © 2014 Rev. 1.2., November 25, 2014 Microsemi Analog Mixed Signal Group One Enterprise Aliso Viejo, CA 92656 USA CONFIDENTIAL Page 13 PD70224 IdealBridge™ Dual MOSFET-based Bridge Rectifier $% (I) 70224__ _ _70224x (II) 70210__ _ _70210x $&'$('$%" $('$% $&'$('$%" Set R3, R4 and R5 up to few KΩ. At equation (I) set Vext_adapter_PD70224 =44V and from PD70224 data sheet PD70224 _WA_EN=1.35V. At equation (II) set Vext_adapter_PD70210A=(minimum Vext_adapter_PD70224 -1V) and from PD_IC data sheet PD70210A_WA_EN=2.4V. R5 is selected as 620 Ω. Solving the two equations plus accuracy and verifying that PD70210A is always disconnected before PD70224, we get the optimum resistors values for an adapter of adapter of 36V and above. 3 15Ω 4 820Ω 5 620Ω Copyright © 2014 Rev. 1.2., November 25, 2014 Microsemi Analog Mixed Signal Group One Enterprise Aliso Viejo, CA 92656 USA CONFIDENTIAL Page 14 PD70224 IdealBridge™ Dual MOSFET-based Bridge Rectifier Package Outline Drawing 40 Pin QFN 6x8 mm D L1 A L2 b 33 x x 1 E4 x x E2 E x x D2 E3 21 A3 K x A1 Dim A A1 A3 b D E D2 E2 E3 E4 e K L1 L2 MILLIMETERS MIN MAX 0.80 1.00 0.00 0.05 0.20 REF 0.18 0.30 6.00 BSC 8.00 BSC 4.25 4.5 6.35 6.6 3.50 3.75 2.20 2.46 0.50 BSC 0.30 0.37 0.57 0.30 0.50 e x 13 X - depopulated pin INCHES MIN MAX 0.031 0.039 0 0.002 0.008 REF 0.007 0.012 0.236 BSC 0.315 BSC 0.167 0.177 0.250 0.260 0.138 0.148 0.087 0.097 0.020 BSC 0.012 0.014 0.022 0.012 0.020 Note: 1. 2. Dimensions do not include protrusions; these shall not exceed 0.155mm (.006”) on any side. Lead dimension shall not include solder coverage. Dimensions are in millimeters, inches for reference only. Copyright © 2014 Rev. 1.2., November 25, 2014 Microsemi Analog Mixed Signal Group One Enterprise Aliso Viejo, CA 92656 USA CONFIDENTIAL Page 15 PD70224 IdealBridge™ Dual MOSFET-based Bridge Rectifier PD70224 Recommended PCB layout for 40 Pin QFN 6x8 mm Recommended PCB layout pattern for PD70224 is described in the following three figures. Pad of pins number 4, 9, 15, 18, 24, 29, 35 and 38 are missing from the layout because it do not exist in package. Figure 9: PD70224 Top layer Copper Recommended PCB Layout (mm) Figure 10: PD70224 Top layer Solder Mask, Solder Paste and Vias Recommended PCB Layout (mm) Figure 11: PD70224 Bottom layer Copper and Solder Paste Recommended PCB Layout for Thermal Pad Array (mm) Copyright © 2014 Rev. 1.2., November 25, 2014 Microsemi Analog Mixed Signal Group One Enterprise Aliso Viejo, CA 92656 USA CONFIDENTIAL Page 16 PD70224 IdealBridge™ Dual MOSFET-based Bridge Rectifier Design example Next four figures illustrates the layout of PD70224 EVB evaluation board for reference. The board is two layers PCB. U2 is PD70224. This board can be ordered from Microsemi. Figure 12: PD70224 EVB PCB Silk Top Figure 13: PD70224 EVB PCB Top Copper Copyright © 2014 Rev. 1.2., November 25, 2014 Microsemi Analog Mixed Signal Group One Enterprise Aliso Viejo, CA 92656 USA CONFIDENTIAL Page 17 PD70224 IdealBridge™ Dual MOSFET-based Bridge Rectifier Figure 14: PD70224 EVB PCB Silk Bottom Figure 15: PD70224 EVB PCB Bottom Copper Copyright © 2014 Rev. 1.2., November 25, 2014 Microsemi Analog Mixed Signal Group One Enterprise Aliso Viejo, CA 92656 USA CONFIDENTIAL Page 18 PD70224 IdealBridge™ Dual MOSFET-based Bridge Rectifier The information contained in the document (unless it is publicly available on the Web without access restrictions) is PROPRIETARY AND CONFIDENTIAL information of Microsemi and cannot be copied, published, uploaded, posted, transmitted, distributed or disclosed or used without the express duly signed written consent of Microsemi. If the recipient of this document has entered into a disclosure agreement with Microsemi, then the terms of such Agreement will also apply . This document and the information contained herein may not be modified, by any person other than authorized personnel of Microsemi. No license under any patent, copyright, trade secret or other intellectual property right is granted to or conferred upon you by disclosure or delivery of the information, either expressly, by implication, inducement, estoppels or otherwise. Any license under such intellectual property rights must be approved by Microsemi in writing signed by an officer of Microsemi. Microsemi reserves the right to change the configuration, functionality and performance of its products at anytime without any notice. This product has been subject to limited testing and should not be used in conjunction with life-support or other mission-critical equipment or applications. Microsemi assumes no liability whatsoever, and Microsemi disclaims any express or implied warranty, relating to sale and/or use of Microsemi products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right. Any performance specifications believed to be reliable but are not verified and customer or user must conduct and complete all performance and other testing of this product as well as any user or customers final application. User or customer shall not rely on any data and performance specifications or parameters provided by Microsemi. It is the customer’s and user’s responsibility to independently determine suitability of any Microsemi product and to test and verify the same. The information contained herein is provided “AS IS, WHERE IS” and with all faults, and the entire risk associated with such information is entirely with the User. Microsemi specifically disclaims any liability of any kind including for consequential, incidental and punitive damages as well as lost profit. The product is subject to other terms and conditions which can be located on the web at http://www.microsemi.com/legal/tnc.asp Revision History Revision Level / Date 0.7 / 14 May 2014 Para. Affected 0.72 / 22 May 2014 Description Initial Release – Preliminary version Add dimensions to reccomended layout add IMAX_LOAD 0.73 / 23 June 2014 Update leadframe for thermal pad 1.0 / 20 Aug 2014 1.1 / 29 October 2014 Update maximum SUPP_Sx current, application information , adding SOA graph. Update MSL level. Updating ESD 1.2 / 22 November 2014 Remove Watermark, Updating ESD with IN1A / IN2A 1000v note © 2014 Microsemi Corp. All rights reserved. For support contact: [email protected] Visit our web site at: www.microsemi.com Copyright © 2014 Rev. 1.2., November 25, 2014 Catalog Number: DS_PD70224 Microsemi Analog Mixed Signal Group One Enterprise Aliso Viejo, CA 92656 USA CONFIDENTIAL Page 19