UT54ACTS541E Octal Buffers & Line Drivers, Three-State Outputs October, 2008 www.aeroflex.com/Logic FEATURES FUNCTION TABLE • Three-state outputs drive bus lines or buffer memory address registers • 0.6μm CRH CMOS Process - Latchup immune • High speed • Low power consumption • Wide operating power supply from 3.0V to 5.5V • Available QML Q or V processes • 20-lead flatpack INPUTS OUTPUT 1G 2G An Yn L L L L L L H H H X X Z X H X Z DESCRIPTION The UT54ACTS541E is a non-inverting octal buffer and line driver which improves the performance and density of threestate memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The device is characterized over full HiRel temperature range of -55°C to +125°C. LOGIC SYMBOL PINOUT 1G 20-Lead Flatpack Top View 2G 1G 1 20 VDD A1 2 19 2G A2 3 18 Y1 A3 A4 4 17 5 16 Y2 Y3 A5 6 15 Y4 A6 7 14 Y5 A7 A8 VSS 8 13 9 12 10 11 Y6 Y7 Y8 (1) (19) A1 (2) (3) A2 A3 (4) (5) A4 A5 (6) A6 (7) A7 (8) A8 (9) & EN (18) Y1 (17) Y2 (16) Y3 (15) (14) (13) (12) (11) Y4 Y5 Y6 Y7 Y8 Note: 1. Logic symbol in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. 1 LOGIC DIAGRAM A8 (9) (11) Y8 A7 (8) (12) Y7 A6 (7) (13) Y6 A5 A4 (6) (5) (14) Y5 (15) Y4 A3 (4) (16) Y3 A2 (3) (17) Y2 A1 2G 1G (2) (19) (1) (18) Y1 OPERATIONAL ENVIRONMENT1 PARAMETER LIMIT UNITS Total Dose 1.0E6 rads(Si) SEU Threshold 2 80 MeV-cm2/mg SEL Threshold 120 MeV-cm2/mg Neutron Fluence 1.0E14 n/cm2 Notes: 1. Logic will not latchup during radiation exposure within the limits defined in the table. 2. Device storage elements are immune to SEU affects. 2 ABSOLUTE MAXIMUM RATINGS1 SYMBOL PARAMETER LIMIT UNITS VDD Supply voltage -0.3 to 7.0 V VI/O Voltage any pin -.3 to VDD +.3 V TSTG Storage Temperature range -65 to +150 °C TJ Maximum junction temperature +175 °C TLS Lead temperature (soldering 5 seconds) +300 °C ΘJC Thermal resistance junction to case 20 °C/W II DC input current ±10 mA PD Maximum power dissipation 1 W Note: 1. Stresses outside the listed absolute maximum ratings may cause permanent damage to the device. This is a stress rating only, functional operation of the device at these or any other conditions beyond limits indicated in the operational sections is not recommended. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. RECOMMENDED OPERATING CONDITIONS SYMBOL PARAMETER LIMIT UNITS VDD Supply voltage 3.0 to 5.5 V VIN Input voltage any pin 0 to VDD V TC Temperature range -55 to +125 °C 3 DC ELECTRICAL CHARACTERISTICS FOR THE UT54ACTS541E7 ( VDD = 3.0V to 5.5V; VSS = 0V6; -55°C < TC < +125°C) SYMBOL VIL VIH IIN VOL VOH IOS IOL IOH Ptotal IDDQ ΔIDDQ Description CONDITION Low-level input voltage 1 High-level input voltage 1 VDD MAX UNIT 3.0V 0.8 V 5.5V 0.8 3.0V 2.0 5.5V 2.75 -1 μA 3.0V 0.4 V IOL = 12mA 4.5V 0.4 V IOH = -8mA 3.0V 2.4 V IOH= -12mA 4.5V 3.15 V VO = VDD and VSS 3.0V -150 150 5.5V -300 300 VIN = VDD or VSS 3.0V 8 VOL = 0.4V 5.5V 12 VIN = VDD or VSS 3.0V -8 VOH = VDD-0.4V 5.5V -12 CL = 50pF 5.5V 3.0V 2.1 0.84 mW/ MHz VIN = VDD or VSS 5.5V Low-level output voltage 3 IOL = 8mA Short-circuit output current 2 ,4 Low level output current10 High level output current10 Power dissipation 2, 8 ,9 V 1 Input leakage current High-level output voltage 3 MIN mA mA mA Quiescent Supply Current VIN = VDD or VSS 5.5V 10 μA Quiescent Supply Current Delta For input under test 5.5V 1.6 mA VIN = VDD - 2.1V For all other inputs VIN = VDD or VSS CIN COUT Input capacitance 5 ƒ = 1MHz 0V 15 pF Output capacitance 5 ƒ = 1MHz 0V 15 pF Notes: 1. Functional tests are conducted in accordance with MIL-STD-883 with the following input test conditions: VIH = VIH(min) + 20%, - 0%; VIL = VIL(max) + 0%, 50%, as specified herein, for TTL, CMOS, or Schmitt compatible inputs. Devices may be tested using any input voltage within the above specified range, but are guaranteed to VIH(min) and VIL(max). 2. Supplied as a design limit but not guaranteed or tested. 3. Per MIL-PRF-38535, for current density ≤5.0E5 amps/cm2, the maximum product of load capacitance (per output buffer) times frequency should not exceed 3,765pF/ MHz. 4. Not more than one output may be shorted at a time for maximum duration of one second. 5. Capacitance measured for initial qualification and when design changes may affect the value. Capacitance is measured between the designated terminal and VSS at frequency of 1MHz and a signal amplitude of 50mV rms maximum. 6. Maximum allowable relative shift equals 50mV. 7. All specifications valid for radiation dose ≤ 1E6 rads(Si) per MIL-STD-883 Method 1019 Condition A and section 3.11.2. 8. Power does not include power contribution of any TTL output sink current 9. Power dissipation specified per switching output. 10. This value is guaranteed based on characterization data, but not tested. 4 AC ELECTRICAL CHARACTERISTICS FOR THE UT54ACTS541E2 (VDD = 3.0V to 5.5V; VSS = 0V 1, -55°C < TC < +125°C) SYMBOL tPLH PARAMETER An to Yn CONDITION VDD CL = 30pF 3.0V & 3.6V CL = 50pF tPHL An to Yn CL = 30pF CL = 50pF tPZH G low to Yn active CL = 30pF CL = 50pF tPZL G low to Yn active CL = 30pF CL = 50pF tPHZ G low to Yn active CL = 30pF CL = 50pF tPLZ G low to Yn active CL = 30pF CL = 50pF MINIMUM MAXIMUM UNIT 1 11 ns 4.5V & 5.5V 1 8 3.0V & 3.6V 1 15 4.5V & 5.5V 1 11 3.0V & 3.6V 1 14 4.5V & 5.5V 1 10 3.0V & 3.6V 1 18 4.5V & 5.5V 1 14 3.0V & 3.6V 2 15 4.5V & 5.5V 2 11 3.0V & 3.6V 2 19 4.5V & 5.5V 2 15 3.0V & 3.6V 2 14 4.5V & 5.5V 2 10 3.0V & 3.6V 2 18 4.5V & 5.5V 2 14 3.0V & 3.6V 1 13 4.5V & 5.5V 1 9 3.0V & 3.6V 2 17 4.5V & 5.5V 2 13 3.0V & 3.6V 2 12 4.5V & 5.5V 2 8 3.0V & 3.6V 2 16 4.5V & 5.5V 2 12 Notes: 1. Maximum allowable relative shift equals 50mV. 2. All specifications valid for radiation dose ≤ 1E6 rads(Si) per MIL-STD-883 Method 1019 Condition A and section 3.11.2. 5 ns ns ns ns ns ns ns ns ns ns ns 6 Packaging Ordering Information: UT54ACTS541E: SMD 5962 * ***** ** * * * Lead Finish: (Notes 1 & 2) A = Solder C = Gold X = Optional Package Type: X = 20-lead ceramic bottom-brazed dual-in-line Flatpack Class Designator: Q = QML Class Q V = QML Class V Device Type: 02 = 1 rad(Si)/sec 03 = 50 to 300 rads(Si)/sec Drawing Number: 96595 = UT54ACTS541E Total Dose: (Note 3 and 4) R = 1E5 rads(Si) F = 3E5 rads(Si) G = 5E5 rads(Si) H = 1E6 rads(Si) Notes: 1. Lead finish (A,C, or X) must be specified. 2. If an “X” is specified when ordering, part marking will match the lead finish and will be either “A” (solder) or “C” (gold). 3. Total dose radiation must be specified when ordering. QML Q and QML V not available without radiation hardening. For prototype inquiries, contact factory. 4. Device type 02 is only offered with a TID tolerance guarantee of 3E5 rads(Si) or 1E6 rads(Si) and is tested in accordance with MIL-STD-883 Test Method 1019 Condition A and section 3.11.2. Device type 03 is only offered with a TID tolerance guarantee of 1E5 rads(Si), 3E5 rads(Si), and 5E5 rads(Si), and is tested in accordance with MIL-STD-883 Test Method 1019 Condition A. 8 Aeroflex Colorado Springs - Datasheet Definition Advanced Datasheet - Product In Development Preliminary Datasheet - Shipping Prototype Datasheet - Shipping QML & Reduced HiRel COLORADO Toll Free: 800-645-8862 Fax: 719-594-8468 INTERNATIONAL Tel: 805-778-9229 Fax: 805-778-1980 NORTHEAST Tel: 603-888-3975 Fax: 603-888-4585 SE AND MID-ATLANTIC Tel: 321-951-4164 Fax: 321-951-4254 WEST COAST Tel: 949-362-2260 Fax: 949-362-2266 CENTRAL Tel: 719-594-8017 Fax: 719-594-8468 www.aeroflex.com [email protected] Aeroflex Colorado Springs (Aeroflex) reserves the right to make changes to any products and services herein at any time without notice. Consult Aeroflex or an authorized sales representative to verify that the information in this data sheet is current before using this product. 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