LTC3529 - 1.5A, 1.5MHz Step-Up DC/DC Converter in 2mm × 3mm DFN

LTC3529
1.5A, 1.5MHz Step-Up
DC/DC Converter in
2mm × 3mm DFN
DESCRIPTION
FEATURES
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The LTC®3529 is a 5V output, synchronous, fixed frequency
step-up DC/DC converter optimized for USB On-The-Go
(OTG) hosting applications. This compact USB OTG 5V
VBUS converter features a 1.5MHz switching frequency,
internal compensation and a tiny 2mm × 3mm DFN package. The LTC3529 can operate from input voltages as low
as 1.8V.
Compact Solution for 5V USB On-The-Go
VBUS Power
5V at 500mA from Single Li-Ion Cell
Automatic Fault Detection
High Efficiency: Up to 95%
VIN Range: 1.8V to 5.25V
Fixed 5V Output
Short-Circuit Protection
1.5MHz Low Noise, Fixed Frequency PWM
Inrush Current Limiting and Internal Soft-Start
Output Disconnect
<1μA Quiescent Current in Shutdown
VIN > VOUT Operation
8-Lead, 2mm × 3mm DFN Package
USB OTG-specific features include a fault flag with 22ms
deglitching to indicate when the bus is overloaded, output
disconnect and short-circuit protection. Following a fault,
the LTC3529 can be programmed to either latchoff or
restart after a time-out duration.
Additional features include a <1μA shutdown mode,
soft-start, inrush current limiting and thermal overload
protection. Anti-ring circuitry reduces EMI during low
power operation. The LTC3529 is offered in an 8-lead
2mm × 3mm × 0.75mm DFN package.
APPLICATIONS
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Personal Media Players
Digital Video Cameras
Digital Multimedia Broadcast Tuners
Digital Cameras
Smart Phones
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
Protected by U.S. Patents including 6404251, 6166527.
TYPICAL APPLICATION
Li-Ion Battery to 5V Synchronous Boost Converter
Efficiency vs Load Current
4.7μH
Li-Ion
0.8
80
3.3μF
LTC3529
VIN
SW
370Ω
FAULT SNSGND
AUTO-RESTART OFF ON
RST
VOUT
COUT
10μF
OFF ON
SHDN
PGND
3529 TA01a
VOUT
5V
500mA
EFFICIENCY (%)
+
0.9
90
0.7
EFFICIENCY
70
0.6
60
0.5
50
0.4
40
0.3
30
POWER LOSS (W)
2.5V
TO
4.2V
100
0.2
20
POWER LOSS
10
0
1
10
100
LOAD CURRENT (mA)
VIN = 3.6V
INDUCTOR = 4.7μH,
COOPER BUSSMANN SD25-4R7
0.1
0
1000
3529 TA01b
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LTC3529
ABSOLUTE MAXIMUM RATINGS
PIN CONFIGURATION
(Note 1)
VIN, VOUT Voltage ........................................... –0.3 to 6V
SHDN, RST, FAULT Voltage ............................ –0.3 to 6V
SW Voltage
DC.............................................................. –0.3 to 6V
Pulsed <100ns .............................................–1V to 7V
Operating Temperature Range (Note 2) ...–40°C to 85°C
Maximum Junction Temperature (Note 3) ............ 125°C
Storage Temperature Range .................. –65°C to 125°C
TOP VIEW
8 VIN
VOUT 1
SW 2
7 RST
9
SHDN 3
6 SNSGND
5 FAULT
PGND 4
DCB PACKAGE
8-LEAD (2mm s 3mm) PLASTIC DFN
TJMAX = 125°C, θJA = 64°C/W
EXPOSED PAD (PIN 9) IS GND, MUST BE SOLDERED TO PCB
ORDER INFORMATION
LEAD FREE FINISH
TAPE AND REEL
PART MARKING
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC3529EDCB#PBF
LTC3529EDCB#TRPBF
LCTZ
8-Lead (2mm × 3mm) Plastic DFN
–40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 3.6V, VOUT = 5V unless otherwise noted.
PARAMETER
CONDITIONS
MIN
Input Voltage Range
1.8
l
Output Voltage
Quiescent Current - Shutdown
VSHDN = 0V, VOUT = 0V
NMOS Switch Leakage Current
VIN = VSW = 5V
l
VSW = 0V, VOUT = 5V
l
PMOS Switch Leakage Current
TYP
4.85
MAX
UNITS
5.25
V
5
5.15
V
0.01
1
μA
0.3
15
μA
0.3
15
μA
NMOS Switch On Resistance
0.09
Ω
PMOS Switch On Resistance
0.12
Ω
40
ns
NMOS Current Limit
VOUT = 4.5V (Note 4)
Current Limit Delay Time to Output
(Note 5)
l
1.5
Maximum Duty Cycle
VOUT = 4.5V
l
Minimum Duty Cycle
VOUT = 5.5V
l
Switching Frequency
VOUT = 4.5V
l
1.2
SHDN, RST Input High Voltage
l
1
SHDN, RST Input Low Voltage
l
SHDN, RST Input Current
VSHDN, VOUT, VRST = 5.5V
Soft-Start Time
Line Regulation
VIN = 1.8V to 5.25V
l
80
A
87
%
0
1.5
1.8
%
MHz
V
0.01
0.35
V
1
μA
2
ms
0.03
%/V
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LTC3529
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 3.6V, VOUT = 5V unless otherwise noted.
PARAMETER
CONDITIONS
FAULT Delay Time
VOUT = 0V
FAULT Output Low Voltage
IFAULT = 5mA, VOUT = 0V
FAULT Leakage Current
VFAULT = 5.5V
MIN
TYP
MAX
12
22
35
60
ms
mV
10
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC3529 is guaranteed to meet performance specifications
from 0°C to 85°C. Specifications over the –40°C to 85°C operating
temperature range are assured by design, characterization and correlation
with statistical process controls.
UNITS
μA
Note 3: This IC includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperature will exceed 125°C when overtemperature protection is active.
Continuous operation above the specified maximum operating junction
temperature may impair device reliability.
Note 4: Current measurements are performed when the LTC3529 is not
switching. The current limit values in operation will be somewhat higher
due to the propagation delay of the comparators.
Note 5: Specification is guaranteed by design and not 100% tested in
production.
TYPICAL PERFORMANCE CHARACTERISTICS
2 Alkaline Cells to 5V Efficiency
VIN = 3V
90
EFFICIENCY
80
0.7
VIN = 1.8V
0.5
70
60
0.4
50
0.3
40
VIN = 1.8V
30
EFFICIENCY
0.4
50
0.3
40
0.2
20
0.1
POWER LOSS
1
0
1000
10
100
LOAD CURRENT (mA)
COUT = 10μF
INDUCTOR = 4.7μH,
COOPER BUSSMANN SD25-4R7
0
10
100
LOAD CURRENT (mA)
1
3529 G01
Soft-Start Waveforms
POWER LOSS
COUT = 10μF
INDUCTOR = 4.7μH,
COOPER BUSSMANN SD25-4R7
Load Transient Response
VOUT
5V/DIV
0.1
10
VIN = 3V
0
0.5
60
30
0.2
20
10
0.6
POWER LOSS (W)
70
80
0.7
VIN = 4.1V
VIN = 3.6V
VIN = 3V
90
0.6
POWER LOSS (W)
EFFICIENCY (%)
Li-Ion Battery to 5V Efficiency
100
EFFICIENCY (%)
100
0
1000
3529 G02
VOUT Ripple
VOUT
200mV/DIV
IL
200mA/DIV
VOUT
5mV/DIV
IL
500mA/DIV
SHDN
5V/DIV
2ms/DIV
VIN = 3.6V
VOUT = 5V
COUT = 10μF
L = 2.2μH
3529 G03
200μs/DIV
VIN = 3.6V
VOUT = 5V
COUT = 10μF
L = 2.2μH
3529 G04
1μs/DIV
3529 G05
VIN = 3.6V
COUT = 10μF
L = 4.7μH
ILOAD = 200mA
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LTC3529
TYPICAL PERFORMANCE CHARACTERISTICS
Output Voltage Change
vs Temperature
Maximum Output Current vs VIN
1.90
1.0
1600
1.85
0.8
1400
1.80
0.6
1.75
1.70
1.65
1.60
1.55
0.2
0
–0.2
–0.6
1.45
–0.8
1.40
–45 –25 –5
15 35 55 75
TEMPERATURE (°C)
800
600
400
200
–1.0
–50
95 115
1000
–0.4
1.50
0
50
100
TEMPERATURE (°C)
0
1.5
150
3529 G06
Switching Frequency Variation
vs Temperature
18
8
16
6
QUIESCENT CURRENT (mA)
NORMALIZED TO 25°C (%)
1μs/DIV
VIN = 3.6V
COUT = 10μF
L = 4.7μH
2.5
3.0 3.5
VIN (V)
4
2
0
–2
–4
–6
4.5
5.0
3529 G08
14
12
10
8
6
4
2
–8
–10
–50 –30 –10 10 30 50 70
TEMPERATURE (°C)
90
110
0
1.5
2.5
3.5
VIN (V)
3529 G10
RDS(ON) vs Temperature
4.5
5.5
3529 G11
Load Regulation
0.5
160
VIN = 3.3V
L = 4.7μH
0.4
PMOS
140
4.0
No-Load Input Current vs VIN
10
IL
25mA/DIV
3529 G09
2.0
3529 G07
SW Pin Anti-Ringing
SW
2V/DIV
L = 4.7μH
1200
0.4
IOUT (mA)
CHANGE FROM 25°C (%)
CURRENT LIMIT (A)
Current Limit vs Temperature
0.3
VOUT CHANGE (%)
RDS(ON) (mΩ)
120
100
NMOS
80
60
40
0.1
0
–0.1
–0.2
–0.3
20
0
–50
0.2
–0.4
–0.5
–25
0
25
50
75
TEMPERATURE (°C)
100
125
3529 G12
0
100
200
300
ILOAD (mA)
400
500
3529 G13
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LTC3529
PIN FUNCTIONS
VOUT (Pin 1): Converter Output, Voltage Sense Input
and Drain of the Internal Synchronous Rectifier MOSFET.
Driver bias is derived from VOUT. PCB trace length from
VOUT to the output filter capacitor(s) should be as short
and wide as possible.
SW (Pin 2): Switch Node. This node connects to one
side of the inductor. Keep PCB traces as short and wide
as possible to reduce EMI and voltage overshoot. If the
inductor current falls to zero, or SHDN is low, an internal
100Ω anti-ringing switch is connected between SW and
VIN to minimize EMI.
SHDN (Pin 3): Active-Low Shutdown Input. Forcing this
pin above 1V enables the converter. Forcing this pin below
0.35V disables the converter. Do not float this pin.
PGND (Pin 4): High Current Ground Connection. The PCB
trace connecting this pin to ground should be as short and
as wide as possible.
SNSGND (Pin 6): This pin must be connected to
ground.
RST (Pin 7): Logic Input to Select Automatic Restart or
Latchoff Following a Fault Shutdown.
• RST = High: Auto-reset mode. In this mode, the LTC3529
will automatically attempt to restart 22ms (typically)
after a fault shutdown.
• RST = Low: Latchoff mode. In this mode, the LTC3529
will latch off for a fault shutdown. The IC will not restart
until the SHDN pin is toggled or the supply voltage is
cycled.
VIN (Pin 8): Input Supply Pin.
Exposed Pad (Pin 9): Small Signal Ground. This is the
ground reference for the internal circuitry of the LTC3529
and must be connected directly to ground.
FAULT (Pin 5): Open-Drain Fault Indicator Output. Pulls
low when an overcurrent condition exists for more than
22ms.
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LTC3529
BLOCK DIAGRAM
L1
4.7μH
VIN
1.8V
TO
5.25V
+
–
8
CIN
3.3μF
3
VIN
SHDN
2
SW
BULK CONTROL
SIGNALS
VIN
ANTI-RING
1
VOUT
6
SNSGND
CLOCK
–
+
PWM LOGIC
AND
DRIVERS
VOUT, 5V
COUT
10μF
IZERO
COMP
CURRENT
SENSE
FAULT OR
THERMAL
SHUTDOWN
5
FAULT
22ms
FAULT TIMER
R1
1.875M
–
SOFT-START
SD
GM ERROR
AMPLIFIER
+
–
THERMAL SD
–
+
PWM
COMP
ILIM
COMP
1.25V
REFERENCE
+
+
3
+
RC
1.25V
R2
625k
C2
OSCILLATOR
2A
CC
7
RST
4
PGND
9
GND (BP)
3529 BD
OPERATION
The LTC3529 is a 1.5MHz synchronous boost converter in
an 8-lead 2mm × 3mm DFN package. The device operates
with an input voltage as low as 1.8V and features fixedfrequency current-mode PWM control for exceptional line
and load regulation. Internal MOSFET switches with low
RDS(ON) and low gate charge enable the device to maintain
high efficiency over a wide range of load current.
PWM Operation
light loads, the LTC3529 will exhibit pulse-skipping
operation.
Soft-Start
The LTC3529 provides soft-start by ramping the inductor
current limit from zero to its peak value in approximately
2ms. The internal soft-start capacitor is discharged in
the event of a fault, thermal shutdown or when the IC is
disabled via the SHDN pin.
The LTC3529 operates in a fixed-frequency PWM mode
using current-mode control at all load currents. At very
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LTC3529
OPERATION
Oscillator
An internal oscillator sets the switching frequency to
1.5MHz.
Shutdown
The LTC3529 is shut down by pulling the SHDN pin below
0.35V, and activated by pulling the SHDN pin above 1V. Note
that SHDN can be driven above VIN or VOUT, as long as it
is limited to less than the absolute maximum rating.
Error Amplifier
The error amplifier is a transconductance amplifier with
an internal compensation network. Internal clamps limit
the minimum and maximum error amplifier output voltage
to improve the large-signal transient response.
Current Sensing
Lossless current sensing converts the peak current signal of the N-channel MOSFET switch into a voltage that
is summed with the internal slope compensation. The
summed signal is compared to the error amplifier output
to provide a peak current control command for the PWM.
Peak switch current is limited to approximately 2A independent of input or output voltage.
latchoff mode is highly recommended for maximum level
of robustness.
Note: When VOUT is released from a short-circuit condition, it is possible for the output to momentarily exceed
the maximum output voltage rating. In cases where
repeated shorts are expected, VOUT should be protected
by the addition of a 5.6V Zener clamp from VOUT to GND.
Alternatively, COUT can be increased to 47μF or greater.
Zero-Current Comparator
The zero-current comparator monitors the inductor current to the output and shuts off the synchronous rectifier
when this current falls below approximately 20mA. This
prevents the inductor current from reversing in polarity,
thereby improving efficiency at light loads.
Anti-Ringing Control
The anti-ringing circuit connects a resistor across the
inductor to damp the ringing on SW in discontinuous
conduction mode. The ringing of the resonant circuit
formed by L and CSW (capacitance on the SW pin) is low
energy but can cause EMI radiation.
Output Disconnect
The current limit comparator shuts off the N-channel MOSFET
switch when the current limit threshold is reached. The current
limit comparator delay time to output is typically 40ns.
The LTC3529 provides true output disconnect by eliminating
body diode conduction of the internal P-channel MOSFET
rectifier. This allows VOUT to go to zero volts during shutdown, drawing no current from the input source. It also
provides inrush current limiting at turn-on, minimizing
surge currents seen by the input supply.
Fault Detection
Thermal Shutdown
To prevent the device from providing power to a shorted
output, the switch current is monitored to detect an
overcurrent condition. In the event that the switch current
reaches the current limit for longer than 22ms, the fault
flag is asserted (FAULT pulls low) and the device is shut
down. If the auto-restart option is enabled (RST high), the
device will automatically attempt to restart every 22ms
until the short is removed. If auto-restart is disabled (RST
low), the IC will remain shut down until being manually
restarted by toggling SHDN or cycling the input voltage.
A soft-start sequence is initiated when the device restarts.
If output short-circuits are common in the application,
If the die temperature reaches approximately 160°C,
the device enters thermal shutdown, the fault flag is
asserted (FAULT pulls low) and all switches are turned off.
The device is enabled and a soft-start sequence is initiated
when the die temperature drops by approximately 10°C.
Current Limit
PCB Layout
Due to the high frequency operation of the LTC3529, board
layout is extremely critical to minimize transients caused by
stray inductance. Keep the output filter capacitor as close
as possible to the VOUT pin and use very low ESR/ESL
ceramic capacitors tied to a good ground plane.
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LTC3529
APPLICATIONS INFORMATION
The basic LTC3529 application circuit is shown in the Typical Application on the front page. The external component
selection is determined by the desired output current and
ripple voltage requirements of each particular application.
However, basic guidelines and considerations for the design
process are provided in this section.
Although ceramic capacitors are recommended, low ESR
tantalum capacitors may also be used. A small ceramic
capacitor in parallel with a larger tantalum capacitor is
recommended in demanding applications that have large
load transients.
Input Capacitor Selection
Output Capacitor Selection
A low ESR (equivalent series resistance) output capacitor
should be used at the output of the LTC3529 to minimize
the output voltage ripple. Multilayer ceramic capacitors are
an excellent choice as they have extremely low ESR and
are available in small footprints. X5R and X7R dielectric
materials are strongly recommended over Y5V dielectric
because of their improved voltage and temperature coefficients. Neglecting the capacitor ESR and ESL (equivalent
series inductance), the peak-to-peak output voltage ripple
can be calculated by the following formula, where f is the
frequency in MHz, COUT is the capacitance in μF, and ILOAD
is the output current in amps.
ΔVP −P =
ILOAD ( VOUT – VIN )
COUT • VOUT • f
Low ESR input capacitors reduce input switching noise
and reduce the peak current drawn from the battery. It
follows that ceramic capacitors are also a good choice
for input decoupling and should be located as close as
possible to the device. A 3.3μF input capacitor is sufficient
for most applications. Larger values may be used without
limitation.
Capacitor Vendor Information
Both the input and output capacitors used with the LTC3529
must have low ESR and be designed to handle the large
AC currents generated by switching converters. The vendors in Table 1 provide capacitors that are well suited to
LTC3529 application circuits.
Table 1. Capacitor Vendor Information
MANUFACTURER WEB SITE
The internal loop compensation of the LTC3529 is designed
to be stable with output capacitor values of 6.5μF or greater.
This complies with USB On-The-Go specifications, which
limit the output capacitance to 6.5μF. In general use of the
LTC3529, the output capacitor should be chosen large
enough to reduce the output voltage ripple to acceptable
levels. A 6.8μF to 10μF output capacitor is sufficient for
most applications. Larger values up to 22μF may be used
to obtain extremely low output voltage ripple and improved
transient response.
PHONE
FAX
Taiyo Yuden
www.t-yuden.com
(408) 573-4150 (408) 573-4159
TDK
www.component.
tdk.com
(847) 803-6100 (847) 803-6296
Sanyo
www.secc.co.jp
(619) 661-6322 (619) 661-1055
AVX
www.avxcorp.com
(803) 448-9411 (803) 448-1943
Murata
www.murata.com
(814) 237-1431 (814) 238-0490
Sumida
www.sales@
us.sumida.com
(408) 321-9660 (408) 321-9308
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LTC3529
APPLICATIONS INFORMATION
Inductor Selection
PCB Layout Guidelines
The LTC3529 can utilize small surface-mount chip inductors due to its fast 1.5MHz switching frequency. Larger
values of inductance will allow slightly greater output
current capability by reducing the inductor ripple current.
Increasing the inductance above 10μH will increase component size while providing little improvement in output
current capability.
The LTC3529 switches large currents at high frequencies.
Special care should be given to the PCB layout to ensure
stable, noise-free operation. Figure 1 depicts the recommended PCB layout to be utilized for the LTC3529. A few
key guidelines follow:
USB On-The-Go specifications limit output capacitance to
6.5μF. When using a 6.5μF output capacitance, a 4.7μH
inductor must be used to maintain stability. Larger inductors may be used with larger output capacitors.
The minimum inductance value for a given allowable inductor ripple ΔI (in Amps peak-to-peak) is given by:
L>
(
VIN(MIN) • VOUT – VIN(MIN)
ΔI • f • VOUT
) µH
where VIN(MIN) is the minimum input voltage, f is the
operating frequency in MHz (1.5MHz Typ), and VOUT is
the output voltage (5V).
The inductor current ripple is typically set for 20% to 40%
of the maximum inductor current (IP). High frequency
ferrite core inductor materials reduce frequency dependent power losses compared to cheaper powdered iron
cores, improving efficiency. To achieve high efficiency, a
low ESR inductor should be utilized. The inductor must
have a saturation current rating greater than the worst
case average inductor current plus half the ripple current.
Molded chokes and some chip inductors usually do not have
enough core to support peak LTC3529 inductor currents.
To minimize radiated noise, use a shielded inductor. See
Table 2 for suggested components and suppliers.
1. All circulating current paths should be kept as short
as possible. This can be accomplished by keeping the
copper traces to all components in Figure 1 short and
wide. Capacitor ground connections should via down
to the ground plane in the shortest route possible. The
bypass capacitors on VIN and VOUT should be placed
close to the IC and should have the shortest possible
paths to ground.
2. The PGND pin should be shorted directly to the exposed pad, as shown in Figure 1. This provides a single
point connection between the small signal ground and
the power ground, as well as a wide trace for power
ground.
3. All the external components shown in Figure 1 and their
connections should be placed over a complete ground
plane.
4. Use of multiple vias in the die attach pad will enhance
the thermal environment of the converter, especially if
the vias extend to a ground plane region on the exposed
bottom surface or inner layers of the PCB.
8 VIN
VOUT 1
7 RST
SW 2
Table 2. Representative Surface Mount Inductors
SHDN 3
6 SNSGND
MAX
MANUFACTURER PART NUMBER VALUE CURRENT
(μH)
(A)
PGND 4
5 FAULT
DCR
(Ω)
HEIGHT
(mm)
Sumida
CDRH5D16NP
4.7
2.15
0.064
1.8
TDK
VLF5014S
4.7
2
0.098
1.4
Coilcraft
MSS6122
4.7
1.82
0.065
2.2
Cooper Bussmann SD25-4R7
4.7
2.3
0.043
2.5
MULTIPLE VIAs
TO GROUND PLANE
Figure 1. LTC3529 Recommended PCB Layout
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LTC3529
TYPICAL APPLICATIONS
Li-Ion Battery to 5V at 100mA or 500mA for USB OTG Host Supply
L1*
4.7μH
+
2.5V
TO
4.2V
Li-Ion
3.3μF
1.8V
LTC3529
VIN
SW
1M
FAULT SNSGND
TO μP
AUTO-RESTART OFF ON
RST
VOUT, 5V
VOUT
COUT
6.8μF
OFF ON
SHDN
*L1: SUMIDA CDRH5D16NP
PGND
3529 TA02a
Overcurrent Event
VRST High
Overcurrent Event
VRST Low
VOUT
5V/DIV
VOUT
5V/DIV
LOAD
CURRENT
1A/DIV
LOAD
CURRENT
1A/DIV
FAULT
2V/DIV
FAULT
2V/DIV
3529 TA02b
20ms/DIV
2 Alkaline Cells to 5V at 350mA
2 Alkaline Cells to 5V Efficiency
100
L1*
4.7μH
EFFICIENCY
80
2-CELL
ALKALINE
CIN
3.3μF
LTC3529
VIN
270Ω
AUTO-RESTART OFF ON
SW
FAULT SNSGND
RST
VOUT, 5V
VOUT
COUT
6.8μF
OFF ON
SHDN
PGND
EFFICIENCY (%)
+
VIN = 3V
90
0.7
70
0.5
60
0.4
50
0.3
40
VIN = 1.8V
30
3529 TA03a
0.2
20
0.1
POWER LOSS
10
VIN = 3V
0
*L1: SUMIDA CDRH5D16NP
0.6
VIN = 1.8V
POWER LOSS (W)
1.8V
TO
3.2V
3529 TA02c
20ms/DIV
1
10
100
LOAD CURRENT (mA)
COUT = 6.8μF
INDUCTOR = 4.7μH,
COOPER BUSSMANN SD25-4R7
0
1000
3529 TA03b
3529fb
10
LTC3529
PACKAGE DESCRIPTION
DCB Package
8-Lead Plastic DFN (2mm × 3mm)
(Reference LTC DWG # 05-08-1718 Rev A)
0.70 ±0.05
1.35 ±0.05
3.50 ±0.05
1.65 ± 0.05
2.10 ±0.05
PACKAGE
OUTLINE
0.25 ± 0.05
0.45 BSC
1.35 REF
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
R = 0.115
TYP
R = 0.05
5
TYP
2.00 ±0.10
(2 SIDES)
0.40 ± 0.10
8
1.35 ±0.10
1.65 ± 0.10
3.00 ±0.10
(2 SIDES)
PIN 1 NOTCH
R = 0.20 OR 0.25
× 45° CHAMFER
PIN 1 BAR
TOP MARK
(SEE NOTE 6)
(DCB8) DFN 0106 REV A
4
0.200 REF
1
0.23 ± 0.05
0.45 BSC
0.75 ±0.05
1.35 REF
BOTTOM VIEW—EXPOSED PAD
0.00 – 0.05
NOTE:
1. DRAWING IS NOT A JEDEC PACKAGE OUTLINE
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
3529fb
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
11
LTC3529
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LTC3525-3.3/
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ThinSOT is a trademark of Linear Technology Corporation.
3529fb
12 Linear Technology Corporation
LT 0709 REV B • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear.com
© LINEAR TECHNOLOGY CORPORATION 2009