Test Procedure for the STK672-442BNGEVB Evaluation Board CLOCK IN Function Peak to peak 5.0v(VDD)-0v DC signal Vcc Power supply VDD Power supply Stepping Motor Vref FAULT2 Figure 1: Test Setup Evaluation Board Setup [Supply Voltage] Vcc (10 to 46V) : Power Supply for stepper motor VDD (5V) : Power Supply for internal logic IC [Operation Guide] 1. Motor Connection: Connect the motor to OUT(A,AB,B,BB) and COM1,2. 2. Initial Condition Setting: Set to signal condition No.①,②,③,④,⑤,RESETB and Clock IN. *As for the evaluation board, the initial state is Hi all terminals. 3. Power Supply: At first, supply DC voltage to VDD (5.0V). Next, supply DC voltage to Vcc. 4. Set to ENABLE condition. When ‘ENABLE’ terminal becomes Hi, a motor operates. 1/6/2014 1 www.onsemi.com [Setting the current limit using the Vref pin] If the motor current is temporarily reduced, the circuit given below is recommended. The variable voltage range of Vref input is 0.2 to 1.8V. 5V 5V R01 Vref R01 Vref R3 R02 R3 R02 [Setting the motor current] The motor current, IOH, is set using the Pin 19 voltage, Vref, of the hybrid IC. Equations related to IOH and Vref are given below. Vref (RO2 (RO2+RO1))VDD(5V) IOH (Vref 4.9) Rs The value of 4.9 in Equation (2) above represents the Vref voltage as divided by a circuit inside the control IC. Rs: 0.122 (Current detection resistor inside the hybrid IC) 1/6/2014 2 www.onsemi.com