Features Programmable Average Input Current Limit: ±5% Accuracy n Dual Step-Down Outputs: Up to 96% Efficiency n Low Noise Pulse-Skipping Operation at Light Loads n Input Voltage Range: 2.5V to 5.5V n Output Voltage Range: 0.6V to 5V n 2.25MHz Constant-Frequency Operation n Power Good Output Voltage Monitor for Each Channel n Low Dropout Operation: 100% Duty Cycle n Independent Internal Soft-Start for Each Channel n Current Mode Operation for Excellent Line and Load Transient Response n±2% Output Voltage Accuracy n Short-Circuit Protected n Shutdown Current ≤ 1μA n Available in Small Thermally Enhanced 10-Lead MS and 3mm × 3mm DFN Packages n Applications n n n n High Peak Load Current Applications USB Powered Devices Supercapacitor Charging Radio Transmitters and Other Handheld Devices L, LT, LTC, LTM, Linear Technology, the Linear logo and Burst Mode are registered trademarks and Hot Swap is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. Protected by U.S. Patents, including 5481178, 6127815, 6304066, 6498466, 6580258, 6611131. LTC3619B 400mA/800mA Synchronous Step-Down DC/DC with Average Input Current Limit Description The LTC®3619B is a dual monolithic synchronous buck regulator using a constant frequency current mode architecture. The input supply voltage range is 2.5V to 5.5V, making it ideal for Li-Ion and USB powered applications. 100% duty cycle capability provides low dropout operation, extending the run time in battery-operated systems. Low output voltages are supported with the 0.6V feedback reference voltage. Channel 1 and channel 2 can supply 400mA and 800mA output current, respectively. The LTC3619B’s programmable average input current limit is ideal for USB applications and for point-of-load power supplies because the LTC3619B’s limited input current will still allow its output to deliver high peak load currents without collapsing the input supply. When the sum of both channels’ currents exceeds the input current limit, channel 2 is current limited while channel 1 remains regulated. The operating frequency is internally set at 2.25MHz allowing the use of small surface mount inductors. Internal soft-start reduces in-rush current during start-up. The LTC3619B is available in small MSOP and 3mm × 3mm DFN packages. The LTC3619B is also available in a low quiescent current, high efficiency Burst Mode® version, LTC3619. Typical Application GSM Pulse Load Dual Monolithic Buck Regulator in 10-Lead 3mm × 3mm DFN VIN 3.4V TO 5.5V 10µF VOUT 200mV/DIV RUN2 VIN RUN1 PGOOD2 PGOOD1 1.5µH VOUT2 3.4V AT 800mA LTC3619B SW2 + 1190k 2.2mF ×2 SuperCap SW1 22pF VFB1 VFB2 255k 3.3µH RLIM GND 255k 511k VOUT1 1.8V AT 400mA 10µF VIN AC-COUPLED 1V/DIV IOUT 500mA/DIV IIN 500mA/DIV 1ms/DIV 3619B TA01 1000pF 116k 3619B TA01b VIN = 5V, 500mA COMPLIANT ILOAD = 0A to 2.2A, CHANNEL 1 UNLOADED ILIM = 475mA 3619bfb 1 LTC3619B Absolute Maximum Ratings (Note 1) Input Supply Voltage (VIN).............................. –0.3 to 6V VFB1, VFB2......................................... –0.3V to VIN + 0.3V RUN1, RUN2, RLIM........................... –0.3V to VIN + 0.3V SW1, SW2......................................... –0.3V to VIN + 0.3V PGOOD1, PGOOD2............................ –0.3V to VIN + 0.3V P-channel SW Source Current (DC) (Note 2) Channel 1......................................................... 600mA Channel 2.................................................................1A N-channel SW Source Current (DC) (Note 2) Channel 1......................................................... 600mA Channel 2.................................................................1A Peak SW Source and Sink Current (Note 2) Channel 1......................................................... 900mA Channel 2.............................................................. 2.7A Operating Junction Temperature Range (Notes 3, 6, 8).........................................–40 to 125°C Storage Temperature Range................... –65°C to 125°C Lead Temperature (Soldering, 10 sec) MSOP Package.................................................. 300°C Reflow Peak Body Temperature............................. 260°C Pin Configuration TOP VIEW VFB1 1 RUN1 2 RLIM 3 PGOOD1 4 SW1 5 TOP VIEW 10 VFB2 11 GND VFB1 RUN1 RLIM PGOOD1 SW1 9 RUN2 8 PGOOD2 7 SW2 6 VIN 1 2 3 4 5 11 GND 10 9 8 7 6 VFB2 RUN2 PGOOD2 SW2 VIN MSE PACKAGE 10-LEAD PLASTIC MSOP TJMAX = 125°C, θJA = 45°C/W EXPOSED PAD (PIN 11) IS GND, MUST BE SOLDERED TO PCB DD PACKAGE 10-LEAD (3mm × 3mm) PLASTIC DFN TJMAX = 125°C, θJA = 40°C/W EXPOSED PAD (PIN 11) IS GND, MUST BE SOLDERED TO PCB Order Information LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LTC3619BEDD#PBF LTC3619BEDD#TRPBF LFFH 10-Lead (3mm × 3mm) Plastic DFN –40°C to 125°C LTC3619BIDD#PBF LTC3619BIDD#TRPBF LFFH 10-Lead (3mm × 3mm) Plastic DFN –40°C to 125°C LTC3619BEMSE#PBF LTC3619BEMSE#TRPBF LTFFJ 10-Lead Plastic MSOP –40°C to 125°C LTC3619BIMSE#PBF LTC3619BIMSE#TRPBF LTFFJ 10-Lead Plastic MSOP –40°C to 125°C Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. Consult LTC Marketing for information on non-standard lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ Electrical Characteristics The l denotes the specifications which apply over the full operating junction temperature range, otherwise specifications are at TA = 25°C (Note 3) SYMBOL PARAMETER VIN VIN Operating Voltage Range VUV VIN Undervoltage Lockout CONDITIONS MIN l VIN Low to High l TYP 2.5 2.1 MAX UNITS 5.5 V 2.5 V 3619bfb 2 LTC3619B Electrical Characteristics The l denotes the specifications which apply over the full operating junction temperature range, otherwise specifications are at TA = 25°C (Note 3) SYMBOL PARAMETER IFB Feedback Pin Input Current MAX UNITS ±30 nA VFBREG Feedback Voltage (Channels 1, 2) LTC3619BE, –40°C < TJ < 85°C (Note 7) LTC3619BI, –40°C < TJ < 125°C (Note 7) 0.600 0.600 0.612 0.618 V V ΔVLINEREG VFB Line Regulation VIN = 2.5V to 5.5V (Note 7) 0.01 0.25 %/V ΔVLOADREG VFB Load Regulation (Channel 1) VFB Load Regulation (Channel 2) ILOAD = 0mA to 400mA (Note 7) ILOAD = 0mA to 800mA (Note 7) 0.5 0.5 IS Supply Current Active Mode (Note 4) Shutdown VFB1 = VFB2 = 0.95 × VFBREG VRUN1 = VRUN2 = 0V, VIN = 5.5V 600 875 1 µA µA fOSC Oscillator Frequency VFB = VFBREG 1.8 2.25 2.7 MHz ILIM(PEAK) Peak Switch Current Limit Channel 1 (400mA) Channel 2 (800mA) VIN = 5V, VFB < VFBREG , Duty Cycle <35% 550 1800 800 2400 IINLIM Input Average Current Limit RLIM = 116k RLIM = 116k, LTC3619BE RLIM = 116k, LTC3619BI 450 437 427 475 475 475 RDS(ON) Channel 1 (Note 5) Top Switch On-Resistance Bottom Switch On-Resistance Channel 2 (Note 5) Top Switch On-Resistance Bottom Switch On-Resistance CONDITIONS MIN mA mA mA 0.27 0.25 Ω Ω 0.01 1 µA 0.95 1.3 ms 1 1.2 V 0.01 1 µA VFB from 0.06V to 0.54V VRUN RUN Threshold High IRUN RUN Leakage Current 0V ≤ VRUN ≤ 5V PGOOD Power Good Threshold Entering Window VFB Ramping Up VFB Ramping Down Leaving Window VFB Ramping Up VFB Ramping Down PGOOD Leakage Current 500 513 523 VIN = 5V, ISW = 100mA VIN = 5V, ISW = 100mA Soft-Start Time IPGOOD mA mA Ω Ω tSOFTSTART Power Good Pull-Down On-Resistance % % 0.45 0.35 VIN = 5V, VRUN = 0V RPGOOD l l 0.588 0.582 VIN = 5V, ISW = 100mA VIN = 5V, ISW = 100mA Switch Leakage Current Power Good Blanking Time l l l ISW(LKG) PGOOD Blanking TYP l 0.3 l 0.4 l –5 5 9 –9 PGOOD Rising and Falling, VIN = 5V Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: Guaranteed by long term current density limitations. Note 3: The LTC3619B is tested under pulsed load conditions such that TJ ≈ TA. The LTC3619BE is guaranteed to meet performance specifications from 0°C to 85°C. Specifications over the –40°C to 125°C operating junction temperature range are assured by design, characterization and correlation with statistical process controls. The LTC3619BI is guaranteed to meet specified performance over the full –40°C to 125°C operating junction temperature range. Note that the maximum ambient temperature is determined by specific operating conditions in conjunction with board layout, the rated package thermal resistance and other environmental factors. 11 –11 90 8 VPGOOD = 5V % % –7 7 15 % % µs 30 Ω ±1 µA Note 4: Dynamic supply current is higher due to the internal gate charge being delivered at the switching frequency. Note 5: The switch on-resistance is guaranteed by correlation to wafer level measurements. Note 6: This IC includes overtemperature protection that is intended to protect the device during momentary overload conditions. Junction temperature will exceed 125°C when overtemperature protection is active. Continuous operation above the specified maximum operating junction temperature may impair device reliability. Note 7: The converter is tested in a proprietary test mode that connects the output of the error amplifier to the SW pin, which is connected to an external servo loop. Note 8: TJ is calculated from the ambient temperature TA and the power dissipation as follows: TJ = TA + (PD)(θJA°C/W) 3619bfb 3 LTC3619B Typical Performance Characteristics Supply Current vs Temperature Pulse-Skipping Mode Operation 900 SUPPLY CURRENT (µA) 800 VOUT 50mV/DIV ACCOUPLED IL 100mA/DIV VIN = 5V VOUT = 3.3V ILOAD = 5mA Efficiency vs Input Voltage 100 RUN1 = RUN2 = VIN ILOAD = 0A 90 80 VIN = 5.5V 700 600 EFFICIENCY (%) SW 2V/DIV 5µs/DIV TA = 25°C, VIN = 5V, unless otherwise noted. VIN = 2.7V 500 400 60 50 30 10 200 –50 0 25 50 75 TEMPERATURE (°C) –25 100 VOUT = 3.3V CHANNEL 2 0 3.5 125 4 Oscillator Frequency vs Temperature 1.0 2.4 0.5 0 –0.5 –1.0 –25 0 25 50 75 TEMPERATURE (°C) 100 2.2 2.1 2.0 1.8 –50 125 VIN = 2.7V VIN = 3.6V VIN = 4.2V VIN = 5V –25 3619B G04 0.7 100 0.5 5.5 3619B G07 3.5 0.5 0.4 0.2 –50 VIN = 2.7V VIN = 3.6V VIN = 5V 0.4 0.3 5 3 4 VIN (V) 4.5 5 5.5 3619B G06 Switch On-Resistance vs Temperature, Channel 2 PFET RDS(ON) (Ω) RDS(ON) (Ω) 350 SYNCHRONOUS SWITCH 0.7 MAIN SWITCH 0.6 0.3 0.5 0.2 0.4 0.1 0.3 0 SYNCHRONOUS SWITCH –25 0 25 50 75 TEMPERATURE (°C) 100 125 3619B G08 –0.1 –50 NFET RDS(ON) (Ω) MAIN SWITCH 450 4.5 400 0 2.5 125 MAIN SWITCH 550 SYNCHRONOUS SWITCH 250 2.5 3 3.5 4 VIN (V) MAIN SWITCH 200 VIN = 2.7V VIN = 3.6V VIN = 5V 0.6 RDS(ON) (mΩ) 0 25 50 75 TEMPERATURE (°C) 600 Switch On-Resistance vs Temperature, Channel 1 CHANNEL 1 CHANNEL 2 650 CHANNEL 1 CHANNEL 2 3619B G05 Switch On-Resistance vs Input Voltage 3619B G03 800 2.3 1.9 –1.5 –50 5.5 Switch Leakage vs Input Voltage 1000 LEAKAGE CURRENT (pA) 2.5 FREQUENCY (MHz) VFB ERROR (%) 1.5 5 4.5 VIN (V) 3619B G02 Regulated Voltage vs Temperature IOUT = 10mA IOUT = 1mA IOUT = 0.1mA IOUT = 100mA IOUT = 400mA IOUT = 800mA 40 20 300 3619B G01 70 0.2 SYNCHRONOUS SWITCH –25 0 25 50 75 TEMPERATURE (°C) 100 0.1 125 3619B G09 3619bfb 4 LTC3619B Typical Performance Characteristics Efficiency vs Load Current Efficiency vs Load Current 100 100 80 80 80 70 70 70 VOUT = 3.3V 90 CHANNEL 2 60 50 40 30 20 0 0.0001 60 50 40 30 20 VIN = 3.6V VIN = 4.2V VIN = 5V 10 0.001 0.01 0.1 OUTPUT CURRENT (A) VOUT = 1.2V 90 CHANNEL 1 EFFICIENCY (%) EFFICIENCY (%) EFFICIENCY (%) Efficiency vs Load Current 100 VOUT = 3.3V 90 CHANNEL 1 10 0 0.0001 1 0.001 0.01 0.1 OUTPUT CURRENT (A) Efficiency vs Load Current 70 VOUT ERROR (%) EFFICIENCY (%) 80 60 50 40 0 0.0001 0.001 0.01 0.1 OUTPUT CURRENT (A) CHANNEL 1 2.0 2.0 1.5 1.0 0.5 –1.0 0 100 200 300 LOAD CURRENT (mA) 400 1.0 0.5 VOUT = 1.8V VOUT = 2.5V VOUT = 3.3V –0.5 –1.0 3619B G14 0 100 200 300 400 500 600 700 800 LOAD CURRENT (mA) 3619B G15 Start-Up from Shutdown RUN 2V/DIV RUN 2V/DIV VOUT 2V/DIV 0.2 0 VOUT 1V/DIV RLIM 1V/DIV –0.2 IL 250mA/DIV IIN 500mA/DIV –0.4 –0.6 2.5 CHANNEL 2 1.5 Start-Up from Shutdown VOUT = 1.8V ILOAD = 100mA 1 0 VOUT = 1.8V VOUT = 2.5V VOUT = 3.3V –0.5 1 0.001 0.01 0.1 OUTPUT CURRENT (A) Load Regulation 3.0 0 VIN = 2.7V VIN = 3.6V VIN = 4.2V VIN = 5V VIN = 2.7V VIN = 3.6V VIN = 4.2V VIN = 5V 3619B G12 2.5 Line Regulation 0.4 0 0.0001 1 2.5 3619B G13 0.6 30 10 VOUT ERROR (%) VOUT = 1.2V 90 CHANNEL 2 10 40 Load Regulation 3.0 20 50 3619B G11 100 30 60 20 VIN = 3.6V VIN = 4.2V VIN = 5V 3619B G10 VOUT ERROR (%) TA = 25°C, VIN = 5V, unless otherwise noted. 3.0 3.5 4.0 VIN (V) 4.5 5.0 5.5 200µs/DIV VIN = 5V, VOUT = 3.3V RLOAD = 7Ω CLOAD = 4.7µF 3619B G17 CHANNEL 2 2ms/DIV 3619B G18 VIN = 5V, VOUT = 3.4V RL = NO LOAD, CL = 4.4mF CLIM = 2200pF, ILIM = 500mA 3619B G16 3619bfb 5 LTC3619B Typical Performance Characteristics Average Input Current Limit vs Temperature TA = 25°C, VIN = 5V, unless otherwise noted. Load Step (Channel 1) Load Step (Channel 1) 8 VIN = 5V 6 ILIM = 475mA VOUT 200mV/DIV AC-COUPLED IINLIM ERROR (%) 4 VOUT 200mV/DIV AC-COUPLED 2 0 –2 –4 IL 500mA/DIV IL 500mA/DIV ILOAD 500mA/DIV ILOAD 500mA/DIV 20µs/DIV –6 –8 –50 –25 0 25 50 75 TEMPERATURE (°C) 100 125 VIN = 5V, VOUT = 3.3V ILOAD = 0A TO 400mA CL = 4.7µF 3619B G20 20µs/DIV 3619B G21 VIN = 5V, VOUT = 1.8V ILOAD = 40mA TO 400mA CL = 4.7µF 3619B G19 Pin Functions (DD/MSE) VFB1 (Pin 1/Pin 1): Regulator 1 Output Feedback. Receives the feedback voltage from the external resistive divider across the regulator 1 output. Nominal voltage for this pin is 0.6V. RUN1 (Pin 2/Pin 2): Regulator 1 Enable. Forcing this pin to VIN enables regulator 1, while forcing it to GND causes regulator 1 to shut down. RLIM (Pin 3/Pin 3): Average Input Current Limit Program Pin. Place a resistor and capacitor in parallel from this pin to ground. PGOOD1 (Pin 4/Pin 4): Open-Drain Logic Output. PGOOD1 is pulled to ground if the voltage on the VFB1 pin is not within power good threshold. SW1 (Pin 5/Pin 5): Regulator 1 Switch Node Connection to the Inductor. This pin swings from VIN to GND. VIN (Pin 6/Pin 6): Main Power Supply. Must be closely de-coupled to GND. SW2 (Pin 7/Pin 7): Regulator 2 Switch Node Connection to the Inductor. This pin swings from VIN to GND. PGOOD2 (Pin 8/Pin 8): Open-Drain Logic Output. PGOOD2 is pulled to ground if the voltage on the VFB2 pin is not within power good threshold. RUN2 (Pin 9/Pin 9): Regulator 2 Enable. Forcing this pin to VIN enables regulator 2, while forcing it to GND causes regulator 2 to shut down. VFB2 (Pin 10/Pin 10): Regulator 2 Output Feedback. Receives the feedback voltage from the external resistive divider across the regulator 2 output. Nominal voltage for this pin is 0.6V. GND (Pin 11/Pin 11): Ground. Bottom Exposed Pad. Connect to the (–) terminal of COUT, and the (–) terminal of CIN. The Exposed Pad must be soldered to PCB. 3619bfb 6 LTC3619B Functional Diagram REGULATOR 1 + – 8 + – PGOOD1 0.654V VFB1 0.546V – VFB1 10 6 VIN SLOPE COMP ITH EA 0.6V MIN CLAMP – VSLEEP RS LATCH R + ICOMP + S SOFT-START – SLEEP + Q + Q SWITCHING LOGIC AND BLANKING CIRCUIT ICOMP – ANTI SHOOTTHRU 7 SW1 + IRCMP SHUTDOWN 11 GND – RUN1 RUN2 2 9 SLEEP2 0.6V REF SLEEP1 OSC TO REGULATOR 2 ONLY + – 3 RLIM 1V OSC MIN CLAMP 6 VIN SLOPE COMP 1 0.6V – – + EA ITH – VSLEEP + – 4 + – Q + Q SWITCHING LOGIC AND BLANKING CIRCUIT 0.654V + ICOMP – ANTI SHOOTTHRU 5 SW2 VFB2 0.546V + PGOOD2 R RS LATCH – ICOMP + S SOFT-START SLEEP IRCMP SHUTDOWN – VFB2 11 GND REGULATOR 2 3619B FD 3619bfb 7 LTC3619B Operation The LTC3619B uses a constant-frequency, current mode architecture. The operating frequency is set at 2.25MHz. Both channels share the same clock and run in-phase. The output voltage is set by an external resistor divider returned to the VFB pins. An error amplifier compares the divided output voltage with a reference voltage of 0.6V and regulates the peak inductor current accordingly. The LTC3619B continuously monitors the input current of both channels. When the sum of the currents of both channels exceeds the programmed input current limit set by an external resistor, RLIM , channel 2 is current limited while channel 1 remains regulated. Main Control Loop During normal operation, the top power switch (P-channel MOSFET) is turned on at the beginning of a clock cycle when the VFB voltage is below the reference voltage. The current into the inductor and the load increases until the peak inductor current (controlled by ITH) is reached. The RS latch turns off the synchronous switch and energy stored in the inductor is discharged through the bottom switch (N-channel MOSFET) into the load until the next clock cycle begins, or until the inductor current begins to reverse (sensed by the IRCMP comparator). The peak inductor current is controlled by the internally compensated ITH voltage, which is the output of the error amplifier. This amplifier regulates the VFB pin to the internal 0.6V reference by adjusting the peak inductor current accordingly. When the input current limit is engaged, the peak inductor current will be lowered, which then reduces the switching duty cycle and VOUT. This allows the input voltage to stay regulated when its programmed current output capability is met. Light Load Operation The LTC3619B will automatically transition from continuous operation to the pulse-skipping operation when the load current is low. The inductor current is not fixed during the pulse-skipping mode which allows the LTC3619B to switch at constant-frequency down to very low currents, where it will begin skipping pulses to maintain output regulation. This mode of operation exhibits low output ripple as well as low audio noise and reduced RF interference while providing reasonable low current efficiency. Dropout Operation When the input supply voltage decreases toward the output voltage the duty cycle increases to 100%, which is the dropout condition. In dropout, the PMOS switch is turned on continuously with the output voltage being equal to the input voltage minus the voltage drops across the internal P-channel MOSFET and the inductor. An important design consideration is that the RDS(ON) of the P-channel switch increases with decreasing input supply voltage (see the Typical Performance Characteristics section). Therefore, the user should calculate the worst-case power dissipation when the LTC3619B is used at 100% duty cycle with low input voltage (see Thermal Considerations in the Applications Information section). Soft-Start In order to minimize the inrush current on the input bypass capacitor, the LTC3619B slowly ramps up the output voltage during start-up. Whenever the RUN1 or RUN2 pin is pulled high, the corresponding output will ramp from zero to full-scale over a time period of approximately 950µs. This prevents the LTC3619B from having to quickly charge the output capacitor and thus supplying an excessive amount of instantaneous current. When the output is loaded heavily, for example, with millifarad of capacitance, it may take longer than 950µs to charge the output to regulation. If the output is still low after the soft-start time, the LTC3619B will try to quickly charge the output capacitor. In this case, the input current limit (after it engages) can prevent excessive amount of instantaneous current that is required to quickly charge the output. See the Channel 2 Start-Up from Shutdown curve in the Typical Performance Characteristics section. After input current limit is engaged, the output slowly ramps up to regulation while limited by its 500mA of input current. 3619bfb 8 LTC3619B Operation Short-Circuit Protection Programming Input Current Limit When either regulator output is shorted to ground, the corresponding internal N-channel switch is forced on for a longer time period for each cycle in order to allow the inductor to discharge, thus preventing inductor current runaway. This technique has the effect of decreasing switching frequency. Once the short is removed, normal operation resumes and the regulator output will return to its nominal voltage. Selection of one external RLIM resistor will program the input current limit. The current limit can be programmed from 200mA up to IPEAK current. As the input current increases, RLIM voltage will follow. When RLIM reaches the internal comparator threshold of 1V, channel 2’s power PFET on-time will be shortened, thereby, limiting the input current. Input Current Limit Internal current sense circuitry in each channel measures the inductor current through the voltage drop across the power PFET switch and forces the same voltage across the small sense PFET. The voltage across the small sense PFET generates a current representing 1/55,000th of the inductor current during the on-cycle. The current out of RLIM pin is the summed representation of the inductor currents from both channels, which can be expressed in the following equation. Use the following equation to select the RLIM resistance that corresponds to the input current limit. RLIM = 55kΩ − A IDC (A) IDC is the input current (at VIN) to be limited. The following are some RLIM values with the corresponding current limit. RLIM IDC 91.6k 600mA 110k 500mA 137.5k 400mA IRLIM = IOUT1 • D1 • K1 + IOUT2 • D2 • K2, where D1 = VOUT1/VIN and D2 = VOUT2 /VIN are the duty cycle of channel 1 and 2, respectively. K1 is the ratio RDS(ON) (power PFET)/RDS(ON)(sense PFET) of channel 1, and K2 is the ratio RDS(ON)(power PFET)/ RDS(ON) (sense PFET) of channel 2. The ratio of the power PFET to the sense PFET is trimmed to within 2%. Given that both PFETs are carefully laid out and matched, their temperature and voltage coefficient effects will be similar and their terms be canceled out in the equation. In that case, the constants K1 and K2 will only be dependent on area scaling, which is trimmed to within 2%. Thus, the IRLIM current will track the input current very well over varying temperature and VIN. The RLIM pin can be grounded to disable input current limit function. Selection of CLIM Capacitance Since IRLIM current is a function of the inductor current, its dependency on the duty cycle cannot be ignored. Thus, a CLIM capacitor is needed to integrate the IRLIM current and smooth out transient currents. The LTC3619B is stable with any size capacitance >100pF at the RLIM pin. Each application input current limit will call for different CLIM value to optimize its response time. Using a large CLIM capacitor requires longer time for the RLIM pin voltage to charge. For example, consider the application 500mA input current limit, 5V input and 1A, 2.5V output with a 50% duty cycle. When an instantaneous 1A output pulse is applied, the current out of the RLIM pin becomes 1A/55k = 18.2µA during the 50% on-time or 9.1µA full duty cycle. With a CLIM capacitor of 1µF, RLIM of 116k, and using I = CdV/dt, it will take 110ms for CLIM to charge from 0V to 1V. This is the time after which the LTC3619B will start input current limiting. Any current within this time must be considered in each application to determine if it is tolerable. 3619bfb 9 LTC3619B Operation Figure 1a shows VIN (IIN) current below input current limit with a CLIM capacitor of 0.1µF. Channel 1 is unloaded to simplify calculations. When the load pulse is applied, under the specified condition, ILIM current is 1.1A/55k • 0.66 = 13.2µA, where 0.66 is the duty cycle. It will take a little more than 7.5ms to charge the CLIM capacitor from 0V to 1V, after which the LTC3619B begins to limit input current. The IIN current is not limited during this 7.5ms time and is more than 725mA. This current transient may cause the input supply to temporarily droop if the supply current compliance is exceeded, but recovers after the input current limit engages. The output will continue to deliver the required current load while the output voltage droops to allow the input voltage to remain regulated during input current limit. this 92µs, the input current limit is not yet engaged and the output must deliver the required current load. This may cause the input voltage to droop if the current compliance is exceeded. Depending on how long this time is, the VIN supply decoupling capacitor can provide some of this current before VIN droops too much. In applications with a bigger VIN supply decoupling capacitor and where VIN supply is allow to droop closer to dropout, the CLIM capacitor can be increased slightly. This will delay the start of input current limit and artificially regulated VOUT before input current limit is engaged. In this case, within the 577µs load pulse, the VOUT voltage will stay artificially regulated for 92µs out of the total 577µs before the input current limit activates. This approach may be used if a faster recovery on the output is desired. For applications with short load pulse duration, a smaller CLIM capacitor may be the better choice as in the example shown in Figure 1b. Channel 1 is unloaded for simplification. In this example, a 577µs, 0A to 2A output pulse is applied once every 4.7ms. A CLIM capacitor of 2.2nF requires 92µs for VRLIM to charge from 0V to 1V. During Selecting a very small CLIM will speed up response time but it can put the device within threshold of interfering with normal operation and input current limit in every few switching cycles. This may be undesirable in terms of noise. Use 2πRC >> 100/clock frequency (2.25MHz) as a starting point, R being RLIM, C being CLIM. VOUT 2V/DIV VOUT 200mV/DIV IIN 500mA/DIV VIN AC-COUPLED 1V/DIV VRLIM 1V/DIV IOUT 500mA/DIV IIN 500mA/DIV IL 1A/DIV 50ms/DIV 3619B F01a VIN = 5V, 500mA COMPLIANT RLIM = 116k, CLIM = 0.1µF ILOAD = 0A to 1.1A, COUT = 2.2mF, VOUT = 3.3V ILIM = 475mA, CHANNEL 1 NOT LOADED Figure 1a. Input Current Limit Within 100ms Load Pulses 1ms/DIV 3619B F01b VIN = 5V, 500mA COMPLIANT RLIM = 116k, CLIM = 2200pF ILOAD = 0A to 2A, COUT = 2.2mF, VOUT = 3.3V ILIM = 475mA, CHANNEL 1 NOT LOADED Figure 1b. Input Current Limit Within 577µs, 2A Repeating Load Pulses 3619bfb 10 LTC3619B Applications Information A general LTC3619B application circuit is shown in Figure 2. External component selection is driven by the load requirement, and begins with the selection of the inductor L. Once the inductor is chosen, CIN and COUT can be selected. Inductor Selection Although the inductor does not influence the operating frequency, the inductor value has a direct effect on ripple current. The inductor ripple current DIL decreases with higher inductance and increases with higher VIN or VOUT : VOUT VOUT • 1− fO • L VIN ΔIL = (1) Accepting larger values of DIL allows the use of low inductances, but results in higher output voltage ripple, greater core losses, and lower output current capability. A reasonable starting point for setting ripple current is 40% of the maximum output load current. So, for a 800mA regulator, DIL = 320mA (40% of 800mA). The inductor value will also have an effect on Burst Mode operation. The transition to low current operation begins when the peak inductor current falls below a level set by the internal burst clamp. Lower inductor values result in higher ripple current which causes the transition to occur at lower load currents. This causes a dip in efficiency in the upper range of low current operation. Furthermore, lower inductance values will cause the bursts to occur with increased frequency. RUN2 VIN RUN1 L2 VOUT2 SW2 CF2 COUT2 R4 R3 SW1 VFB2 RLIM CLIM VFB1 GND Table 1. Representative Surface Mount Inductors MANUFACTURER PART NUMBER L1 CF1 R1 R2 RLIM VOUT1 COUT1 3619B F02 MAX DC VALUE CURRENT DCR HEIGHT Coilcraft LPS4012-152ML LPS4012-222ML LPS4012-332ML LPS4012-472ML LPS4018-222ML LPS4018-332ML LPS4018-472ML 1.5µH 2.2µH 3.3µH 4.7µH 2.2µH 3.3µH 4.7µH 2200mA 1750mA 1450mA 1450mA 2300mA 2000mA 1800mA 0.070Ω 0.100Ω 0.100Ω 0.170Ω 0.070Ω 0.080Ω 0.125Ω 1.2mm 1.2mm 1.2mm 1.2mm 1.8mm 1.8mm 1.8mm FDK FDKMIPF2520D FDKMIPF2520D FDKMIPF2520D 4.7µH 3.3µH 2.2µH 1100mA 1200mA 1300mA 0.11Ω 0.1Ω 0.08Ω 1mm 1mm 1mm LQH32CN4R7M23 4.7µH 450mA 0.2Ω 2mm ELT5KT4R7M 4.7µH 950mA 0.2Ω 1.2mm CDRH2D18/LD CDH38D11SNP3R3M CDH38D11SNP2R2M 4.7µH 3.3μH 630mA 1560mA 0.086Ω 0.115Ω 2mm 1.2mm 2.2μH 1900mA 0.082Ω 1.2mm 2.2µH 2.2µH 3.3µH 2.2µH 4.7µH 510mA 530mA 410mA 1100mA 750mA 0.13Ω 0.33Ω 0.27Ω 0.1Ω 0.19Ω 1.6mm 1.25mm 1.6mm 1mm 1mm 4.7µH 700mA 0.28Ω 1mm 3.3µH 870mA 0.17Ω 1mm 2.2µH 1000mA 0.12Ω 1mm 2.2µH 1500mA 0.076Ω 1.2mm 3.3μH 1700mA 0.095Ω 1.2mm 2.2µH 2300mA 0.059Ω 1.4mm Murata Panasonic Sumida TDK PGOOD2 PGOOD1 LTC3619B Different core materials and shapes will change the size/ current and price/current relationship of an inductor. Toroid or shielded pot cores in ferrite or permalloy materials are small and do not radiate much energy, but generally cost more than powdered iron core inductors with similar electrical characteristics. The choice of which style inductor to use often depends more on the price versus size requirements, and any radiated field/EMI requirements, than on what the LTC3619B requires to operate. Table 1 shows some typical surface mount inductors that work well in LTC3619B applications. Taiyo Yuden CB2016T2R2M CB2012T2R2M CB2016T3R3M NR30102R2M NR30104R7M VIN 2.5V TO 5.5V C1 Inductor Core Selection VLF3010AT4R7MR70 VLF3010AT3R3MR87 VLF3010AT2R2M1R0 VLF4012AT-2R2 M1R5 VLF5012ST-3R3 M1R7 VLF5014ST-2R2 M2R3 Figure 2. LTC3619B General Schematic 3619bfb 11 LTC3619B Applications Information Input Capacitor (CIN) Selection In continuous mode, the input current of the converter is a square wave with a duty cycle of approximately VOUT / VIN . To prevent large voltage transients, a low equivalent series resistance (ESR) input capacitor sized for the maximum RMS current must be used. The maximum RMS capacitor current is given by: IRMS ≈IMAX VOUT (VIN − VOUT ) VIN Where the maximum average output current IMAX equals the peak current minus half the peak-to-peak ripple current, IMAX = ILIM – DIL /2. This formula has a maximum at VIN = 2VOUT, where IRMS = IOUT/2. This simple worst-case is commonly used to design because even significant deviations do not offer much relief. Note that capacitor manufacturer’s ripple current ratings are often based on only 2000 hours lifetime. This makes it advisable to further derate the capacitor, or choose a capacitor rated at a higher temperature than required. Several capacitors may also be paralleled to meet the size or height requirements of the design. An additional 0.1µF to 1µF ceramic capacitor is also recommended on VIN for high frequency decoupling when not using an all-ceramic capacitor solution. Output Capacitor (COUT) Selection The selection of COUT is driven by the required effective series resistance (ESR). Typically, once the ESR requirement for COUT has been met, the RMS current rating generally far exceeds the IRIPPLE(P-P) requirement. The output ripple DVOUT is determined by: 1 ΔVOUT ≈ ΔIL ESR + 8fOCOUT capacitor types include Sanyo POSCAP, Kemet T510 and T495 series, and Sprague 593D and 595D series. Consult the manufacturer for other specific recommendations. Using Ceramic Input and Output Capacitors Higher values, lower cost ceramic capacitors are now becoming available in smaller case sizes. Their high ripple current, high voltage rating and low ESR make them ideal for switching regulator applications. Because the LTC3619B control loop does not depend on the output capacitor’s ESR for stable operation, ceramic capacitors can be used freely to achieve very low output ripple and small circuit size. However, care must be taken when ceramic capacitors are used at the input. When a ceramic capacitor is used at the input and the power is supplied by a wall adapter through long wires, a load step at the output can induce ringing at the input, VIN. At best, this ringing can couple to the output and be mistaken as loop instability. At worst, a sudden inrush of current through the long wires can potentially cause a voltage spike at VIN, large enough to damage the part. For more information, see Application Note 88. When choosing the input and output ceramic capacitors, choose the X5R or X7R dielectric formulations. These dielectrics have the best temperature and voltage characteristics of all the ceramics for a given value and size. Setting the Output Voltage The LTC3619B regulates the VFB1 and VFB2 pins to 0.6V during regulation. Thus, the output voltage is set by a resistive divider, Figure 2, according to the following formula: R2 VOUT = 0.6V 1+ R1 (2) where fO = operating frequency, COUT = output capacitance and DIL = ripple current in the inductor. For a fixed output voltage, the output ripple is highest at maximum input voltage since DIL increases with input voltage. Keeping the current small (< 10µA) in these resistors maximizes efficiency, but making it too small may allow stray capacitance to cause noise problems or reduce the phase margin of the error amp loop. If tantalum capacitors are used, it is critical that the capacitors are surge tested for use in switching power supplies. An excellent choice is the AVX TPS series of surface mount tantalum. These are specially constructed and tested for low ESR so they give the lowest ESR for a given volume. Other To improve the frequency response of the main control loop, a feedback capacitor (CF) may also be used. Great care should be taken to route the VFB line away from noise sources, such as the inductor or the SW line. 3619bfb 12 LTC3619B Applications Information Checking Transient Response The regulator loop response can be checked by looking at the load transient response. Switching regulators take several cycles to respond to a step in load current. When a load step occurs, VOUT immediately shifts by an amount equal to DILOAD • ESR, where ESR is the effective series resistance of COUT. DILOAD also begins to charge or discharge COUT generating a feedback error signal used by the regulator to return VOUT to its steady-state value. During this recovery time, VOUT can be monitored for overshoot or ringing that would indicate a stability problem. The initial output voltage step may not be within the bandwidth of the feedback loop, so the standard second order overshoot/DC ratio cannot be used to determine the phase margin. In addition, feedback capacitors (CF1 and CF2) can be added to improve the high frequency response, as shown in Figure 2. Capacitor CF provides phase lead by creating a high frequency zero with R2 which improves the phase margin. The output voltage settling behavior is related to the stability of the closed-loop system and will demonstrate the actual overall supply performance. For a detailed explanation of optimizing the compensation components, including a review of control loop theory, refer to Application Note 76. In some applications, a more severe transient can be caused by switching in loads with large (>1µF) input capacitors. The discharged input capacitors are effectively put in parallel with COUT, causing a rapid drop in VOUT. No regulator can deliver enough current to prevent this problem if the switch connecting the load has low resistance and is driven quickly. The solution is to limit the turn-on speed of the load switch driver. A Hot Swap™ controller is designed specifically for this purpose and usually incorporates current limiting, short-circuit protection, and soft-starting. Efficiency Considerations The percent efficiency of a switching regulator is equal to the output power divided by the input power times 100%. It is often useful to analyze individual losses to determine what is limiting the efficiency and which change would produce the most improvement. Percent efficiency can be expressed as: % Efficiency = 100% – (L1 + L2 + L3 + ...) where L1, L2, etc., are the individual losses as a percentage of input power. Although all dissipative elements in the circuit produce losses, four sources usually account for the losses in LTC3619B circuits: 1) VIN quiescent current, 2) switching losses, 3) I2R losses, 4) other system losses. 1.The VIN current is the DC supply current given in the Electrical Characteristics which excludes MOSFET driver and control currents. VIN current results in a small (<0.1%) loss that increases with VIN, even at no load. 2.The switching current is the sum of the MOSFET driver and control currents. The MOSFET driver current results from switching the gate capacitance of the power MOSFETs. Each time a MOSFET gate is switched from low to high to low again, a packet of charge dQ moves from VIN to ground. The resulting dQ/dt is a current out of VIN that is typically much larger than the DC bias current. In continuous mode, IGATECHG = fO(QT + QB), where QT and QB are the gate charges of the internal top and bottom MOSFET switches. The gate charge losses are proportional to VIN and thus their effects will be more pronounced at higher supply voltages. 3.I2R losses are calculated from the DC resistances of the internal switches, RSW , and external inductor, RL. In continuous mode, the average output current flows through inductor L, but is “chopped” between the internal top and bottom switches. Thus, the series resistance looking into the SW pin is a function of both top and bottom MOSFET RDS(ON) and the duty cycle (DC) as follows: RSW = (RDS(ON)TOP) • (DC) + (RDS(ON)BOT) • (1– DC) The RDS(ON) for both the top and bottom MOSFETs can be obtained from the Typical Performance Characteristics curves. Thus, to obtain I2R losses: I2R losses = IOUT 2 • (RSW + RL) 3619bfb 13 LTC3619B Applications Information 4.Other “hidden” losses, such as copper trace and internal battery resistances, can account for additional efficiency degradations in portable systems. It is very important to include these “system” level losses in the design of a system. The internal battery and fuse resistance losses can be minimized by making sure that CIN has adequate charge storage and very low ESR at the switching frequency. Other losses, including diode conduction losses during dead-time, and inductor core losses, generally account for less than 2% total additional loss. Thermal Considerations In a majority of applications, the LTC3619B does not dissipate much heat due to its high efficiency. In the unlikely event that the junction temperature somehow reaches approximately 150°C, both power switches will be turned off and the SW node will become high impedance. The goal of the following thermal analysis is to determine whether the power dissipated causes enough temperature rise to exceed the maximum junction temperature (125°C) of the part. The temperature rise is given by: TRISE = PD • θJA where PD is the power dissipated by the regulator and θJA is the thermal resistance from the junction of the die to the ambient temperature. The junction temperature, TJ, is given by: TJ = TRISE + TAMBIENT As a worst-case example, consider the case when the LTC3619B is in dropout on both channels at an input voltage of 2.7V with a load current of 400mA and 800mA and an ambient temperature of 70°C. From the Typical Performance Characteristics graph of Switch Resistance, the RDS(ON) of the switch is 0.56Ω and 0.33Ω. Therefore, power dissipated by each channel is: PD1 = IOUT 2 • RDS(ON) = 90mV PD2 = IOUT 2 • RDS(ON) = 212mV Given that the thermal resistance of a properly soldered DFN package is approximately 40°C/W, the junction temperature of an LTC3619B device operating in a 70°C ambient temperature is approximately: TJ = (0.302W • 40°C/W) + 70°C = 82.1°C which is well below the absolute maximum junction temperature of 125°C. PC Board Layout Considerations When laying out the printed circuit board, the following checklist should be used to ensure proper operation of the LTC3619B. These items are also illustrated graphically in the layout diagrams of Figures 3a and 3b. Check the following in your layout: 1.Does the capacitor CIN connect to the power VIN (Pin 6) and GND (Pin 11) as closely as possible? This capacitor provides the AC current of the internal power MOSFETs and their drivers. 2.Are the respective COUT and L closely connected? The (–) plate of COUT returns current to GND and the (–) plate of CIN. 3.The resistor divider, R1 and R2, must be connected between the (+) plate of COUT1 and a ground sense line terminated near GND (Pin 11). The feedback signals VFB1 and VFB2 should be routed away from noisy components and traces, such as the SW lines (Pins 5 and 7), and their trace length should be minimized. 4.Keep sensitive components away from the SW pins, if possible. The input capacitor CIN, CLIM and the resistors R1, R2, R3 and R4 and RLIM should be routed away from the SW traces and the inductors. 5.A ground plane is preferred, but if not available, keep the signal and power grounds segregated with small signal components returning to the GND pin at a single point. These ground traces should not share the high current path of CIN or COUT. 6.Flood all unused areas on all layers with copper. Flooding with copper will reduce the temperature rise of power components. These copper areas should be connected to VIN or GND. 3619bfb 14 LTC3619B Applications Information VIN 2.5V TO 5.5V RUN2 VIN RUN1 C1 PGOOD2 PGOOD1 L2 SW2 CF2 VOUT2 R4 COUT2 L1 SW1 VFB1 VFB2 RLIM R3 RLIM VOUT1 CF1 LTC3619B GND R1 R2 COUT1 CLIM 3619B F03a BOLD LINES INDICATE HIGH CURRENT PATHS Figure 3a. LTC3619B Layout Diagram (See Board Layout Checklist) VIN VOUT1 GND VIN VIA COUT1 GND VIA CIN L2 VOUT2 COUT2 VIN SW2 PGOOD2 RUN2 VFB2 L1 SW1 PGD1 RLIM RUN1 VFB1 R3 R1 R4 R2 CF2 CF1 RLIM CLIM VIA TO VOUT1 VIA TO VOUT2 GND 3619B F03b Figure 3b. LTC3619B Suggested Layout 3619bfb 15 LTC3619B Applications Information Design Example As a design example, consider using the LTC3619B in a USB-GSM application, with VIN = 5V, IINMAX = 500mA, with the output of channel 2 charging a SuperCap of 4.4mF. The load on each channel requires a maximum of 400mA and 800mA in active mode and 2mA in standby mode. The output voltages are VOUT1 = 1.8V and VOUT2 = 3.4V. Start with channel 1. First, calculate the inductor value for about 40% ripple current (160mA in this example) at maximum VIN. Using a derivation of Equation 1: L1= 1.8V 1.8V • 1− = 3.2µH 2.25MHz • (160mA) 5V The feedback resistors program the output voltage. To maintain high efficiency at light loads, the current in these resistors should be kept small. Choosing 10µA with the + L2 = 1.5µH A feed forward capacitor is not used on channel 2 since the 4.4mF SuperCap will inhibit any fast output voltage transients. Figure 4 shows the complete schematic for this example, along with the efficiency curve and transient response. Input current limit is set at 475mA average current, RLIM = 116k, CLIM = 2200pF. See Programming Input Current Limit section for selecting RLIM and Selection of CLIM Capacitance section for CLIM. RUN2 VIN RUN1 L1 3.3µH LTC3619B SW2 SW1 R4 276k COUT2 2.2mF ×2 SuperCap Using the same analysis for channel 2 (VOUT2 = 3.4V), the results are: PGOOD2 PGOOD1 L2 1.5µH VOUT2 3.4V AT 800mA An optional 22pF feedback capacitor (CF1) may be used to improve transient response. R4 = 276k A 10µF ceramic capacitor should be more than sufficient for this output capacitor. As for the input capacitor, a typical value of CIN = 10µF should suffice, if the source impedance is very low. CIN 10µF V R2 = OUT − 1 • R1= 118k 0.6 R3 = 59k For the inductor, use the closest standard value of 3.3µH. VIN USB INPUT 5V 0.6V feedback voltage makes R1~60k. A close standard 1% resistor is 59k. Using Equation 2. R3 59k VFB2 RLIM RLIM 116k CF1, 22pF VFB1 R1 R2 59k 118k GND VOUT1 1.8V AT 400mA COUT1 10µF 3619B F04a CLIM 2200pF ILIM = 475mA CIN, COUT1: AVX 08056D106KAT2A COUT2: VISHAY 592D228X96R3X2T20H L1: COILCRAFT LPS4012-332ML L2: COILCRAFT LPS4012-152ML Figure 4a. Design Example Circuit 3619bfb 16 LTC3619B Applications Information 80 1 60 0.1 50 40 30 0.01 20 10 0 0.0001 1 70 60 0.1 50 40 30 0.01 20 VIN = 3.6V VIN = 4.2V VIN = 5V 10 VOUT = 1.8V 0.001 0.01 0.1 OUTPUT CURRENT (A) 10 VOUT = 3.4V 1 0.001 POWER LOSS (W) 70 90 POWER LOSS (W) EFFICIENCY (%) 80 100 10 VIN = 2.7V VIN = 3.6V VIN = 4.2V VIN = 5V 90 EFFICIENCY (%) 100 0 0.0001 0.001 0.01 0.1 OUTPUT CURRENT (A) 1 0.001 3619B F04b Figure 4b. Efficiency vs Output Current VOUT 200mV/DIV VOUT 100mV/DIV AC-COUPLED VIN 1V/DIV AC-COUPLED IL 500mA/DIV IOUT 500mA/DIV ILOAD 500mA/DIV IIN 500mA/DIV 1ms/DIV 20µs/DIV VIN = 5V, 500mA COMPLIANT RLIM = 116kΩ, CLIM = 2200pF ILOAD = 0A TO 2A, COUT = 4.4mF, VOUT = 3.4V ILIM = 475mA, CHANNEL 1 NOT LOADED VIN = 5V, VOUT = 1.8V ILOAD = 40mA TO 400mA CL = 10µF 3619B F04c Figure 4c. Transient Response 3619bfb 17 LTC3619B Package Description Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. DD Package 10-Lead Plastic DFN (3mm × 3mm) (Reference LTC DWG # 05-08-1699 Rev C) R = 0.125 TYP 6 0.40 ±0.10 10 0.70 ±0.05 PIN 1 TOP MARK (SEE NOTE 6) 3.55 ±0.05 1.65 ±0.05 2.15 ±0.05 (2 SIDES) PACKAGE OUTLINE 0.50 BSC 2.38 ±0.05 (2 SIDES) RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS 0.25 ±0.05 3.00 ±0.10 (4 SIDES) 1.65 ±0.10 (2 SIDES) PIN 1 NOTCH R = 0.20 OR 0.35 × 45° CHAMFER 5 0.75 ±0.05 0.200 REF 0.00 – 0.05 NOTE: 1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-2). CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS OF VARIATION ASSIGNMENT 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 1 (DD) DFN REV C 0310 0.25 ±0.05 0.50 BSC 2.38 ±0.10 (2 SIDES) BOTTOM VIEW—EXPOSED PAD 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE MSE Package 10-Lead Plastic MSOP, Exposed Die Pad (Reference LTC DWG # 05-08-1664 Rev H) 1.88 ±0.102 (.074 ±.004) 5.23 (.206) MIN 0.889 ±0.127 (.035 ±.005) 1.68 ±0.102 (.066 ±.004) BOTTOM VIEW OF EXPOSED PAD OPTION 1.88 1 (.074) 1.68 (.066) 0.05 REF 3.20 – 3.45 (.126 – .136) 10 0.50 0.305 ± 0.038 (.0197) (.0120 ±.0015) BSC TYP RECOMMENDED SOLDER PAD LAYOUT 3.00 ±0.102 (.118 ±.004) (NOTE 3) 10 9 8 7 6 DETAIL “B” CORNER TAIL IS PART OF DETAIL “B” THE LEADFRAME FEATURE. FOR REFERENCE ONLY NO MEASUREMENT PURPOSE 0.497 ±0.076 (.0196 ±.003) REF 3.00 ±0.102 (.118 ±.004) (NOTE 4) 4.90 ±0.152 (.193 ±.006) 0.254 (.010) 0.29 REF DETAIL “A” 0° – 6° TYP GAUGE PLANE 1 2 3 4 5 0.53 ±0.152 (.021 ±.006) 0.86 (.034) REF 1.10 (.043) MAX DETAIL “A” 0.18 (.007) SEATING PLANE 0.17 – 0.27 (.007 – .011) TYP NOTE: 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 0.50 (.0197) BSC 0.1016 ±0.0508 (.004 ±.002) MSOP (MSE) 0911 REV H 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX 6. EXPOSED PAD DIMENSION DOES INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD SHALL NOT EXCEED 0.254mm (.010") PER SIDE. 3619bfb 18 LTC3619B Revision History REV DATE DESCRIPTION A 4/10 Changes to Temperature Range in Order Information section 2 Updates in the Electrical Characteristics table 3 B 10/12 PAGE NUMBER Edit on y-axis on graph G18 5 Updated DD package drawing 18 Clarified Load Step on Typical Performance Characteristics curves 6 Modified soft-start timing in Soft-Start section 8 Clarified device orientation on Suggested Layout 15 3619bfb Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 19 LTC3619B Typical Applications Dual 400mA/800mA Buck Converter, ILIM = 500mA VIN 3.3V TO 5.5V C1 10µF RUN2 VIN RUN1 L2 1.5µH VOUT2 3.3V AT 800mA R4 1150k + COUT2 2.2mF ×2 SuperCap PGOOD2 PGOOD1 L1 3.3µH LTC3619B SW2 SW1 VFB2 R3 RLIM 255k RLIM 110k CF1, 22pF VFB1 R2 R1 255k 511k GND VOUT1 1.8V AT 400mA COUT1 10µF 3619B TA02 CLIM 1000pF L1: COILCRAFT LPS4012-332ML L2: COILCRAFT LPS4012-152ML C1, COUT1: AVX 08056D106KAT2A COUT2: VISHAY 592D228X96R3X2T20H Dual 400mA/800mA Buck Converter, ILIM = 475mA or Disabled VIN 3.3V TO 5.5V C1 10µF RUN2 VIN RUN1 L2 1.5µH VOUT2 3.3V AT 800mA R4 1150k + COUT2 2.2mF ×2 SuperCap ILIM DISABLE PGOOD2 PGOOD1 L1 3.3µH LTC3619B SW2 SW1 VFB2 R3 RLIM 255k RLIM 116k C1, COUT1: AVX 08056D106KAT2A COUT2: VISHAY 592D228X96R3X2T20H CF1, 22pF VFB1 R2 R1 255k 511k GND CLIM 2200pF VOUT1 1.8V AT 400mA COUT1 10µF 3619B TA03 L1: COILCRAFT LPS4012-332ML L2: COILCRAFT LPS4012-152ML Related Parts PART NUMBER LTC3619 DESCRIPTION Dual 400mA and 800mA IOUT, 2.25MHz, Synchronous Step-Down DC/DC Converter LTC3127 1.2A IOUT, 1.6MHz, Synchronous Buck-Boost DC/DC Converter with Adjustable Input Current Limit LTC3125 1.2A IOUT, 1.6MHz, Synchronous Boost DC/DC Converter with Adjustable Input Current Limit LTC3417A/ Dual 1.5A/1A, 4MHz, Synchronous Step-Down DC/ LTC3417A-2 DC Converter LTC3407A/ Dual 600mA/600mA, 1.5MHz, Synchronous LTC3407A-2 Step-Down DC/DC Converter LTC3548/LTC3548-1/ Dual 400mA and 800mA IOUT, 2.25MHz, Synchronous Step-Down DC/DC Converter LTC3548-2 LTC3546 Dual 3A/1A, 4MHz, Synchronous Step-Down DC/DC Converter COMMENTS 95% Efficiency, VIN(MIN) = 2.5V, VIN(MAX) = 5.5V, VOUT(MIN) = 0.6V, IQ = 50µA, ISD < 1µA, MS10E, 3mm × 3mm DFN-10 94% Efficiency, VIN(MIN) = 1.8V, VIN(MAX) = 5.5V, VOUT(MAX) = 5.25V, IQ = 18µA, ISD < 1µA, 3mm × 3mm DFN-MSOP10E 94% Efficiency, VIN(MIN) = 1.8V, VIN(MAX) = 5.5V, VOUT(MAX) = 5.25V, IQ = 15µA, ISD < 1µA, 2mm × 3mm DFN-8 95% Efficiency, VIN(MIN) = 2.3V, VIN(MAX) = 5.5V, VOUT(MIN) = 0.8V, IQ = 125µA, ISD = <1µA, TSSOP-16E, 3mm × 5mm DFN-16 95% Efficiency, VIN(MIN) = 2.5V, VIN(MAX) = 5.5V, VOUT(MIN) = 0.6V, IQ = 40µA, ISD = <1µA, MS10E, 3mm × 3mm DFN-10 95% Efficiency, VIN(MIN) = 2.5V, VIN(MAX) = 5.5V, VOUT(MIN) = 0.6V, IQ = 40µA, ISD = <1µA, MS10E, 3mm × 3mm DFN-10 95% Efficiency, VIN(MIN) = 2.3V, VIN(MAX) = 5.5V, VOUT(MIN) = 0.6V, IQ = 160µA, ISD = <1µA, 4mm × 5mm QFN-28 3619bfb 20 Linear Technology Corporation LT 1012 REV B • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com LINEAR TECHNOLOGY CORPORATION 2009