Sept 7, 2009 IRS2158D(S) Advanced Information Features • • • • • • • • • • • • • • • • • • Ballast control and half-bridge driver in one IC Programmable half-bridge over-current protection Programmable preheat frequency Programmable preheat time Programmable ignition ramp Programmable run frequency Closed-loop ignition current regulation Voltage-controlled oscillator (VCO) Programmable deadtime End-of-life window comparator pin Internal 60-event current sense up/down fault counter Lamp removal/auto-restart shutdown pin Brownout protection Low offset op amp Internal bootstrap MOSFET Internal 15.6 V zener clamp diode on Vcc Micropower startup (250 μA) Latch immunity and ESD protection Product Summary Topology Half-Bridge VOFFSET 600 V Vio (typical) Io+ & I o- (typical) Start-up current (typical) 0V 180 mA & 260 mA 250 µA Package Options PDIP16 SOICN16 Typical Applications • Fluorescent lamp ballast dimming (<5%) Typical Connection Diagram www.irf.com © 2009 International Rectifier IRS2158D(S) Table of Contents Description..........................................................................................................................................................3 Qualification Information .....................................................................................................................................4 Absolute Maximum Ratings................................................................................................................................5 Recommended Operating Conditions ................................................................................................................6 Recommended Component Values ...................................................................................................................6 Electrical Characteristics ....................................................................................................................................7 Functional Block Diagram.................................................................................................................................10 Input/Output Pin Equivalent Circuit Diagrams ..................................................................................................11 Lead Definitions ................................................................................................................................................12 Lead Assignments ............................................................................................................................................12 State Diagram...................................................................................................................................................13 Timing Diagram Ballast Section .......................................................................................................................14 Application Information and Additional Details .................................................................................................15 Parameter Temperature Trends ........................................................................ Error! Bookmark not defined. Package Details: PDIP16 and SOIC16N..........................................................................................................27 Package Details: SOIC16N, Tape and Reel ....................................................................................................28 Part Marking Information ..................................................................................................................................29 Ordering information .........................................................................................................................................30 www.irf.com © 2009 International Rectifier 2 IRS2158D(S) Description The IRS2158D is a fully integrated, fully protected 600V ballast control IC designed to drive all types of fluorescent lamps. The IRS2158D features include programmable preheat and run frequencies, programmable preheat time, closed-loop half-bridge ignition current regulation, programmable end-of-life protection, brownout protection and low input offset op amp. The op amp can be used for dimming, current or power control. Comprehensive protection features such as protection from failure of a lamp to strike, filament failures, end-of-life protection, have been included in the design. The IRS2158D is available in both 16-pin PDIP and 16-pin narrow body SOIC packages. www.irf.com © 2009 International Rectifier 3 IRS2158D(S) Qualification Information† Qualification Level Moisture Sensitivity Level Machine Model ESD Human Body Model IC Latch-Up Test RoHS Compliant † †† ††† Industrial†† Comments: This family of ICs has passed JEDEC’s Industrial qualification. IR’s Consumer qualification level is granted by extension of the higher Industrial level. MSL2†† 260°C SOIC16N (per IPC/JEDEC J-STD-020) Not applicable PDIP16 (non-surface mount package style) Class B (per JEDEC standard JESD22-A115) Class 3A (per EIA/JEDEC standard EIA/JESD22-A114) Class I, Level A (per JESD78) Yes Qualification standards can be found at International Rectifier’s web site http://www.irf.com/ Higher qualification ratings may be available should the user have such requirements. Please contact your International Rectifier sales representative for further information. Higher MSL ratings may be available for the specific package types listed here. Please contact your International Rectifier sales representative for further information. www.irf.com © 2009 International Rectifier 4 IRS2158D(S) Absolute Maximum Ratings Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM, all currents are defined positive into any lead. The Thermal Resistance and Power Dissipation ratings are measured under board mounted and still air conditions. Symbol VB VS VHO VLO Definition VB Pin High-Side Floating Supply Voltage VS Pin High-Side Floating Supply Offset Voltage HO Pin High-Side Floating Output Voltage LO Pin Low-Side Output Voltage Maximum allowable output current (HO, LO) due to IOMAX external power transistor miller effect VCPH CPH Pin Voltage IVCO VCO Pin Current IFMIN FMIN Pin Current VVCO VCO Pin Voltage VNINV NINV pin voltage VINV INV pin voltage VOUT OUT pin voltage VCT CT Pin Voltage ICT CT Pin Current VDC VDC Pin Voltage IDC VDC Pin Current VSD/EOL SD/EOL Pin Voltage ISD/EOL SD/EOL Pin Current VCS CS Pin Voltage ICS CS Pin Current dV/dt Allowable VS Pin Offset Voltage Slew Rate PD Package Power Dissipation @ TA ≤ +25ºC (16-Pin DIP) PD = (TJMAX-TA)/RθJA (16-Pin SOIC) RθJA Thermal Resistance, Junction to Ambient (16-Pin DIP) (16-Pin SOIC) TJ Junction Temperature TS Storage Temperature TL † Lead Temperature (soldering, 10 seconds) Min. -0.3 VB – 25 VS - 0.3 -0.3 Max. 625 VB + 0.3 VB + 0.3 VCC + 0.3 Units V -500 500 mA -0.3 -5 VCC + 0.3 5 V mA -0.3 VCC + 0.3 V -5 -0.3 -5 -0.3 -5 -0.3 -5 -50 ---------55 -55 5 VCC + 0.3 5 VCC + 0.3 5 VCC + 0.3 5 50 1.3 1.4 70 82 150 150 mA V mA V mA V mA V/ns W W ºC/W --- 300 ºC This IC contains a zener clamp structure between the chip VCC and COM which has a nominal breakdown voltage of 15.6V. This supply pin should not be driven by a DC, low impedance power source greater than the VCLAMP specified in the Electrical Characteristics section. www.irf.com © 2009 International Rectifier 5 IRS2158D(S) Recommended Operating Conditions For proper operation the device should be used within the recommended conditions. Symbol VB-VS VS VCC ICC ISD/EOL ICS Definition High Side Floating Supply Voltage Steady State High-side Floating Supply Offset V l Supply Voltage VCC Supply Current SD/EOL Pin Current CS Pin Current Min. VBUV+ -1 VCCUV+ †† Max. VCLAMP 600 VCLAMP 10 -1 1 Units V mA VVCO VCO Pin Voltage 0 5 V RFMIN FMIN Pin Programming Resistor 10 300 kΩ TJ Junction Temperature -40 125 ºC †† Enough current should be supplied into the VCC pin to keep the internal 15.6V zener clamp diode on this pin regulated at its voltage, VCLAMP. Recommended Component Values Symbol RFMIN CT Component RFMIN Pin Resistor Value CT Pin Capacitor Value www.irf.com Min. 10 Max. --- 330 --- Units kΩ pF © 2009 International Rectifier 6 IRS2158D(S) Electrical Characteristics VCC = VBS = VBIAS=14V +/- 0.25V, CLO = CHO = 1000pF, CT = 1000pF, RFMIN = 15kΩ, VCPH = VVCO = 0V, VSD/EOL = 0V, VCS = 0V, TA=25 °C unless otherwise specified. Symbol Definition Min Typ Max Units Test Conditions 11.5 12.5 13.5 9.5 10.5 11.5 1.0 2.0 3.0 ----- 250 350 500 700 µA --- 3.5 --- mA 14.6 15.6 16.6 V VCC = 8V MODE=FAULT MODE = RUN, VVCO = 5V ICC = 5mA VBS Supply Current --- 1.0 --- mA MODE = RUN UVLO Mode VBS Quiescent Current --- --- 50 µA VBS = 6V 9.0 10.0 11.0 Supply Characteristics VCCUV+ VCCUVVUVHYS IQCCUV IQCCFLT ICC VCLAMP VCC Supply Under-voltage Positive Going Threshold VCC Supply Under-voltage Negative Going Threshold VCC Supply Under-voltage Lockout Hysteresis UVLO Mode VCC Quiescent Current FAULT Mode VCC Quiescent Current VCC Supply Current VCC Zener Clamp Voltage VCC rising from 0V VCC falling from 14V V Floating Supply Characteristics IBS IQBSUV VBSUV+ VBSUVILKVS VBS Supply Under-voltage Positive Going Threshold VBS Supply Under-voltage Negative Going Threshold VBS rising from 0V V VS Offset Supply Leakage Current 8.0 9.0 10.0 --- --- 50 Ballast Control Preheat, Ignition and Run Mode Characteristics CPH Pin End Of Preheat Rising VCPHEOP+ 8.8 9.3 Threshold Voltage CPH Pin Start Of Ignition Falling VCPHSOI4.4 4.7 Threshold Voltage µA VBS falling from 14V VB = VS = 650V, VCC = 8V 9.8 5.0 VVCOPH VCO Pin Preheat Mode Voltage --- 0 --- VVCOIGN VCO Pin Ignition Mode Voltage --- 0.65 --- IVCOIGN VCO Pin Ignition Regulation Discharge Current --- 215 --- VCPHRUN+ CPH Pin Run Mode Rising Threshold Voltage 8.8 9.3 9.8 VVCORUN VCO Pin Run Mode Voltage --- V MODE = PREHEAT µA MODE = IGNITION, VCS = 1.5V, RPH = 22.1kΩ MODE = IGNITION, VVCO = VVCOIGN, VCS = 1.5V MODE = IGNITION V www.irf.com OPEN --- MODE = RUN © 2009 International Rectifier 7 IRS2158D(S) Electrical Characteristics (cont’d) VCC = VBS = VBIAS=14V +/- 0.25V, CLO = CHO = 1000pF, CT = 1000pF, RFMIN = 15kΩ, VCPH = VVCO = 0V, VSD/EOL = 0V, VCS = 0V, TA= °C unless otherwise specified. Ballast Control Protection Circuitry Characteristics VCSTH+ CS Pin Over-current Sense Threshold CS and EOL Fault Counter No. of nEVENTS Events SD Pin Rising Non-latched Shutdown VSDTH+ Threshold Voltage SD Pin Falling Reset Threshold VSDTHVoltage VEOLBIAS EOL Pin Internal Bias Voltage EOL Pin Rising Latched Shutdown VEOLTH+ Threshold Voltage EOL Pin Falling Latched Shutdown VEOLTHThreshold Voltage 1 1.2 1.4 V --- 60 --- Events 4.5 5.0 5.5 2.7 3.0 3.3 1.8 2.0 2.2 2.7 3.0 3.3 0.9 1.0 1.1 VDC+ VDC Pin Enable 4.5 5.0 5.5 VDC- VDC Pin Disable 2.7 3.0 3.4 EOL Pin OTA Output Sourcing Current --- 10 --- IEOLSINK EOL Pin OTA Output Sinking Current --- -10 --- VCPHFLT CPH Pin Fault Mode Voltage VVCOFLT VCO Pin Fault Mode Voltage --- 0 VFMINFLT FMIN Pin Fault Mode Voltage 42.5 IEOLSOURCE Ballast Control Oscillator Characteristics fRUN Half-bridge Oscillator Run Frequency Half-bridge Oscillator Preheat fPH Frequency MODE = RUN MODE = RUN ALL MODES μA MODE = PREHEAT VEOL = 1.5V MODE = PREHEAT VEOL = 2.5V --- V MODE = FAULT 45.5 48.5 kHz 63 68 73 kHz VCT+ Upper CT Ramp Voltage Threshold --- 5.0 --- VCT- L CT Ramp Voltage Threshold --- 2.0 --- d Oscillator duty cycle --- 50 --- tdLO LO Output Deadtime --- 1.5 --- tdHO HO Output Deadtime --- 1.5 --- VFMIN FMIN Pin Voltage 4.6 5.0 5.4 www.irf.com V MODE = PREHEAT or RUN V % MODE = RUN RPH = 22.1kΩ, MODE = PREHEAT MODE = RUN MODE = RUN MODE = RUN, tdLO and tdHO removed μs V VCC = 14.0V © 2009 International Rectifier 8 IRS2158D(S) Electrical Characteristics (cont’d) VCC = VBS = VBIAS=14V +/- 0.25V, CLO = CHO = 1000pF, CT = 1000pF, RFMIN = 15kΩ, VCPH = VVCO = 0V, VSD/EOL = 0V, VCS = 0V, TA=25 °C unless otherwise specified. Gate Driver Output Characteristics (HO, LO) VOL Low-Level Output Voltage VOH High-Level Output Voltage --- 0 100 --- 0 100 Turn-On Rise Time --- 120 180 Turn-Off Fall Time --- 50 100 I0+ Source Current --- 180 --- I0- Sink Current --- 260 --- tr tf mV IO = 0 VBIAS - VO , IO = 0 ns CHO=CLO= 1nF mA Bootstrap FET Characteristics VBON VB when the bootstrap FET is on 13.7 14.0 --- V IBCAP VB source current when FET is on 30 55 --- mA IB10V VB source current when FET is on 8 12 --- ---10 ----0 --0 12 14 --- 0.1 10 ----11.5 µA mV --- 2.0 --- MHz --- 110 --- dB VB = COM VB=10V Op Amp Characteristics Iib Vio IOUT+ IOUTVic NINV and INV pin Input bias current Input Offset Voltage OUT pin Sink Output Current OUT pin Source Output Current Common Mode Input Range Unity Gain BW Operational Amplifier Band Width GDC DC Open Loop Gain www.irf.com mA INV=7V, NINV=0V INV=7V, NINV=14V V Guaranteed By Design © 2009 International Rectifier 9 IRS2158D(S) Functional Block Diagram www.irf.com © 2009 International Rectifier 10 IRS2158D(S) Input/Output Pin Equivalent Circuit Diagrams VB ESD Diode 25V HO VCC ESD Diode ESD Diode VS CT 600V ESD Diode VCC RDT RESD ESD Diode COM LO, OUT 25V ESD Diode COM VCC VCC VDC, NINV, INV, SD/EOL. CS ESD Diode ESD Diode CPH RESD ESD Diode ESD Diode RDT RESD COM COM VCC VCC ESD Diode ESD Diode VCO FMIN ESD Diode RIGNREG RESD ESD Diode COM COM www.irf.com © 2009 International Rectifier 11 IRS2158D(S) Lead Definitions Pin# 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Symbol CPH FMIN VCO CT VDC OUT NINV INV SD/EOL CS LO COM VCC VB VS HO Description Preheat Timing Input Oscillator Minimum Frequency Setting Voltage Controlled Oscillator / Ignition Ramp Input Oscillator timing capacitor input DC Bus monitoring / Brownout protection Dimming OpAmp Output Non-inverting pin of Dimming OpAmp Inverting pin of Dimming OpAmp Shut-Down / End of Life Sensing Input Half-Bridge Current Sensing Input Low-Side Gate Driver Output IC Power & Signal Ground Logic & Low-Side Gate Driver Supply High-Side Gate Driver Floating Supply High Voltage Floating Return High-Side Gate Driver Output Lead Assignments CPH FMIN 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 VS VCO CT VDC HO VB VCC COM OUT LO NINV CS INV SD/EOL www.irf.com © 2009 International Rectifier 12 IRS2158D(S) State Diagram Power Turned On UVLO Mode SD/EOL > 5.0V (VSDTH+) (Lamp Removal) or VCC < 10.5V (VCCUV-) (Power Turned Off) FAULT Mode 1 /2-Bridge Off IQCCUV ~ 250uA CPH = 0V VCO = 0V (Oscillator Off) VCC > 12.5V (VCCUV+) and VDC+ > 5.0V and SD/EOL<3.0V (VSDTH-) VCC < 10.5V (VCCUV-) (VCC Fault or Power Down) or VDC- < 3.0V PREHEAT Mode Fault Latch Set 1 /2-Bridge Off IQCCFLT ~ 350uA CPH = 0V VCO = 0V (Oscillator Off) VFMIN = 0V 1 CS > 1.2V for 60 events /2-Bridge oscillating@ fPH VCO = 0V RPH // RFMIN CPH Charging through RCPH CS Fault Counter Enabled SD/EOL>5.0V (VSDTH+) CPH > (2/3)*VCC (End of PREHEAT Mode) CPH discharged CPH < (1/3)*VCC (Start of IGNITION Mode) CS Regulation VCO discharged slightly with current sink CS<1.2V IGNITION Mode CS>1.2V CPH charging through RCPH VCO charging through RPH CS Shutdown Disabled EOL Shutdown Disabled Regulated ignition frequency CPH > (1/2)*VCC (End of IGNITION Mode) PRE-RUN Mode CS > 1.2V (VCSTH+) CS > 1.2V (VCSTH+) for 60 events or SD/EOL < 1.0V (VEOLTH-) CPH charging through RCPH VCO charging through RPH frequency ramps to Rf UN CS One Fault Enabled EOL Shutdown Disabled CPH > (2/3)*VCC (End of PRE-RUN Mode) For 60 LO Cycles or SD/EOL > 3.0V (VEOLTH+) For 60 LO Cycles RUN Mode SD/EOL>5.0V (VSDTH+) VCO = 5V 1/2-Bridge Oscillating@fRUN CS Fault Counter Enabled EOL Thresholds Enabled www.irf.com © 2009 International Rectifier 13 IRS2158D(S) Timing Diagram Ballast Section VCC 15.6V UVLO+ UVLO- CPH (2/3)*VCC (1/2)*VCC (1/3)*VCC 5V VCO tRAMP =RPH*CVCO f run (RFMIN) f ph (RFMIN//RPH) FREQ SD HO, LO CS 1.2V PH FAULT IGN HO SD > 5V UVLO PH IGN HO HO LO LO PRE RUN RUN UVLO DT LO 1.2V CS CS 5V CT 2V CS 5V 5V CT CT 2V 2V www.irf.com © 2009 International Rectifier 14 IRS2158D(S) 300 6 330pF 5 680pF 1nF 200 VCT+ 4 1.5nF VCT+,-(V) FREQ(kHz 250 150 100 50 3 2 VCT- 1 0 0 0 20 40 60 RFMIN(KΩ ) 80 11 100 13 14 15 VCC(V) FREQ vs RFMIN vs CT (IRS2158D) VCT+,- vs VCC (IRS2158D) RFMIN=15KΩ , CT=1nF Graph 1. Run Frequency vs RFMIN and CT Graph 2. CT voltage thresholds vs VCC 16 140 14 120 12 330pF 100 680pF 80 ICC(mA) FREQ(kHz) 12 1nF 60 1.5nF 10 8 6 40 4 20 2 0 0 11 12 13 VCC(V) 14 0 15 100 150 200 250 300 FREQ(kHz) ICC vs FREQ (IRS2158D) RFMIN=15KΩ, CT=330pF FREQ vs VCC vs CT RFMIN=15KΩ (IRS2158D) Graph 3. Run Frequency vs VCC and CT 50 Graph 4. ICC vs Frequency www.irf.com © 2009 International Rectifier 15 2.5 2.5 2 2 TDLO(uS) TDHO(uS) IRS2158D(S) 1.5 1 1.5 1 0.5 0.5 0 0.300 0.600 0.900 CT(nF) 1.200 0 0.300 1.500 2.0 2 TDLO(uS) 2.5 1.5 1.0 1.5 1 0.5 0.5 330pF 1nF 12 680pF 1.5nF 13 VCC(V) 14 330pF 1nF 0 11 15 12 680pF 1.5nF 13 14 15 VCC(V) TDLO vs VCC vs CT(IRS2158D) RFMIN=15KΩ TDHO vs VCC vs CT(IRS2158D) RFMIN=15KΩ Graph 7. Dead Time TDHO vs VCC 1.500 Graph 6. Dead Time TDLO vs CT 2.5 11 1.200 TDLO vs CT(IRS2158D) VCC=14V, RFMIN=15KΩ Graph 5. Dead Time TDHO vs CT 0.0 0.900 CT(nF) TDHO vs CT(IRS2158D) VCC=14V, RFMIN=15KΩ TDHO(uS) 0.600 Graph 8. Dead Time TDLO vs VCC www.irf.com © 2009 International Rectifier 16 IRS2158D(S) 5.100 20 5.075 18 16 14 5.025 IQCC(mA) VFMIN(V) 5.050 5.000 4.975 12 10 8 6 4.950 4 4.925 2 4.900 11 12 13 14 0 15 0 VCC(V) 5 10 15 20 VCC(V) VFMIN vs VCC(IRS2158D) VCC=14V, RFMIN=15KΩ IQCC vs VCC (IRS2158D) Graph 9. VFMIN vs VCC Graph 10. IQCC vs VCC 5.000 Vio(mV) 4.000 3.000 2.000 1.000 0.000 11 12 13 14 15 VCC(V) Vio vs VCC(IRS2158D) Graph 11. Vio vs VCC www.irf.com © 2009 International Rectifier 17 IRS2158D(S) Application Information and Additional Details Information regarding the following topics is included as subsections within this section of the datasheet: • • • • • • • • • • • Under-Voltage Lock-Out (UVLO) Mode and IC Supply Circuitry Preheat Mode (PH) Ignition Mode (IGN) Pre-Run Mode Run Mode (RUN) Dimming SD/EOL and CS Fault Mode Brown-out protection Component Selection Vcc double filter PCB Layout Guidelines Under-voltage Lock-Out Mode (UVLO) Mode and IC Supply Circuitry The under-voltage lock-out mode (UVLO) is defined as the state the IC is in when VCC is below the turn-on threshold of the IC. To identify the different modes of the IC, refer to the State Diagram shown on page 14 of this document. The IRS2158D undervoltage lock-out is designed to maintain an ultra low supply current of less than 500 μA, and to guarantee the IC is fully functional before the high- and low-side output drivers are activated. Figure 1 shows an efficient supply voltage using the micro-power start-up current of the IRS2158D together with a snubber charge pump from the half-bridge output (RVCC, CVCC1, CVCC2, CSNUB, DCP1 and DCP2). VRECT (+) VBUS (+) RVCC 16 15 BSFET BSFET CONTROL 14 13 12 11 10 IRS2158D RHO HO MHS VS To Load VB CBS R2 VCC C SNUB C VCC2 R1 DCP2 C VCC1 COM LO RLO CS R3 CCS MLS DCP1 RCS IC COM Load Return VBUS(-) Figure 1: Start-up and supply circuitry. The VCC capacitors (CVCC1 and CVCC2) are charged by the current through supply resistor (RVCC) minus the start-up current drawn by the IC. This resistor is chosen to set the desired AC line input voltage turn-on threshold for the ballast. When the voltage at VCC exceeds the IC start-up threshold (VCCUV+) and the VDC pin is above 5 V and the SD pin is below 3 V, the IC turns on and LO begins to oscillate. The capacitors at VCC begin to discharge due to the increase in IC operating current (Figure 2). The high-side supply voltage, VB-VS, begins to increase as capacitor CBS is charged through the internal bootstrap MOSFET during the LO on-time of each LO switching cycle. When the VB-VS voltage exceeds the high-side start-up threshold (VBSUV+), HO then begins to oscillate. This may take several cycles of LO to charge VBVS above VBSUV+ due to RDSon of the internal bootstrap MOSFET. www.irf.com © 2009 International Rectifier 18 IRS2158D(S) VC1 CVCC DISCHARGE INTERNAL VCC ZENER CLAMP VOLTAGE VUVLO+ VHYST VUVLO- DISCHARGE TIME CHARGE PUMP OUTPUT RVCC & CVCC1,2 TIME CONSTANT t Figure 2: VCC supply voltage. When LO and HO are both oscillating, the external MOSFETs (MHS and MLS) are turned on and off with a 50% duty cycle and a non-overlapping deadtime of 1.5 μs. The half-bridge output (pin VS) begins to switch between the DC bus voltage and COM. During the deadtime between the turn-off of LO and the turn-on of HO, the half-bridge output voltage transitions from COM to the DC bus voltage at a dv/dt rate determined by the snubber capacitor (CSNUB). As the snubber capacitor charges, current will flow through the charge pump diode (DCP2) to VCC. After several switching cycles of the half-bridge output, the charge pump and the internal 15.6 V zener clamp of the IC take over as the supply voltage. Capacitor CVCC2 supplies the IC current during the VCC discharge time and should be large enough such that VCC does not decrease below VCCUV- before the charge pump takes over. Capacitor CVCC1 is required for noise filtering and must be placed as close as possible and directly between VCC and COM, and should not be lower than 0.1uF. Additional resistors are recommended for limiting high currents that can flow to VCC from the charge pump during hard-switching of the half-bridge or during lamp ignition. In the application circuit shown above, DCP2 is a 17 V zener diode, which serves to limit the voltage transients that are supplied to VCC through the charge pump, under these conditions. The IC may not operate correctly if steps are not taken to prevent overdriving VCC through the charge pump. The internal bootstrap MOSFET and supply capacitor (CBS) comprise the supply voltage for the high side driver circuitry. During UVLO mode, the high- and low-side driver outputs HO and LO are both low, the internal oscillator is disabled, and pin CPH is connected internally to COM for resetting the preheat time. Preheat Mode (PH) The IRS2158D enters preheat mode when VCC exceeds the UVLO positive-going threshold (VCCUV+) and the VDC pin voltage is above the 5 V threshold. The internal MOSFET that connects pin CPH to COM is turned off and an external resistor (Figure 3) begins to charge the external preheat timing capacitor (CPH). LO and HO begin to oscillate at a higher soft-start frequency and ramp down quickly to the preheat frequency. The VCO pin is connected to COM through an internal www.irf.com © 2009 International Rectifier 19 IRS2158D(S) VBUS (+) VCC R CPH C PH C VCO CPH VCO HO 4 MHS 16 MODE 3 HalfBridge Driver M1 15 HalfBridge Output VS ILOAD R PH FMIN 5 OSC. R FMIN 11 10 IRS2158D LO MLS CS R 3 C CS 12 R CS COM Load Return VBUS (-) Figure 3: Preheat circuitry. MOSFET so the preheat frequency is determined by the equivalent resistance at the FMIN pin formed by the parallel combination of resistors RMIN and RPH. The frequency remains at the preheat frequency until the voltage on pin CPH exceeds 2/3*VCC (VCPHEOP) and the IC enters Ignition Mode. During preheat mode, the over-current protection on pin CS (VCSTH+) and the 60-cycle consecutive over-current fault counter (nEVENTS) are both enabled. Ignition Mode (IGN) The IRS2158D ignition mode is defined by the second time CPH charges from 1/3*VCC (VCPHSOI-) to 1/2*VCC (VCHPRUN). When the voltage on pin CPH exceeds 2/3*VCC (VCPHEOP) for the first time, pin CPH is discharged quickly through an internal MOSFET down to 1/3*VCC (VCPHSOI-) (see Figures 4 and 5). The internal MOSFET turns off and the voltage on pin CPH begins to increase again. The internal MOSFET at pin VCO turns off and resistor RPH is disconnected from COM. The equivalent resistance at the FMIN pin increases from the parallel combination (RPH//RMIN) to RMIN at a rate programmed by the external capacitor at pin VCO (CVCO) and resistor RPH. This causes the operating frequency to ramp down smoothly from the preheat frequency through the ignition frequency to the final run frequency. During this ignition ramp, the frequency sweeps towards the resonance frequency of the lamp output stage to ignite the lamp. VCPH 2/3*VCC 1/2*VCC 1/3*VCC tPH = RCPH * CPH t VVCO 5V tRAMP = RPH * CVCO PREHEAT IGN PRERUN RUN t Figure 4: CPH and VCO timing diagram. www.irf.com © 2009 International Rectifier 20 IRS2158D(S) VBUS (+) VCC R CPH C PH C VCO CPH VCO HO 3 HalfBridge Driver M1 4 MHS 16 MODE 15 HalfBridge Output VS I LOA R PH FMIN R FMIN D 5 OSC. 11 1.2K LO MLS M2 + - 10 CS R 3 1.2V C CS IRS2158D 12 CO M R CS Load Return VBUS (-) Figure 5: Ignition circuitry. The over-current threshold on pin CS (VCSTH+) will protect the ballast against a non-strike or open-filament lamp fault condition. The voltage on pin CS is defined by the lower half-bridge MOSFET current flowing through the external current sensing resistor RCS. This resistor programs the maximum peak ignition current (and therefore peak ignition voltage) of the ballast output stage. Should this voltage exceed the internal VCSTH+ threshold of 1.2 V, the ignition regulation circuit discharges the VCO voltage slightly to increase the frequency slightly (see Figure 6). This cycle-by-cycle feedback from the CS pin to the VCO pin will adjust the frequency each cycle to limit the amplitude of the current for the entire duration of ignition mode. HO LO VS t VCS 1.2V t VVCO 5V t Figure 6: Ignition regulation timing diagram. The IRS2158D remains in IGNITION mode until the voltage at CPH reaches 1/2*VCC at which point it will switch into PRE-RUN mode. Pre-Run Mode In PRE-RUN mode the fault counter is disables so that the IRS2158D will enter FAULT mode if a single event occurs where VCS>1.2 V (VCSTH+). This allows the ballast to shut down if the resonant inductor saturates during ignition. www.irf.com © 2009 International Rectifier 21 IRS2158D(S) When CPH exceeds 2/3*VCC (VCPHRUN+) for the second time, the IC enters run mode and the fault counter becomes enabled. The ignition regulation is not active in run mode but the IC will enter fault mode after 60 consecutive over-current faults and gate driver outputs HO and LO will be latched low. Run Mode (RUN) Once VCPH has exceeded 2/3*VCC for the second time (VCPHRUN), the IC enters run mode. CPH continues to charge up to VCC. The operating frequency is at the minimum frequency (after the ignition ramp) and is programmed by the external resistor (RMIN) at the FMIN pin. Should hard-switching occur at the half-bridge at any time (open-filament, lamp removal, etc.), the voltage across the current sensing resistor (RCS) will exceed the internal VCSTH+ threshold of 1.2 V and the fault counter will begin counting (see Figure 5). Should the number of consecutive over-current faults exceed 60 (nEVENTS), the IC will enter fault mode and the HO and LO gate driver outputs will be latched low. During run mode, the end-of-life (EOL) window comparator and the DC bus under-voltage reset are both enabled. Dimming The application diagram shows how the operational amplifier can be configured with the ballast control pins of the IRS2158 to realize a dimming ballast system, which regulates the lamp arc current. The opamp in this IC is left uncommitted, so that the designer can utilize it in whatever way they require for the particular application, for example it could be used to create a non-dimming ballast with regulated lamp power or a more sophisticated end of lamp life detection circuit. In this example the lamp arc current is compared with a DC control voltage to produce an error voltage that steers the frequency by sinking current from the FMIN pin. SD/EOL and CS Fault Mode Should the voltage at the SD/EOL pin exceed 3 V or decrease below 1V (VEOLTH-) during run mode, an end-of-life (EOL) fault condition has occurred. The end of life fault must remain for approximately 60 cycles of LO before the IC enters fault mode. This is to prevent possible false tripping of the end of life shutdown circuit caused by surges or transients at the AC line input. LO and HO gate driver outputs are all latched off in the ‘low’ state. CPH is discharged to COM for resetting the preheat time and VCO is discharged to COM for resetting the frequency. To exit fault mode, VCC can be decreased below VCCUV- (ballast power off) or the SD pin can be increased above 5 V (VSDTH+) (lamp removal). Either of these will force the IC to enter UVLO mode (see State Diagram, page 13). Once VCC is above VCCUV+ (ballast power on) and SD is pulled above 5 V (VSDTH+) and back below 3 V (VSDTH-) (lamp re-insertion), the IC will enter preheat mode and begin oscillating again. The current sense function will force the IC to enter fault mode only after the voltage at the CS pin has been greater than 1.2 V (VCSTH+) for 60 (nEVENTS) consecutive cycles of LO. The voltage at the CS pin is AND-ed with LO (see Figure 7) so it will work with pulses that occur during the LO on-time or DC. If the over-current faults are not consecutive, then the internal fault counter will count down each cycle when there is no fault. Should an over-current fault occur only for a few cycles and then not occur again, the counter will eventually reset to zero. The over-current fault counter is enabled during preheat and run modes and disabled during ignition mode. www.irf.com © 2009 International Rectifier 22 IRS2158D(S) 60 Cycles LO CS 1.2V Run or Preheat Mode Fault Mode Figure 7: Fault counter timing diagram. Brown-out protection The DC pin senses the voltage on the DC bus by means of an external resistor divider and an internal comparator with hysterisis. When power is first supplied to the IC at system startup, 3 conditions are required before oscillation is initiated: 1.) the voltage on the VCC pin must exceed the rising undervoltage lockout threshold (VCCUV+), 2.) the voltage at the VDC pin must exceed VDC+, 3.) the voltage at the SD/EOL pin must be below 3 V. If a low DC bus condition occurs during normal operation, or if power to the ballast is shut off, the DC bus will collapse prior to the VCC of the chip (assuming the VCC is derived from a charge pump off of the output of the half-bridge). In this case, the voltage on the VDC pin will drop below the VDCthreshold and shut the oscillator off, thereby protecting the power transistors from potentially hazardous hard switching. Approximately 2 V of hysterisis has been designed into the internal comparator sensing the VDC pin, in order to account for variations in the DC bus voltage under varying load conditions. When the DC bus recovers, the chip restarts from the beginning of the control sequence, as shown in timing diagram Figure 8 below. VDC 5 3 5 CT 15 CPH 15 LO 15 HO-VS RUN mode Low VDC Restart Figure 8: VDC pin fault and auto restart www.irf.com © 2009 International Rectifier 23 IRS2158D(S) Ballast Design Equations Note: The results from the following design equations can differ slightly from actual measurements due to IC tolerances, component tolerances, and oscillator over- and under-shoot due to internal comparator response time. Step 1: Program Deadtime The deadtime is programmed with the timing resistor RDT at the DT pin. The deadtime is given by: tDT = 1500 ⋅ CT CT = tDT 1500 [Seconds] (1) [Farads] (2) Step 2: Program Run Frequency The run frequency is programmed with the timing resistor RMIN at the FMIN pin. The run frequency is given as: f OSCRUN = 1 ⎛3 ⎞ 2.15 ⋅ CT ⋅ ⎜ ⋅ RMIN + 1500 ⎟ 5 ⎝ ⎠ [Hz] (3) ⎞ 5 ⎛ 1 RMIN = ⋅ ⎜⎜ − 1500 ⎟⎟ 3 ⎝ (2.15 ⋅ f OSCRUN ⋅ CT ) ⎠ [Ohms] (4) Step 3: Program Preheat Frequency The preheat frequency is programmed with timing resistors RMIN and RPH. The timing resistors are connected in parallel for the duration of the preheat time. The preheat frequency is therefore given as: f OSCPH = [Hertz] 1 ⎛ 3 (R ⋅ R ) ⎞ 2.15 ⋅ CT ⋅ ⎜⎜ ⋅ MIN PH + 1500 ⎟⎟ ⎝ 5 (RMIN + RPH ) ⎠ (5) Step 4: Program Preheat Time The preheat time is defined by the time it takes for the external capacitor on pin CPH to charge up to 2/3*VCC. An external resistor (RCPH) connected to VCC charges capacitor CPH. The preheat time is therefore given as: t PH = RCPH ⋅ C PH [Seconds] (6) or www.irf.com © 2009 International Rectifier 24 IRS2158D(S) C PH = t PH RCPH [Farads] (7) Step 5: Program Ignition Ramp Time The preheat time is defined by the time it takes for the external capacitor on pin VCO to charge up to 5V. The external timing resistor (RPH) connected to FMIN charges capacitor CVCO. The ignition ramp time is therefore given as: t RAMP = RPH ⋅ CVCO [Seconds] (8) or CVCO = t RAMP RPH [Farads] (9) Step 6: Program Maximum Ignition Current The maximum ignition current is programmed with the external resistor RCS and an internal threshold of 1.2V. This threshold determines the over-current limit of the ballast, which will be reached when the frequency ramps down towards resonance during ignition and the lamp does not ignite. The maximum ignition current is given as: I IGN = 1.2 RCS RCS = 1.2 I IGN [Amps Peak] (10) or [Ohms] (11) VCC Double Filter It is recommended to utilize a double filter arrangement from the charge pump (CSNUB, DCP1 and DCP2) to VCC as shown in the schematic of Figure 9. This circuit is designed to protect the VCC supply pin of the IRS2158D from high peak currents that occur when the MOSFET MHS switches VS from COM to VBUS. DCP2 should be an 18 V rated zener diode and RSUPPLY should connect to the cathode of DCP2. This is to protect the VCC input of the IRS2158D from possible surges and transient voltages. Figure 9: VCC Double Filter Arrangement www.irf.com © 2009 International Rectifier 25 IRS2158D(S) PCB Layout Considerations In order to successfully utilize the IRS2158D in a ballast design, it is necessary to follow the following PCB layout guidelines. This can avoid possible interference and ground loop issues that can occur in the ballast circuit. These connection techniques also prevent high current ground loops from interfering with sensitive timing component operation and allow the entire control circuit to reject common-mode noise due to output switching. Figure 10 and Figure 11 show the control section of typical ballast designed around the IRS2158D, where the IC is located in the center. In this design all SMD devices are mounted under the PCB with discrete devices on top. SENSITIVE TIMING COMPONENTS CHARGE PUMP WITH FIRST FILTER RESISTOR IRS2158D VCC DECOUPLING CAPACITOR HALF BRIDGE CURRENT SENSE RESISTOR LAMP CURRENT SENSE RESISTOR SIGNAL AND POWER GROUNDS JOIN HERE SIGNAL GROUND STAR POINT AT IC COM SECOND FILTER RESISTOR AND CVCC Figure 10: Critical traces on the bottom side of the PCB Figure 11: Critical traces on the top side of the PCB 1) The signal ground (pin 12) should only be connected to the power ground at one single point to prevent ground loops from forming. 2) The point described in (1) should be where the grounds of the current sense resistors for both the half bridge MOSFETs and the lamp current feedback both meet. 3) The VCC decoupling capacitor should be placed as close to the IRS2158D VCC (pin 13) and COM (pin 12) as possible with the shortest possible traces. 4) The devices; CPH, RMIN, CVCO, CT and CCS should all be located as close to the IRS2158D as possible with traces to the relevant pins being as short as possible. 5) The ground connections from the devices listed in (4) should be connected back to the COM pin of the IRS2158D through the shortest possible traces. These should be connected back to the COM pin of the IC without joining the power ground trace at any point. In the example shown above the power ground trace runs along the lower side of the board on the bottom Copper layer 6) The charge pump diode connection to ground should be made to the power ground not the signal ground. 7) The power factor correction section (if used) should be kept apart from the ballast control as shown in the example above. the power factor correction section is at the left side of the PCB. www.irf.com © 2009 International Rectifier 26 IRS2158D(S) Package Details: PDIP16 and SOIC16N www.irf.com © 2009 International Rectifier 27 IRS2158D(S) Package Details: SOIC16N, Tape and Reel LOADED TAPE FEED DIRECTION A B H D F C NOTE : CONTROLLING DIM ENSION IN M M E G CARRIER TAPE DIMENSION FOR Metric Code Min Max A 7.90 8.10 B 3.90 4.10 C 15.70 16.30 D 7.40 7.60 E 6.40 6.60 F 10.20 10.40 G 1.50 n/a H 1.50 1.60 16SOICN Imperial Min Max 0.311 0.318 0.153 0.161 0.618 0.641 0.291 0.299 0.252 0.260 0.402 0.409 0.059 n/a 0.059 0.062 F D C B A E G H REEL DIMENSIONS FOR 16SOICN Metric Imperial Code Min Max Min Max A 329.60 330.25 12.976 13.001 B 20.95 21.45 0.824 0.844 C 12.80 13.20 0.503 0.519 D 1.95 2.45 0.767 0.096 E 98.00 102.00 3.858 4.015 F n/a 22.40 n/a 0.881 G 18.50 21.10 0.728 0.830 H 16.40 18.40 0.645 0.724 www.irf.com © 2009 International Rectifier 28 IRS2158D(S) Part Marking Information www.irf.com © 2009 International Rectifier 29 IRS2158D(S) Ordering information Standard Pack Base Part Number Package Type PDIP16 IRS2158D SOIC16N Complete Part Number Form Quantity Tube/Bulk 25 IRS2158DPBF Tube/Bulk 45 IRS2158DSPBF Tape and Reel 2500 IRS2158DSTRPBF The information provided in this document is believed to be accurate and reliable. However, International Rectifier assumes no responsibility for the consequences of the use of this information. International Rectifier assumes no responsibility for any infringement of patents or of other rights of third parties which may result from the use of this information. No license is granted by implication or otherwise under any patent or patent rights of International Rectifier. The specifications mentioned in this document are subject to change without notice. This document supersedes and replaces all information previously supplied. For technical support, please contact IR’s Technical Assistance Center http://www.irf.com/technical-info/ WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105 www.irf.com © 2009 International Rectifier 30