IRF IRFS38N20DTRL

PD - 94358
IRFB38N20D
IRFS38N20D
IRFSL38N20D
SMPS MOSFET
HEXFET® Power MOSFET
Applications
High frequency DC-DC converters
l
Benefits
Low Gate-to-Drain Charge to Reduce
Switching Losses
l Fully Characterized Capacitance Including
Effective COSS to Simplify Design, (See
App. Note AN1001)
l Fully Characterized Avalanche Voltage
and Current
VDSS
200V
RDS(on) max
ID
0.054Ω
44A
l
TO-220AB
IRFB38N20D
D2Pak
IRFS38N20D
TO-262
IRFSL38N20D
Absolute Maximum Ratings
Parameter
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TA = 25°C
PD @TC = 25°C
VGS
dv/dt
TJ
TSTG
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current 
Power Dissipation ‡
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Peak Diode Recovery dv/dt ƒ
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
Mounting torqe, 6-32 or M3 screw†
Max.
Units
44
32
180
3.8
320
2.1
± 30
9.5
-55 to + 175
A
W
W/°C
V
V/ns
°C
300 (1.6mm from case )
10 lbf•in (1.1N•m)
Thermal Resistance
Parameter
RθJC
RθCS
RθJA
RθJA
Notes 
Junction-to-Case
Case-to-Sink, Flat, Greased Surface †
Junction-to-Ambient†
Junction-to-Ambient‡
through ‡
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Typ.
Max.
–––
0.50
–––
–––
0.47
–––
62
40
Units
°C/W
are on page 11
1
12/12/01
IRFB/IRFS/IRFSL38N20D
Static @ TJ = 25°C (unless otherwise specified)
Parameter
Drain-to-Source Breakdown Voltage
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient
RDS(on)
Static Drain-to-Source On-Resistance
VGS(th)
Gate Threshold Voltage
V(BR)DSS
IDSS
Drain-to-Source Leakage Current
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Min.
200
–––
–––
3.0
–––
–––
–––
–––
Typ.
–––
0.22
–––
–––
–––
–––
–––
–––
Max. Units
Conditions
–––
V
VGS = 0V, ID = 250µA
––– V/°C Reference to 25°C, ID = 1mA
0.054
Ω
VGS = 10V, ID = 26A „
5.0
V
VDS = VGS, ID = 250µA
25
VDS = 200V, VGS = 0V
µA
250
VDS = 160V, VGS = 0V, TJ = 150°C
100
VGS = 30V
nA
-100
VGS = -30V
Dynamic @ TJ = 25°C (unless otherwise specified)
gfs
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
Ciss
Coss
Crss
Coss
Coss
Coss eff.
Parameter
Forward Transconductance
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Output Capacitance
Output Capacitance
Effective Output Capacitance
Min.
17
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Typ.
–––
76
22
34
16
95
29
47
2900
450
73
3550
180
380
Max. Units
Conditions
–––
S
VDS = 50V, ID = 26A
110
ID = 26A
34
nC
VDS = 160V
51
VGS = 10V, „
–––
VDD = 100V
–––
ID = 26A
ns
–––
RG = 2.5Ω
–––
VGS = 10V „
–––
VGS = 0V
–––
VDS = 25V
–––
pF
ƒ = 1.0MHz
–––
VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
–––
VGS = 0V, VDS = 160V, ƒ = 1.0MHz
–––
VGS = 0V, VDS = 0V to 160V …
Avalanche Characteristics
Parameter
EAS
IAR
EAR
Single Pulse Avalanche Energy‚†
Avalanche Current
Repetitive Avalanche Energy
Typ.
Max.
Units
–––
–––
–––
460
26
32
mJ
A
mJ
Diode Characteristics
IS
ISM
VSD
trr
Qrr
ton
2
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode) †
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
D
MOSFET symbol
44
––– –––
showing the
A
G
integral reverse
––– ––– 180
S
p-n junction diode.
––– ––– 1.5
V
TJ = 25°C, IS = 26A, VGS = 0V „
––– 160 240
nS
TJ = 25°C, IF = 26A
––– 1.3 2.0
µC di/dt = 100A/µs „
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
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IRFB/IRFS/IRFSL38N20D
1000
100
VGS
15V
12V
10V
8.0V
7.0V
6.0V
5.5V
BOTTOM 5.0V
VGS
15V
12V
10V
8.0V
7.0V
6.0V
5.5V
BOTTOM 5.0V
100
TOP
ID , Drain-to-Source Current (A)
ID , Drain-to-Source Current (A)
TOP
10
1
5.0V
10
5.0V
1
300µs PULSE WIDTH
Tj = 25°C
300µs PULSE WIDTH
Tj = 175°C
0.1
0.1
0.1
1
10
100
0.1
1
VDS , Drain-to-Source Voltage (V)
100
Fig 2. Typical Output Characteristics
Fig 1. Typical Output Characteristics
1000.00
3.5
I D = 44A
3.0
T J = 25°C
T J = 175°C
10.00
VDS = 15V
300µs PULSE WIDTH
1.00
5.0
7.0
9.0
11.0
13.0
VGS, Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
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15.0
(Normalized)
2.5
100.00
R DS(on) , Drain-to-Source On Resistance
ID, Drain-to-Source Current (Α )
10
VDS , Drain-to-Source Voltage (V)
2.0
1.5
1.0
0.5
V GS = 10V
0.0
-60
-40
-20
0
20
40
60
80
TJ , Junction Temperature
100 120 140 160 180
( ° C)
Fig 4. Normalized On-Resistance
Vs. Temperature
3
IRFB/IRFS/IRFSL38N20D
100000
12
VGS = 0V,
f = 1 MHZ
Ciss = Cgs + Cgd, Cds SHORTED
Crss = Cgd
1000
Coss
100
Crss
V DS = 40V
10
VGS, Gate-to-Source Voltage (V)
C, Capacitance(pF)
Ciss
V DS = 160V
V DS = 100V
Coss = Cds + Cgd
10000
ID = 26A
10
7
5
2
0
1
10
100
0
1000
16
32
48
64
80
Q G, Total Gate Charge (nC)
VDS, Drain-to-Source Voltage (V)
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
1000
1000.00
100.00
ID, Drain-to-Source Current (A)
ISD , Reverse Drain Current (A)
OPERATION IN THIS AREA
LIMITED BY R DS(on)
100
TJ = 175°C
10.00
T J = 25°C
1.00
100µsec
10
1msec
1
VGS = 0V
0.10
0.1
0.0
0.5
1.0
1.5
2.0
VSD , Source-toDrain Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
2.5
10msec
Tc = 25°C
Tj = 175°C
Single Pulse
1
10
100
1000
VDS , Drain-toSource Voltage (V)
Fig 8. Maximum Safe Operating Area
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IRFB/IRFS/IRFSL38N20D
50
RD
VDS
VGS
40
D.U.T.
RG
+
ID , Drain Current (A)
-VDD
10V
30
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
20
Fig 10a. Switching Time Test Circuit
VDS
10
90%
0
25
50
75
100
125
TC , Case Temperature
150
175
( ° C)
10%
VGS
Fig 9. Maximum Drain Current Vs.
Case Temperature
td(on)
tr
t d(off)
tf
Fig 10b. Switching Time Waveforms
(Z thJC )
1
D = 0.50
0.1
0.20
Thermal Response
0.10
0.05
0.02
0.01
SINGLE PULSE
(THERMAL RESPONSE)
P DM
0.01
t1
t2
Notes:
1. Duty factor D =
2. Peak T
0.001
0.00001
0.0001
0.001
0.01
t1 / t
2
J = P DM x Z thJC
+T C
0.1
1
t 1, Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRFB/IRFS/IRFSL38N20D
900
1 5V
ID
11A
TOP
19A
D R IV E R
D .U .T
RG
+
V
- DD
IA S
20V
tp
720
A
0 .0 1 Ω
Fig 12a. Unclamped Inductive Test Circuit
V (B R )D SS
tp
EAS , Single Pulse Avalanche Energy (mJ)
L
VDS
BOTTOM
26A
540
360
180
0
25
50
75
100
125
Starting Tj, Junction Temperature
150
175
( ° C)
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
IAS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
QG
10 V
50KΩ
12V
.2µF
.3µF
QGS
QGD
D.U.T.
VG
+
V
- DS
VGS
3mA
Charge
Fig 13a. Basic Gate Charge Waveform
6
IG
ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
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IRFB/IRFS/IRFSL38N20D
Peak Diode Recovery dv/dt Test Circuit
+
D.U.T
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
ƒ
+
‚
-
-
„
+

•
•
•
•
RG
dv/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
Driver Gate Drive
P.W.
Period
D=
+
-
VDD
P.W.
Period
VGS=10V
*
D.U.T. ISD Waveform
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
VDD
Forward Drop
Inductor Curent
Ripple ≤ 5%
ISD
* VGS = 5V for Logic Level Devices
Fig 14. For N-Channel HEXFET® Power MOSFETs
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7
IRFB/IRFS/IRFSL38N20D
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
2 .8 7 (.1 1 3 )
2 .6 2 (.1 0 3 )
1 0 .5 4 (.4 1 5 )
1 0 .2 9 (.4 0 5 )
-B -
3 .7 8 (.1 4 9 )
3 .5 4 (.1 3 9 )
4 .6 9 (.1 8 5 )
4 .2 0 (.1 6 5 )
-A -
1 .3 2 (.0 5 2 )
1 .2 2 (.0 4 8 )
6.4 7 (.2 5 5 )
6.1 0 (.2 4 0 )
4
1 5 .2 4 (.6 0 0 )
1 4 .8 4 (.5 8 4 )
1 .1 5 (.0 4 5 )
M IN
1
2
3
1 4 .0 9 (.5 5 5 )
1 3 .4 7 (.5 3 0 )
4 .0 6 (.1 6 0 )
3 .5 5 (.1 4 0 )
3X
3X
1 .4 0 (.0 5 5 )
1 .1 5 (.0 4 5 )
L E A D A S S IG N M E N T S
1 - GATE
2 - D R A IN
3 - S OU RC E
4 - D R A IN
0 .9 3 (.0 3 7 )
0 .6 9 (.0 2 7 )
0 .3 6 (.0 1 4 )
3X
M
B A M
0 .5 5 (.0 2 2 )
0 .4 6 (.0 1 8 )
2 .9 2 (.1 1 5 )
2 .6 4 (.1 0 4 )
2 .5 4 (.1 0 0)
2X
N O TE S :
1 D IM E N S IO N IN G & T O L E R A N C IN G P E R A N S I Y 1 4 .5 M , 1 9 8 2 .
2 C O N T R O L L IN G D IM E N S IO N : IN C H
3 O U T L IN E C O N F O R M S T O J E D E C O U T L IN E T O -2 2 0 A B .
4 H E A T S IN K & L E A D M E A S U R E M E N T S D O N O T IN C L U D E B U R R S .
TO-220AB Part Marking Information
EXAMPLE:
THIS IS AN IRF1010
LOT CODE 1789
ASSEMBLED ON WW 19, 1997
IN THE ASSEMBLY LINE "C"
INTERNATIONAL
RECTIFIER
LOGO
ASSEMBLY
LOT CODE
8
PART NUMBER
DATE CODE
YEAR 7 = 1997
WEEK 19
LINE C
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IRFB/IRFS/IRFSL38N20D
D2Pak Package Outline
1 0.54 (.4 15)
1 0.29 (.4 05)
1.4 0 (.055 )
M AX.
-A-
1.3 2 (.05 2)
1.2 2 (.04 8)
2
1.7 8 (.07 0)
1.2 7 (.05 0)
1
1 0.16 (.4 00 )
RE F.
-B -
4.69 (.1 85)
4.20 (.1 65)
6.47 (.2 55 )
6.18 (.2 43 )
15 .4 9 (.6 10)
14 .7 3 (.5 80)
3
2.7 9 (.110 )
2.2 9 (.090 )
2.61 (.1 03 )
2.32 (.0 91 )
5 .28 (.20 8)
4 .78 (.18 8)
3X
1.40 (.0 55)
1.14 (.0 45)
3X
5 .08 (.20 0)
0.5 5 (.022 )
0.4 6 (.018 )
0 .93 (.03 7 )
0 .69 (.02 7 )
0 .25 (.01 0 )
M
8.8 9 (.3 50 )
R E F.
1.3 9 (.0 5 5)
1.1 4 (.0 4 5)
B A M
M IN IM U M R E CO M M E ND E D F O O TP R IN T
1 1.43 (.4 50 )
NO TE S:
1 D IM EN S IO N S A FTER SO L D ER D IP.
2 D IM EN S IO N IN G & TO LE RA N C IN G PE R A N S I Y1 4.5M , 198 2.
3 C O N TRO L LIN G D IM EN SIO N : IN C H .
4 H E ATSINK & L EA D D IM EN S IO N S D O N O T IN C LU D E B UR R S.
8.89 (.3 50 )
LE A D A SS IG N M E N TS
1 - G A TE
2 - D R AIN
3 - S O U RC E
17 .78 (.70 0)
3 .8 1 (.15 0)
2 .08 (.08 2)
2X
2.5 4 (.100 )
2X
D2Pak Part Marking Information
THIS IS AN IRF530S WITH
LOT CODE 8024
ASSEMBLED ON WW 02, 2000
IN THE ASSEMBLY LINE "L"
INTERNATIONAL
RECTIFIER
LOGO
ASSEMBLY
LOT CODE
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PART NUMBER
F530S
DATE CODE
YEAR 0 = 2000
WEEK 02
LINE L
9
IRFB/IRFS/IRFSL38N20D
TO-262 Package Outline
TO-262 Part Marking Information
EXAMPLE:
THIS IS AN IRL3103L
LOT CODE 1789
ASSEMBLED ON WW 19, 1997
IN THE ASSEMBLY LINE "C"
INTERNATIONAL
RECTIFIER
LOGO
ASSEMBLY
LOT CODE
10
PART NUMBER
DATE CODE
YEAR 7 = 1997
WEEK 19
LINE C
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IRFB/IRFS/IRFSL38N20D
D2Pak Tape & Reel Information
TR R
1 .6 0 (.0 6 3 )
1 .5 0 (.0 5 9 )
4 .1 0 ( .1 6 1 )
3 .9 0 ( .1 5 3 )
F E E D D IR E C TIO N 1 .8 5 ( .0 7 3 )
1 .6 0 (.0 6 3 )
1 .5 0 (.0 5 9 )
1 1.6 0 (.4 57 )
1 1.4 0 (.4 49 )
1 .6 5 ( .0 6 5 )
0.3 6 8 (.01 4 5 )
0.3 4 2 (.01 3 5 )
1 5 .42 (.60 9 )
1 5 .22 (.60 1 )
2 4 .3 0 (.9 5 7 )
2 3 .9 0 (.9 4 1 )
TRL
1 0.9 0 (.4 2 9)
1 0.7 0 (.4 2 1)
1 .75 (.06 9 )
1 .25 (.04 9 )
4 .7 2 (.1 3 6)
4 .5 2 (.1 7 8)
16 .1 0 (.63 4 )
15 .9 0 (.62 6 )
F E E D D IR E C T IO N
13.50 (.532 )
12.80 (.504 )
2 7.4 0 (1.079 )
2 3.9 0 (.9 41)
4
3 30 .00
( 14.1 73 )
MAX.
Notes:
6 0.0 0 (2.36 2)
M IN .
N O TE S :
1 . CO M F OR M S TO E IA -418 .
2 . CO N TR O L LIN G D IM E N SIO N : M IL LIM E T ER .
3 . DIM E NS IO N M EA S UR E D @ H U B.
4 . IN C LU D ES FL AN G E DIST O R T IO N @ O UT E R E D G E.
 Repetitive rating; pulse width limited by
max. junction temperature.
‚ Starting TJ = 25°C, L = 1.3mH
RG = 25Ω, IAS = 26A.
ƒ ISD ≤ 26A, di/dt ≤ 390A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 175°C.
26 .40 (1 .03 9)
24 .40 (.9 61 )
3
30.4 0 (1.19 7)
M A X.
4
„ Pulse width ≤ 300µs; duty cycle ≤ 2%.
… Coss eff. is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS .
† This is only applied to TO-220AB package.
‡ This is applied to D2Pak, when mounted on 1" square PCB ( FR-4 or G-10 Material ).
For recommended footprint and soldering techniques refer to application note #AN-994.
Data and specifications subject to change without notice.
This product has been designed and qualified for the Automotive [Q101] (IRFB38N20D),
& Industrial (IRFS/SL38N20D) market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.12/01
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11