Datasheet Version 2.0, 13 June 2008 ICE2QS02G Quasi-Resonant PWM Controller Power Management & Supply N e v e r s t o p t h i n k i n g . 13 June 2008 Revision History: No Datasheet Previous Version: Page Subjects (major changes since last revision) For questions on technology, delivery and prices please contact the Infineon Technologies Offices in Germany or the Infineon Technologies Companies and Representatives worldwide: see our webpage at http:// www.infineon.com CoolMOS™, CoolSET™ are trademarks of Infineon Technologies AG. Edition 13 June 2008 Published by Infineon Technologies AG 81726 München, Germany © Infineon Technologies AG 2006. All Rights Reserved. Attention please! The information herein is given to describe certain components and shall not be considered as warranted characteristics. Terms of delivery and rights to technical change reserved. We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and charts stated herein. Infineon Technologies is an approved CECC manufacturer. Information For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office in Germany or our Infineon Technologies Representatives worldwide (see address list). Warnings Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies Office. Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. ICE2QS02G Quasi-Resonant PWM Controller Product Highlights • • • • • • ICE2QS02G Quasi-resonant operation for higher efficiency and better EMI Digital frequency reduction for higher average efficiency Optimized for applications with auxiliary converter Various protection features with Latch Mode and Auto-restart Mode Adjustable blanking time for Over Load Protection and adjustable restart time Pb-free lead plating; RoHS compliant PG-DSO-8 Features Description • • • • ICE2QS02G is a second generation quasi-resonant PWM controller optimized for off-line power supply applications such as LCD TV, audio and printers, where an auxiliary power supply for the IC is provided. The digital frequency reduction with decreasing load enables a quasi-resonant operation till very low load. As a result, the system efficiency is significantly improved compared to a free running quasi resonant converter implemented with maximum switching frequency limitation only. In addition, numerous protection functions have been implemented in the IC to protect the system and customize the IC for the chosen application. All of these make the ICE2QS02G an outstanding product for real quasi-resonant flyback converter in the market. • • • • • • • • • Quasi-resonant operation Load dependent digital frequency reduction Built-in digital soft-start Cycle-by-cycle peak current limitation with built-in leading edge blanking time VCC undervoltage protection Mains undervoltage protection with adjustable hysteresis Foldback Point Correction with digitalized sensing and control circuits Over Load Protection with adjustable blanking time Adjustable restart time after Over Load Protection Adjustable output overvoltage protection with Latch mode Short-winding protection with Latch mode Maximum on time limitation Maximum switching period limitation Typical Application Mains Input Voltage C bus Wp Snubber R VINS1 R ZC2 Ws R ZC1 R VINS2 Lf DO VO Cf CO C ZC Wa Auxiliary Supply R BL BL VINS VCC ZC C PS C BL R b1 Vcc Power Management Zero Crossing Detection GND FB Type ICE2QS02G Version 2.0 GATE Global Protection Block Digital Process Block C FB C DS Gate Driver Current Mode Control control unit R b2 Optocoupler Current Limitation ICE2QS02G CS R CS TL431 R ovs1 R c1 C c1 C c2 R ovs2 Package PG-DSO-8-8 3 13 June 2008 Quasi-Resonant PWM Controller ICE2QS02G Table of Contents Page 1 Pin Configuration and Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5 1.1 Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5 1.2 Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5 1.3 Pin Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5 2 Representative Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6 3 3.1 3.2 3.3 3.3.1 3.3.1.1 3.3.1.2 3.3.1.3 3.3.1.4 3.3.2 3.4 3.4.1 3.5 Functional Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 General . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 Startup Phase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 PWM Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 Digital Frequency Reduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 Up/down counter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 Zero crossing (ZC counter). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 Ring suppression time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 Switch on determination . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 Switch Off Determination . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9 Current Limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9 Foldback Point Correction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9 Protection Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 4 4.1 4.2 4.3 4.3.1 4.3.2 4.3.3 4.3.4 4.3.5 4.3.6 4.3.7 4.3.8 4.3.9 Electrical Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 Operating Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 Supply Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 Internal Voltage Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 PWM Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 Current Limit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 Soft Start. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 Foldback Point Correction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 Digital Zero Crossing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14 Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14 Gate Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15 5 Outline Dimension . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16 Version 2.0 4 13 June 2008 Quasi-Resonant PWM Controller ICE2QS02G Pin Configuration and Functionality 1 Pin Configuration and Functionality 1.1 Pin Configuration the transformer is detected when the ZC voltage falls below VZCCT(100mV). Second, after the MOSFET is turned off, an output overvoltage fault will be assumed if VZC is higher than VZCOVP (4.5V). Finally, during the MOSFET on time, a current depending on the main input voltage flows out of this pin. Information on this current is then used to adjust the maximum current limit. More details on this function are provided in Section 3.4. Pin Symbol Function 1 BL Blanking Time 2 ZC Zero Crossing 3 FB Feedback 4 CS Primary Current Sensing 5 VINS Input Voltage Sensing 6 GATE Gate Driver Output 7 VCC Controller Supply Voltage 8 GND Controller Ground 1.2 Package BL 1 8 GND ZC 2 7 VCC FB 3 6 GATE CS 4 5 VINS Figure 1 1.3 FB (Feedback) Usually, an external capacitor is connected to this pin to smooth the feedback voltage. Internally, this pin is connected to the PWM signal generator for switch-off determination (together with the current sensing signal), and to the digital signal processing for the frequency reduction with decreasing load during normal operation. Additionally, the openloop/overload protection is implemented by monitoring the voltage at this pin. CS (Current Sensing) This pin is connected to the shunt resistor for the primary current sensing, externally, and the PWM signal generator for switch-off determination (together with the feedback voltage), internally. Moreover, shortwinding protection is realised by monitoring the Vcs voltage during on-time of the main power switch. VINS (Input Voltage Sensing) The voltage at this pin is used for Mains Undervoltage Protection. The protection is triggered, once VVINS drops below 1.25V. For a stable operation, a hysteresis operation is ensured using an internal current source (See Section 3.5). When the VVINS exceeds the hysteresis point, the system resumes its operation with a soft-start. Pin configuration PG-DSO-8-8 (top view) Gate(Gate drive output) The GATE pin is the output of the internal driver stage, which has a rise time of 100ns and a fall time of 25ns when driving a 2.2nF capacitive load. Pin Functionality BL (Adjustable Blanking Time) By connecting a capacitor and a resistor in parallel between this pin and the ground, the blanking time for can be fully adjusted, as well as the restart time. This allows the system to face a sudden power surge for a short period of time without triggering the overload protection. Once the protection triggered, the IC will restart using the internal soft-start circuit, after a period of time fixed by the external resistance and capacitor. VCC (Power supply) The VCC pin is the positive supply of the IC and should be connected to an external auxiliary supply. GND (Ground) This is the common ground of the controller. ZC (Zero Crossing) Three functions are incorporated at the ZC pin. First, during MOSFET off time, the full demagnetization of Version 2.0 5 13 June 2008 Figure 2 Version 2.0 Vdd IBL IVINSHys 6 FB VREF RFB 11V 2pF & G5 VREF Internal Bias Level Adjustment C7 C6 C5 Clock Soft start control 12V Undervoltage lockout VFBOLP 25kΩ & G3 1 G2 C4 C3 C2 S G4 R Q VBLH VBLL C1 S G1 R Q VVINSTH Voltage reference VPWM q PWM Comparator 1 G7 1 G6 TPerMax & G10 Counter control GPWM PWM OP C12 S G8 R Q 1 G9 Q tCSSW Leading Edge Blanking time tLEB C10 2pF C11 & G12 VZCCT D2 VCSSW Gate drive VZCRS VZCOVP C8 48ms clock C9 Foldback point correction TOnMax R G11 S Ring suppression tZCOVP ZC counter Comparator Up/down counter 10kΩ Izc Vdd D1 ZC GND CS GATE 2 BL VINS VCC Quasi-Resonant PWM Controller ICE2QS02G Representative Block Diagram Representative Block Diagram Representative block diagram 13 June 2008 Quasi-Resonant PWM Controller ICE2QS02G Funtional Description 3 Funtional Description switch-on and switch-off time points are each determined by the digital circuit and the analog circuit, respectively. As input information for the switch-on determination, the zero-crossing input signal and the value of the up/down counter are needed, while the feedback signal VFB and the current sensing signal VCS are necessary for the switch-off determination. Details about the full operation of the PWM controller in normal operation are illustrated in the following paragraphs. All values which are used in the functional description are typical values. For calculating the worst cases the min/max values which can be found in section 4 Electrical Characteristics have to be considered. 3.1 General ICE2QS02G is a second generation quasi-resonant controller IC developed by Infineon Technologies. Its application is mainly focused on power systems with external standby power control, such as in LCD TV or printer applications. Hence, the required IC VCC voltage for the IC is here drawn from an auxiliary power supply. The digital frequency reduction system implemented in this IC allows highly efficient power converter throughout all the load range. This IC possesses also numerous adjustable protection features, in order to protect the system and customize the IC for the target applications. 3.2 3.3.1 Digital Frequency Reduction As mentioned above, the digital signal processing circuit consists of an up/down counter, a ZC counter and a comparator. These three parts are key to implement digital frequency reduction with decreasing load. In addition, a ringing suppression time controller is implemented to avoid mistriggering by the high frequency oscillation, when the output voltage is very low under conditions such as soft start or output short circuit . Functionality of these parts is described as in the following. 3.3.1.1 Up/down counter The up/down counter stores the number of the zero crossing to be ignored before the main power switch is switched on after demagnetisation of the transformer. This value is fixed according to the feedback voltage, VFB, which contains information about the output power. Indeed, in a typical peak current mode control, a high output power results in a high feedback voltage, and a low output power leads to a low regulation voltage. Hence, according to VFB, the value in the up/ down counter is changed to vary the power MOSFET off-time according to the output power. In the following, the variation of the up/down counter value according to the feedback voltage is explained. The feedback voltage VFB is internally compared with three threshold voltages VFBZL, VFBZR1 and VFBZH, at each clock period of 48ms. The up/down counter counts then upward, keep unchanged or count downward, as shown in Table 1. Startup Phase At the time ton, the IC begins to operate with a softstart.By this soft-start the switching stresses for the switch, diode and transformer are minimised. The softstart implemented in ICE2QS02G is a digital timebased function. The preset soft-start time is 16ms with 4 steps. The internal reference for the feedback voltage begins at 1.8V and with an increment of 0.55V for each following step. During soft start, the Over Load Protection function is disabled. Vsst (V) 4.00 3.45 2.9 Table 1 2.35 1.8 ton 4 8 12 16 vFB up/down counter action Always lower than VFBZL Count upwards till 7 Time(ms) Figure 3 Soft-start control voltage versus time 3.3 PWM Control The PWM controller during normal operation consists of a digital signal processing circuit including an up/ down counter, a zero-crossing counter (ZC counter) and a comparator, and an analog circuit including a current measurement unit and a comparator. The Version 2.0 Operation of the up/down counter Once higher than VFBZL, but always lower than VFBZH Stop counting, no value changing Once higher than VFBZH, but always lower than VFBZR1 Count downwards till 1 Once higher than VFBZR1 7 Set up/down counter to 1 13 June 2008 Quasi-Resonant PWM Controller ICE2QS02G Funtional Description In the ICE2QS02G, the number of zero crossing is limited to 7. Therefore, the counter varies between 1 and 7, and any attempt beyond this range is ignored. When VFB exceeds VFBZR1 voltage, the up/down counter is initialised to 1, in order to allow the system to react rapidly to a sudden load increase. The up/down counter value is also intialised to 1 at the start-up, to ensure an efficient maximum load start up. Figure 4 shows some examples on how up/down counter is changed according to the feedback voltage over time. The use of two different thresholds VRL and VRH to count upward or downward is to prevent frequency jittereing when the feedback voltage is close to the threshold point. However, for a stable operation, these two thresholds must not be affected by the foldback current limitation (see Section 3.4.1), which limits the VCS voltage. Hence, to prevent such situation, the threshold voltages, VFBZL and VFBZH, are changed internally depending on the line voltage levels. clock to 0 every time after the GATE output is changed to high. The voltage vZC is also used for the output overvoltage protection. Once the voltage at this pin is higher than the threshold VZCOVP (4.5V) during off-time of the main switch, the IC is latched off after a fixed blanking time (tZCOVP). To achieve the switch-on at minimum value of drainsource voltage, the voltage from the auxiliary winding is fed to a time delay network (the RC network consists of Rzc1, Rzc2 and Czc as shown in typical application circuit) before it is applied to the zero-crossing detector through the ZC pin. The needed time delay to the main oscillation signal ∆t should be approximately one fourth of the oscillation period (by transformer primary inductor and drain-source capacitor) minus the propagation delay from thedetected zero-crossing to the switch-on of the main switch tdelay, theoretically: T osc ∆t = ------------ – t delay 4 T=48ms [1] This time delay should be matched by adjusting the time constant of the RC network which is calculated as: t VFB R zc1 ⋅ R zc2 τ td = C zc ⋅ --------------------------------R zc1 + R zc2 VFBZR1 [2] VFBZH VFBZL n n+1 n+2 n+2 n+2 n+2 n+1 n n-1 Up/down counter Case 1 4 5 6 6 6 6 5 4 3 1 Case 2 2 3 4 4 4 4 3 2 1 1 Case 3 7 7 7 7 7 7 6 5 4 1 Figure 4 3.3.1.3 Ringing suppression time After MOSFET is turned on, there will be some oscillation on VDS, which will also appear on the voltage on ZC pin. To avoid that the MOSFET is turned on mistriggerred by such oscillations, a ringing suppression timer is implemented. The time is dependent on the voltage vZC. When the voltage vZC is lower than the threshold VZCRS, a longer preset time applies, while a shorter time is set when the voltage vZC is higher than the threshold. t 1 Up/down counter operation 3.3.1.2 Zero crossing (ZC counter) In the system, the voltage from the auxiliary winding is applied to the zero-crossing pin through a RC network, which provides a time delay to the voltage from the auxiliary winding. Internally, this pin is connected to a clamping network, a zero-crossing detector, an output overvoltage detector and a ringing suppression time controller. During on-state of the power switch a negative voltage applies to the ZC pin. Through the internal clamping network, the voltage at the pin is clamped to around 0.2V. The ZC counter has a minimum value of 0 and maximum value of 7. After MOSFET is turned off, every time when the falling voltage ramp of on ZC pin crosses the VZCCT (100mV) threshold, a zero crossing is detected and ZC counter will increase by 1. It is reset Version 2.0 3.3.1.4 Switch on determination After the gate drive goes to low, it can not be changed to high during ring suppression time. After ring suppression time, the gate drive can be turned on when the ZC counter value is higher or equal to up/down counter value. However, it is also possible that the oscillation between primary inductor and drain-source capacitor attenuates very fast and IC can not detect enough zero crossings and ZC counter value will not be high enough to turn on the gate drive. In this case, a maximum switching period (TPerMax) is implemented. After the specified period since last time Gate is turned on, the gate drive will be turned on again regardless of the counter values and VZC. This function can effectively prevent the 8 13 June 2008 Quasi-Resonant PWM Controller ICE2QS02G Funtional Description 3.3.2 Switch Off Determination In the converter system, the primary current is sensed by an external shunt resistor, which is connected between low-side terminal of the main power switch and the common ground. The sensed voltage across the shunt resistor vCS is applied to an internal current measurement unit, and its output voltage V1 is compared with the regulation voltage VFB. Once the voltage V1 exceeds the voltage VFB, the output flip-flop is reset. As a result, the main power switch is switched off. The relationship between the V1 and the vCS is described by: Current Limitation There is a cycle by cycle current limitation realized by the current limit comparator to provide an overcurrent detection. The source current of the MOSFET is sensed via a sense resistor RCS. By means of RCS the source current is transformed to a sense voltage VCS which is fed into the pin CS. If the voltage VCS exceeds an internal voltage limit, adjusted according to the Mains voltage, the comparator immediately turns off the gate drive. To prevent the Current Limitation process from distortions caused by leading edge spikes, a Leading Edge Blanking time (tLEB) is integrated in the current sensing path. A further comparator is implemented to detect dangerous current levels (VCSSW) which could occur if one or more transformer windings are shorted or if the secondary diode is shorted. To avoid an accidental latch off, a spike blanking time of tCSSW is integrated in the output path of the comparator . 3.4.1 Foldback Point Correction When the main bus voltage increases, the switch on time becomes shorter and therefore the operating frequency is also increased. As a result, for a constant primary current limit, the maximum possible output power is increased, which the converter may have not been designed to support. To avoid such a situation, the internal foldback point correction circuit varies the VCS voltage limit according to the bus voltage. This means the VCS will be decreased when the bus voltage increases. To keep a Version 2.0 0.9 0.8 0.7 0.6 80 100 120 140 160 180 200 220 240 260 280 300 320 340 360 380 400 Vin(V) [3] In addition, there is a maximum on time, tOnMax, limitation implemented in the IC. Once the gate drive has been in high state longer than the maximum on time, it will be turned off to prevent the switching frequency from going too low because of long on time. 3.4 1 9 Figure 5 Variation of the VCS limit voltage according to the IZC current According to the typical application circuit, when MOSFET is turned on, a negative voltage proportional to bus voltage will be coupled to auxiliary winding. Inside ICE2QS02G, an internal circuit will clamp the voltage on ZC pin to nearly 0V. As a result, the current flowing out from ZC pin can be calculated as V BUS N a I ZC = -----------------------R ZC1 N P [4] When this current is higher than IZC_1, the amount of current exceeding this threshold is used to generate an offset to decrease the maximum limit on VCS. Since the ideal curve shown in Figure 5 is a nonlinear one, a digital block in ICE2QS02G is implemented to get a better control of maximum output power. Additional advantage to use digital circuit is the production tolerance is smaller compared to analog solutions. The typical maximum limit on VCS versus the ZC current is shown in Figure 6. 1 0.9 Vcs-max(V) V 1 = 3.3 ⋅ V C S + 0.7 constant maximum input power of the converter, the required maximum VCS versus various input bus voltage can be calculated, which is shown in Figure 5. Vcs-max(V) switching frequency from going lower than 20kHz, otherwise which will cause audible noise in most cases. 0.8 0.7 0.6 300 500 700 900 1100 1300 1500 1700 1900 2100 Iz c(uA) Figure 6 VCS-max versus IZC 13 June 2008 Quasi-Resonant PWM Controller ICE2QS02G Funtional Description 3.5 Protection Functions The blanking time for Over Load Protection can be calculated using equation [5]. ICE2QS02G provides various protection functions. The following table summarizes these protection functions. Table 2 V BLH T OLP = – R BL C BL ln 1 – ----------------I BL R BL Protection features VCC Undervoltage Latch off Overload/Openloop Protection Auto restart Main undervoltage Protection Block Gate recover with soft start Output Overvoltage Latch off Short Winding Latch off [5] The restart time for Over Load Protection can be calculated using equation [6]. V BLL T RESTART = – R BL C BL ln ------------ V BLH [6] During the switch off time, the voltage at the zerocrossing pin, ZC, is monitored for output overvoltage detection. If this voltage is higher than the preset threshold VZCOVP, the IC enters latch-off mode. If the voltage at the current sensing pin is higher than the preset threshold VCSSW of 1.68V during the on-time of the power switch, the IC is latched off. This consitutes a short winding protection. Finally, this IC has an adjustable main undervoltage detection system. Given the resistances RVINS1 and RVINS2 connected to the VINS pin, the main turn off voltage is given by equation [7]. During normal operation, the VCC voltage is continuously monitored. In case of a VCC undervoltage, the IC is reset and the main power switch is kept off. The Overload and Open Loop Protection contains an adjustable blanking time and variable restart time. Such an adjustable buffer time is indeed, useful, for applications that usually work in low output power, but require a short duration of high output poweroccasionally. Here, when the regulation voltage, VFB exceeds the threshold voltage of VFBOLP, an internal current source of IBL starts charging the external capacitor CBL. This current source turns off only when the capacitor voltage, VBL reaches VBLH or when VFB decreases below VFBH. Once VBL exceeds VBLH, the overload/openloop protection is triggered by turning off the GATE signal, and pulling high the feedback voltage. From this time, CBL slowly discharges through the external resistance RBL. When VBL drops below VBLL, the IC restarts its operation beginning with soft-start. The charging time and the discharging time of the capacitor CBL, fix respectively the openloop/overload protection blanking time and the restart time of the IC. One example about how this protection works is shown in Figure 7. R VINS1 + R VINS2 V BUSOFF = V VINSTH ⋅ ---------------------------------------R VINS2 [7] For system stability, a hysteresis is implemented in the main undervoltage protection using an internal current source IVINS, so that the main turn on voltage is given by equation [8]. V BUSON = V BUSOFF + I VINSHys ⋅ R VINS1 [8] Everytime IC recovers from a mains undervoltage protection, IC will begin with a soft start. VGATE t VBL 3.9V 0.5V t VFB 4.5V tOLP Figure 7 Version 2.0 trestart tss tOLP trestart tss t Over Load Protection and timers 10 13 June 2008 Quasi-Resonant PWM Controller ICE2QS02G Electrical Characteristics 4 Electrical Characteristics Note: All voltages are measured with respect to ground (Pin 8). The voltage levels are valid if other ratings are not violated. 4.1 Note: Absolute Maximum Ratings Absolute maximum ratings are defined as ratings, which when being exceeded may lead to destruction of the integrated circuit. For the same reason make sure, that any capacitor that will be connected to pin 7 (VCC) is discharged before assembling the application circuit. Parameter Symbol Limit Values min. max. Unit Remarks VCC Supply Voltage VVCC -0.3 27 V VINS Voltage VVINS -0.3 5.0 V BL Voltage VBL -0.3 5.0 V FB Voltage VFB -0.3 5.0 V ZC Voltage VZC -0.3 5.0 V CS Voltage VCS -0.3 5.0 V GATE Voltage VGATE -0.3 10.0 V Junction Temperature Tj -40 125 °C Storage Temperature TS -55 150 °C Thermal Resistance Junction-Ambient RthJA(DSO) - 185 K/W PG-DSO-8 ESD Capability VESD - 2 kV Human body model1) 1) According to EIA/JESD22-A114-B (discharging a 100pF capacitor through a 1.5kΩ series resistor) 4.2 Note: Operating Range Within the operating range the IC operates as described in the functional description. Parameter Symbol Limit Values min. Unit max. VCC Supply Voltage VVCC VVCCUVP 25 V Junction Temperature TjCon -25 °C Version 2.0 11 Remarks 125 13 June 2008 Quasi-Resonant PWM Controller ICE2QS02G Electrical Characteristics 4.3 4.3.1 Note: Characteristics Supply Section The electrical characteristics involve the spread of values guaranteed within the specified supply voltage and junction temperature range TJ from – 25 oC to 125oC. Typical values represent the median values, which are related to 25°C. If not otherwise stated, a supply voltage of VCC = 18 V is assumed. Parameter Symbol Limit Values min. typ. max. Unit Test Condition Start-Up Current IVCCstart - 300 - µA VVCC = 11V Supply Current in normal operation IVCCop - 1.5 - mA Output low IFB = 0 Supply Current during Latch-off mode IVCCLO - 300 - µA IFB = 0 VCC Turn-On Threshold VVCCon 11.3 12.0 12.7 V VCC Turn-Off Threshold VVCCoff - 11.0 - V VCC Turn-On/Off Hysteresis VVCChys 0.6 1 1.4 V 4.3.2 Internal Voltage Reference Parameter Internal Reference Voltage Version 2.0 Symbol VREF Limit Values min. typ. max. 4.90 5.00 5.10 12 Unit Test Condition V Measured at pin FB IFB=0 13 June 2008 Quasi-Resonant PWM Controller ICE2QS02G Electrical Characteristics 4.3.3 PWM Section Parameter Symbol Limit Values min. typ. max. Regulation Pull-Up Resistor RFB 13 20 30 PWM-OP Gain GPWM 3.15 3.3 3.47 Offset for Voltage Ramp VPWM 0.6 0.7 0.85 4.3.4 Unit kΩ V Current Limit Parameter Symbol Limit Values min. typ. max. Unit Peak cuurent limitation in normal operation VCSTH 0.94 1.02 1.10 V Leading Edge Blanking tLEB 180 280 450 ns 4.3.5 Test Condition Soft Start Parameter Symbol Soft-Start time soft-start time step tSS 1) Limit Values min. typ. max. 11.8 16 - tSSS 4 Unit Test Condition ms ms Internal regulation voltage at first step 1) VSS1 - 1.8 - V Internal regulation voltage step at soft start 1) VSSS - 0.55 - V 4.3.6 Test Condition Foldback Point Correction Parameter Symbol Limit Values min. typ. max. Unit Test Condition FBC start point VCS_FBC_S - 1.02 - V IZC=0.5mA CS threshold minimum VCS_FBC_MIN - 0.65 - V IZC=1.8mA Version 2.0 13 13 June 2008 Quasi-Resonant PWM Controller ICE2QS02G Electrical Characteristics 4.3.7 Digital Zero Crossing Parameter Symbol Limit Values Unit min. typ. max. Zero crossing threshold voltage VZCCT 50 100 170 mV Maximum current out from zero crossing pin1) IZCMAX 2.5 - - mA Threshold to set Up/Down Counter to one VFBZR1 3.78 3.9 4 V Threshold for downward counting at low line VFBZHL 3.10 3.2 3.32 V Threshold for upward counting at low line VFBZLL 2.38 2.5 2.62 V Threshold for downward counting at high line VFBZHH 2.55 2.7 2.90 V Threshold for upward counting at highline VFBZLH 2.18 2.3 2.42 V ZC current for IC switches threshold to high line IZCHL - 1.3 - mA ZC current for IC switches threshold to low line IZCLL - 0.8 - mA Counter time1) tCOUNT 1) 48 Test Condition ms The parameter is not subjected to production test - verified by design/characterization 4.3.8 Protection Parameter Symbol Limit Values min. typ. max. Unit Overload or Open Loop Detection threshold for OLP protection at FB pin VFBOLP 4.4 4.5 4.6 V Charging current at BL pin IBL 12 20 28 µA Threshold for adjustable overload blanking time VBLH 3.80 3.9 4.01 V Threshold for adjustable restart time VBLL 0.4 0.5 0.6 V Output Overvoltage Detection threshold at the ZC pin VZCOVP 4.4 4.5 4.6 V Blanking time for output overvoltage protection1) tZCOVP - 100 - µs Threshold for short winding protection VCSSW 1.63 1.68 1.78 V Blanking time for short winding protection tCSSW - 190 - ns Version 2.0 14 Test Condition 13 June 2008 Quasi-Resonant PWM Controller ICE2QS02G Electrical Characteristics Main Undervoltage Protection threshold VVINSTH - 1.25 - V Main Undervoltage Protection hysteresis current source IVINSHys 8.8 15 20 µA Minimum ringing suppression time tZCRS1 1.87 2.8 3.5 µs VZC > VZCT2 Maximum ringing suppression time tZCRS2 18 25 32 µs VZC < VZCT2 Ringing suppression threshold VZCRS - 0.7 - V Maximum gate on time tOnMax 25 30.0 35.1 µs Maximum switching period tPerMax 42 50.0 57 µs 1) VFB>4.3V, VCS=0 The parameter is not subjected to production test - verified by design/characterization 4.3.9 Gate Driver Parameter Symbol Limit Values min. typ. max. Unit Test Condition Output voltage at logic low VGATElow - - 1.0 V IOUT = 20mA; VVCC=18V Output voltage at logic high VGATEhigh 9.0 10.0 - V IOUT = -20mA; VVCC=18V Output voltage active shut down VGATEasd - - 1.0 V V VVCC = 7V IOUT = 20mA Rise Time trise - 70 - ns COUT = 2.2nF; VGATE 2V ... 8V Fall Time tfall - 30 - ns COUT = 2.2nF; VGATE 8V ... 2V Version 2.0 15 13 June 2008 Quasi-Resonant PWM Controller ICE2QS02G Outline Dimension 5 Outline Dimension PG-DSO-8 ( Plastic Dual Small Outline) Figure 8 PG-DSO-8-8 *Dimensions in mm Version 2.0 16 13 June 2008 Total Quality Management Qualität hat für uns eine umfassende Bedeutung. Wir wollen allen Ihren Ansprüchen in der bestmöglichen Weise gerecht werden. Es geht uns also nicht nur um die Produktqualität – unsere Anstrengungen gelten gleichermaßen der Lieferqualität und Logistik, dem Service und Support sowie allen sonstigen Beratungs- und Betreuungsleistungen. Quality takes on an allencompassing significance at Semiconductor Group. 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