IRF IRS2109SPBF

Data Sheet No. PD60261
IRS2109/IRS21094(S)PbF
HALF-BRIDGE DRIVER
Features
• Floating channel designed for bootstrap operation
• Fully operational to +600 V
• Tolerant to negative transient voltage, dV/dt
Product Summary
VOFFSET
immune
• Gate drive supply range from 10 V to 20 V
• Undervoltage lockout for both channels
• 3.3 V, 5 V, and 15 V input logic compatible
• Cross-conduction prevention logic
• Matched propagation delay for both channels
• High-side output in phase with IN input
• Logic and power ground +/- 5 V offset.
• Internal 540 ns deadtime, and programmable
IO+/VOUT
ton/off (typ.)
Deadtime
up to 5 µs with one external RDT resistor (IRS21094)
• Lower di/dt gate driver for better noise immunity
• Shutdown input turns off both channels.
• RoHS compliant
600 V max.
120 mA / 250 mA
10 V - 20 V
750 ns & 200 ns
540 ns
(programmable up to 5 µs for IRS21094)
Packages
Description
The IRS2109/IRS21094 are high voltage, high
speed power MOSFET and IGBT drivers with dependent high- and low-side referenced output
channels. Proprietary HVIC and latch immune
CMOS technologies enable ruggedized monolithic
construction. The logic input is compatible with standard CMOS or LSTTL output, down to 3.3 V logic.
The output drivers feature a high pulse current
buffer stage designed for minimum driver cross-conduction. The floating channel can be used to drive
an N-channel power MOSFET or IGBT in the highside configuration which operates up to 600 V.
Typical Connection
8 Lead SOIC
14 Lead SOIC
14 Lead PDIP
8 Lead PDIP
IRS21094
IRS2109
(Refer to Lead Assignments for correct
configuration). These diagrams show electrical
connections only. Please refer to our
Application Notes and DesignTips for proper
circuit board layout.
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T
1
IRS2109/IRS21094(S)PbF
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured
under board mounted and still air conditions.
Symbol
Definition
Min.
Max.
VB
High-side floating absolute voltage
-0.3
625
VS
High-side floating supply offset voltage
VB - 25
VB + 0.3
VHO
High-side floating output voltage
VS - 0.3
VB + 0.3
VCC
Low-side and logic fixed supply voltage
-0.3
25
VLO
Low-side output voltage
-0.3
VCC + 0.3
DT
Programmable deadtime pin voltage (IRS21094 only)
VSS - 0.3
VCC + 0.3
VIN
Logic input voltage (IN & SD)
VSS - 0.3
VCC + 0.3
VSS
Logic ground (IRS21094/IRS21894 only)
VCC - 25
VCC + 0.3
dVS/dt
Allowable offset supply voltage transient
PD
Package power dissipation @ TA £ +25 °C
—
50
(8 Lead PDIP)
—
1.0
(8 Lead SOIC)
—
0.625
(14 lead PDIP)
—
1.6
—
1.0
(8 Lead PDIP)
—
125
(8 Lead SOIC)
—
200
(14 lead PDIP)
—
75
(14 lead SOIC)
(14 lead SOIC)
RthJA
Thermal resistance, junction to ambient
—
120
TJ
Junction temperature
—
150
TS
Storage temperature
-50
150
TL
Lead temperature (soldering, 10 seconds)
—
300
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Units
V
V/ns
W
°C/W
°C
2
IRS2109/IRS21094(S)PbF
Recommended Operating Conditions
The input/output logic timing diagram is shown in Fig. 1. For proper operation the device should be used within the
recommended conditions. The VS and VSS offset rating are tested with all supplies biased at a 15 V differential.
Symbol
Min.
Max.
VB
High-side floating supply absolute voltage
Definition
VS + 10
VS + 20
VS
High-side floating supply offset voltage
(Note 1)
600
VHO
High-side floating output voltage
VS
VB
VCC
Low-side and logic fixed supply voltage
10
20
VLO
Low-side output voltage
0
VCC
VIN
Logic input voltage (IN & SD)
VSS
VCC
DT
Programmable deadtime pin voltage (IRS21094 only)
VSS
VCC
VSS
Logic ground (IRS21094 only)
-5
5
Ambient temperature
-40
125
TA
Units
V
°C
Note 1: Logic operational for VS of -5 V to +600 V. Logic state held for VS of -5 V to -VBS. (Please refer to the Design Tip
DT97-3 for more details).
Dynamic Electrical Characteristics
VBIAS (VCC, VBS) = 15 V, VSS = COM, C L = 1000 pF, TA = 25 °C, DT = VSS unless otherwise specified.
Symbol
Definition
ton
Turn-on propagation delay
toff
tsd
Turn-off propagation delay
MT
Shutdown propagation delay
Delay matching, HS & LS turn-on/off
Min.
Typ.
—
750
—
—
Max. Units Test Conditions
950
VS = 0 V
200
280
VS = 0 V or 600 V
2 00
280
—
0
70
tr
Turn-on rise time
—
100
220
tf
Turn-off fall time
—
35
80
400
540
680
5
6
DT
Deadtime: LO turn-off to HO turn-on(DTLO-HO) &
HO turn-off to LO turn-on (DTHO-LO )
MDT
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Deadtime matching = DTLO - HO - DTHO-LO
4
—
0
60
—
0
600
ns
VS = 0 V
RDT= 0 Ω
µs
ns
R DT = 200 kΩ (IR21094)
RDT= 0 Ω
RDT = 200 kΩ (IR21094)
3
IRS2109/IRS21094(S)PbF
Static Electrical Characteristics
VBIAS (VCC, VBS) = 15 V, VSS = COM, DT= VSS and TA = 25 °C unless otherwise specified. The VIL, VIH, and IIN
parameters are referenced to VSS /COM and are applicable to the respective input leads: IN and SD. The VO, IO, and Ron
parameters are referenced to COM and are applicable to the respective output leads: HO and LO.
Symbol
Definition
VIH
Logic “1” input voltage for HO & logic “0” for LO
VIL
Min. Typ. Max. Units Test Conditions
2.5
—
—
Logic “0” input voltage for HO & logic “1” for LO
—
—
0.8
VSD,TH+
SD input positive going threshold
2.5
—
—
VSD,TH-
SD input negative going threshold
—
—
0.8
VOH
High level output voltage, VBIAS - VO
—
0.05
0.2
VOL
Low level output voltage, VO
—
0.02
0.1
ILK
Offset supply leakage current
—
—
50
IQBS
Quiescent VBS supply current
20
75
130
IQCC
Quiescent VCC supply current
0.4
1.0
1.6
IIN+
Logic “1” input bias current
—
5
20
IIN-
Logic “0” input bias current
—
—
2
8.0
8.9
9.8
7.4
8.2
9.0
Hysteresis
0.3
0.7
—
IO+
Output high short circuit pulsed current
120
290
—
IO-
Output low short circuit pulsed current
250
600
—
VCCUV+
VBSUV+
VCCUVVBSUVVCCUVH
VBSUVH
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VCC and VBS supply undervoltage positive going
threshold
VCC and VBS supply undervoltage negative going
threshold
VCC = 10 V to 20 V
V
IO = 2 mA
µA
mA
VB = VS = 600 V
VIN = 0 V or 5 V
VIN = 0 V or 5 V
RDT = 0 Ω
IN = 5 V, SD = 0 V
µA
IN = 0 V, SD = 5 V
V
mA
VO = 0 V, PW ≤ 10 µs
VO = 15 V,PW ≤ 10 µs
4
IRS2109/IRS21094(S)PbF
Functional Block Diagrams
VB
IRS2109
UV
DETECT
HO
R
VSS/COM
LEVEL
SHIFT
IN
HV
LEVEL
SHIFTER
Q
R
PULSE
FILTER
S
VS
PULSE
GENERATOR
VCC
DEADTIME
UV
DETECT
+5V
VSS/COM
LEVEL
SHIFT
SD
LO
DELAY
COM
VB
IRS21094
UV
DETECT
HO
R
VSS/CO M
LEVEL
SHIFT
IN
HV
LEVEL
SHIFTER
R
PULSE
FILTER
S
VS
PULSE
GENERATOR
VCC
DEAD TIM E
DT
UV
DETECT
+5V
SD
Q
VSS/CO M
LEVEL
SHIFT
DELAY
LO
CO M
VSS
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5
IRS2109/IRS21094(S)PbF
Lead Definitions
Symbol Description
IN
Logic input for high-side and low-side gate driver outputs (HO and LO), in phase with HO
(referenced to COM for IRS2109 and VSS for IRS21094)
Logic input for shutdown (referenced to COM for IRS2109 and VSS for IRS21094)
SD
DT
Programmable deadtime lead, referenced to VSS. (IRS21094 only)
VSS
Logic ground (IRS21094 only)
VB
High-side floating supply
HO
High-side gate drive output
VS
High-side floating supply return
VCC
Low-side and logic fixed supply
LO
Low-side gate drive output
COM
Low-side return
Lead Assignments
VCC
1
8
1
VCC
VB
8
2
IN
HO
7
2
IN
HO
7
3
SD
VS
6
3
SD
VS
6
COM
LO
COM
LO
5
4
1
5
4
8 Lead PDIP
8 Lead SOIC
IRS2109PbF
IRS2109SPbF
14
VCC
1
14
VCC
IN
VB
13
12
11
IN
VB
13
3
SD
HO
12
3
SD
HO
4
DT
VS
11
4
DT
VS
5
VSS
10
5
VSS
10
6
COM
9
6
COM
9
LO
8
7
LO
8
2
7
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VB
2
14 Lead PDIP
14 Lead SOIC
IRS21094PbF
IRS21094SPbF
6
IRS2109/IRS21094(S)PbF
IN(LO)
IN
50%
50%
SD
IN(HO)
ton
toff
tr
90%
HO
LO
HO
LO
Figure 1. Input/Output Timing Diagram
tf
90%
10%
10%
Figure 2. Switching Time Waveform Definitions
50%
50%
IN
SD
50%
90%
HO
tsd
HO
LO
LO
90%
DT LO-HO
10%
DT HO-LO
90%
10%
MDT=
Figure 3. Shutdown Waveform Definitions
DT LO-HO
- DT HO-LO
Figure 4. Deadtime Waveform Definitions
IN (LO)
50%
50%
IN (HO)
LO
HO
10%
MT
MT
90%
LO
HO
Figure 5. Delay Matching Waveform Definitions
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7
IRS2109/IRS21094(S)PbF
1300
Turn-On Propagation Delay (ns)
Turn-On Propagation Delay (ns)
1300
1100
900
M ax
Typ.
700
500
-50
1100
M ax.
900
Typ.
700
500
-25
0
25
50
75
100
125
10
12
Figure 6A. Turn-On Propagation Delay
vs. Temperature
16
18
20
Figure 6B. Turn-On Propagation Delay
vs. Supply Voltage
500
Turn-Off Propagation Delay (ns)
500
Turn-Off Propagation Delay (ns)
14
VBIAS Supply Voltage (V)
Temperature (oC)
400
300
M ax.
200
Typ.
100
400
M ax.
300
Typ.
200
100
0
0
-50
-25
0
25
50
75
100
125
o
Temperature ( C)
Figure 7A. Turn-Off Propagation Delay
vs. Temperature
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10
12
14
16
18
20
V BIAS Supply Voltage (V)
Figure 7B. Turn-Off Propagation Delay
vs. Supply Volta ge
8
IRS2109/IRS21094(S)PbF
500
SD Propagation Delay (ns)
SD Propagation Delay (ns)
500
400
300
M ax.
200
Typ.
100
400
M ax.
300
Typ.
200
100
0
0
-50
-25
0
25
50
75
100
10
125
12
Temperature ( C)
Figure 8A. SD Propagation Delay
vs. Temperature
16
18
20
Figure 8B. SD Propagation Delay
vs. Supply Voltage
50 0
Turn-On
(ns)
T urn-O n Rise
R is e TTime
im e (ns
)
5 00
T urn-O n RRise
is e TTime
im e (ns(ns)
)
Turn-On
14
V BIAS Supply Voltage (V)
o
4 00
3 00
2 00
Max.
1 00
Typ.
0
40 0
30 0
Max.
20 0
Typ.
10 0
0
-5 0
-2 5
0
25
50
75
1 00
Temperature(oC)
Figure 9A. Turn-On Rise Time
vs. Temperature
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1 25
10
12
14
16
18
20
VBIAS Supply Voltage (V)
Figure 9B. Turn-On Rise Time
vs. Supply Volta ge
9
IRS2109/IRS21094(S)PbF
200
T u rn
-O ffTime
F allT(ns)
im e
Turn-Off
Fall
Turn-Off Fall Time (ns)
2 00
1 50
1 00
Max.
50
Typ.
0
150
100
Max.
50
Typ.
0
-5 0
-2 5
0
25
50
75
1 00
1 25
10
12
Temperature(oC)
18
20
Figure 10B. Turn-Off Fall Time
vs. Supply Voltage
1000
1000
800
800
Deadtime (ns)
Deadtime (ns)
16
Input Voltage (V)
Figure 10A. Turn-Off Fall Time
vs. Temperature
M ax.
600
Typ.
400
14
M in.
600
M ax.
Typ.
M in.
400
200
200
-50
-25
0
25
50
75
100
125
o
Temperature ( C)
Figure 11A. Deadtime vs. Temperature
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10
12
14
16
18
20
V BIAS Supply Voltage (V)
Figure 11B. Deadtime vs. Supply Voltage
10
IRS2109/IRS21094(S)PbF
5
7
Input Voltage (V)
6
Deadtime
( s)
Deadtime
(µs)
M ax.
5
Typ.
4
M in.
3
2
4
3
Min.
2
1
1
-50
0
0
50
100
150
200
-25
0
R
(kΩ)
RDT
DT (KΩ)
3
Min.
2
1
16
18
VBIAS Supply Voltage (V)
Figure 12B. Logic “1” Input Voltage
vs. Supply Voltage
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20
Logic "0" Input Bias Current (µA)
Input Voltage (V)
4
14
75
100
125
Figure 12A. Logic “1” Input Voltage
vs. Temperature
5
12
50
Temperature (oC)
Figure 11C. Deadtime vs. R DT
(IR21094 only)
10
25
6
5
Max
4
3
2
1
0
-50
-25
0
25
50
75
100
125
Temperature (°C)
Figure 13A. Logic "0" Input Bias Current
vs. Temperature
11
5
6
5
SD Input threshold (+) (V)
Logic "0" Input Bias Current (µA)
IRS2109/IRS21094(S)PbF
Max
4
3
2
1
0
10
12
14
16
18
20
4
3 Max.
2
1
0
-50
-25
Supply Voltage (V)
25
50
75
100
125
o
Temperature ( C)
Figure 13B. Logic "0" Input Bias Current
Figure 14A. SD Input Positive Going
Threshold (+) vs. Temperature
vs. Voltage
5
5
SD Negative Going Threshold (V)
SD Input threshold (+) (V)
0
4
3
Max.
2
1
0
10
12
14
16
18
20
VCC Supply Voltage (V)
Figure 14B. SD Input Positive Going Threshold (+)
vs. Supply Voltage
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4
3
2
M in.
1
0
-50
-25
0
25
50
75
100
125
o
Temperature ( C)
Figure 15A. SD Negative Going Threshold
vs. Temperature
12
IRS2109/IRS21094(S)PbF
High Level Output Voltage (V)
SD Negative Going Threshold (V)
5
4
3
2
M in.
1
0
10
12
14
16
18
20
0.5
0.4
0.3
0.2
Max.
0.1
Typ.
0.0
-50
-25
V CC Supply Voltage (V)
Low Level Output Voltage (V)
High Level Output Voltage (V)
0.4
Max.
0.2
0.1
Typ.
0.0
12
14
16
18
VBIAS Supply Voltage (V)
Figure 16B. High Level Output Voltage
vs. Supply Volta ge
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50
75
100
125
Figure 16A. High Level Output Voltage
vs. Temperature
0.5
10
25
Temperature (oC)
Figure 15B. SD Negative Going Threshold
vs. Supply Volta ge
0.3
0
20
0.5
0.4
0.3
0.2
0.1
Max.
Typ.
0.0
-50
-25
0
25
50
75
100
125
Temperature (oC)
Figure 17A. Low Level Output Voltage
vs. Temperature
13
0.5
0.4
0.3
0.2
Max.
0.1
Typ.
0
10
12
14
16
18
20
Offset
OffsetSupply
SupplyLeakage
LeakageCurrent
Current(µA)
( A)
Low Level Output Voltage (V)
IRS2109/IRS21094(S)PbF
500
400
300
200
100
M ax.
0
-50
-25
25
50
75
100
125
o
VBIAS Supply Voltage (V)
Temperature ( C)
Figure 17B. Low Level Output Voltage
vs. Supply Voltage
Figure 18A. Offset Supply Leakage Current
vs. Temperature
500
400
V BS
S u p p ly C u rre n t ( A )
V
BS Supply Current (µA)
OOffset
ffs e t SSupply
u p p ly LLeakage
e a ka g e CCurrent
u rre n t ( (µA)
A)
0
400
300
200
100
M ax.
300
200
M ax.
100
Typ.
M in.
0
0
0
100
200
300
400
500
600
VB Boost Voltage (V)
Figure 18B. Offset Supply Leakage Current
vs. Boost Voltage
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-50
-25
0
25
50
75
100
125
Temperature (oC)
Figure 19A. VBS Supply Current
vs. Temperature
14
IRS2109/IRS21094(S)PbF
3.0
2.5
VCC Supply Current (mA)
VBS Supply Current (µA)
400
300
200
M ax.
100
Typ.
2.0
M ax.
1.5
Typ.
1.0
M in.
0.5
M in.
0
0.0
10
12
14
16
18
20
-50
-25
Figure 19B. VBS Supply Current
vs. Supply Voltage
25
50
75
100
125
Figure 20A. V CC Supply Current
vs. Temperature
3.0
60
Logic "1" Input Current (µA )
V CC Supply Current (mA)
0
Temperature (oC)
VBS Supply Voltage (V)
2.5
2.0
1.5
M ax.
1.0
Typ.
0.5
M in.
50
40
30
20
10
M ax.
Typ.
0.0
0
10
12
14
16
18
V CC Supply Voltage (V)
Figure 20B. VCC Supply Current
vs. VCC Supply Voltage
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20
-50
-25
0
25
50
75
100
125
Temperature ( oC)
Figure 21A. Logic “1” Input Current
vs. Temperature
15
IRS2109/IRS21094(S)PbF
5
Logic 0”
"0"Input
Input Current
Current (µA)
( A)
Logic “1”
"1" Input
Input Current ((µA)
A)
Logic
60
50
40
30
M ax.
20
10
Typ.
4
3
M ax.
2
0
1
0
10
12
14
16
18
20
-50
-25
0
V CC Supply Voltage (V)
50
75
100
125
o
Temperature ( C)
Figure 21B. Logic “1” Input Current
vs. Supply Voltage
Figure 22A. Logic “0” Input Current
vs. Temperature
12
V CC UVLO Threshold (+) (V)
5
Logic
A)
Logic"0"
0” Input Current
Current ((µA)
25
4
3
M ax.
2
1
11
10
M ax.
9
Typ.
M in.
8
7
0
10
12
14
16
18
V CC Supply Voltage (V)
Figure 22B. Logic “0” Input Currentt
vs. Supply Voltage
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20
-50
-25
0
25
50
75
100
125
o
Temperature ( C)
Figure 23. VCC Undervoltage Threshold (+)
vs. Temperature
16
IRS2109/IRS21094(S)PbF
12
V BS UVLO Threshold (+) (V)
V CC UVLO Threshold (-) (V)
11
10
M ax.
9
Typ.
8
M in.
7
6
11
M ax.
10
Typ.
9
M in.
8
7
-50
-25
0
25
50
75
100
125
-50
-25
0
Temperature ( oC)
Figure 24. V CC Undervoltage Threshold (-)
vs. Temperature
50
75
100
125
Figure 25. VBS Undervoltage Threshold (+)
vs. Temperature
500
Output Source Current (mA)
11
V BS UVLO Threshold (-) (V)
25
Temperature ( oC)
10
M ax.
9
Typ.
8
M in.
7
400
Typ.
300
200
Min.
100
0
6
-50
-25
0
25
50
75
100
125
Temperature (oC)
Figure 26. V BS Undervoltage Threshold (-)
vs. Temperature
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-50
-25
0
25
50
75
100
125
Temperature (oC)
Figure 27A. Output Source Current
vs. Temperature
17
IRS2109/IRS21094(S)PbF
1000
Output Sink
(µA)
Output
SinkCurrent
Current
(m
Α)
Output Source
Source Current
(µA)
Output
Current
(m
Α)
500
400
300
200
Typ.
100
800
600
400
Min.
200
Min.
0
-50
0
10
12
14
16
18
20
-25
0
25
50
75
100
VBIAS Supply Voltage (V)
Temperature (oC)
Figure 27B. Output Source Current
vs. Supply Voltage
Figure 28A. Output Sink Current
vs. Temperature
125
0
V S Offset Supply Voltage (V)
1000
Output
Current
(m
Α)
Output Sink
Sink Current
(µA)
Typ.
800
600
400
Typ.
200
Min.
0
-2
Typ.
-4
-6
-8
-10
10
12
14
16
18
VBIAS Supply Voltage (V)
Figure 28B. Output Sink Currentt
vs. Supply Voltage
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20
10
12
14
16
18
20
V BS Flouting Supply Voltage (V)
Figure 29. Maximum V S Negative Offset
vs. Supply Voltage
18
140
140
120
120
100
140 V
80
70 V
60
0 V
Temperature (oC)
Temperature (oC)
IRS2109/IRS21094(S)PbF
40
100
140 V
80
70 V
60
0 V
40
20
20
1
10
100
1
1000
Figure 30. IRS2109 vs Frequency (IRFBC20)
Rgate = 33 Ω, VCC = 15 V
1000
Figure 31. IRS2109 vs Frequency (IRFBC30)
Rgate = 22 Ω, VCC = 15 V
140
140
120
120
140 V
80
70 V
60
0V
40
Temperature (oC)
Temperature ( oC)
100
Frequency (kHz)
Frequency (kHz)
100
10
140 V 70 V
0V
100
80
60
40
20
20
1
10
100
1000
Frequency (kHz)
Figure 32. IRS2109 vs Frequency (IRFBC40)
Rgate = 15 Ω, VCC = 15 V
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1
10
100
1000
Frequency (kHz)
Figure 33. IRS2109 vs Frequency (IRFPE50)
Rgate = 10 Ω, VCC = 15 V
19
140
140
120
120
100
80
60
140 V
Temperature (oC)
Temperature (oC)
IRS2109/IRS21094(S)PbF
100
80
140 V
60
70 V
70 V
0 V
40
40
0 V
20
20
1
10
100
1
1000
10
100
1000
Frequency (kHz)
Frequency (kHz)
Figure 35. IRS21094 vs. Frequency (IRFBC30),
Rgate=22 Ω , V CC=15 V
Figure 34. IRS21094 vs. Frequency (IRFBC20),
Rgate=33 Ω , V CC=15 V
140
140
120
120
140 V
100
140 V
80
70 V
0 V
60
Temperature (oC)
Temperature (oC)
70 V
100
80
60
40
40
20
20
1
10
100
1000
Frequency (kHz)
Figure 36. IRS21094 vs. Frequency (IRFBC40),
Rgate=15 Ω , VCC=15 V
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0 V
1
10
100
1000
Frequency (kHz)
Figure 37. IRS21094 vs. Frequency (IRFPE50),
Rgate=10 Ω , V CC=15 V
20
IRS2109/IRS21094(S)PbF
140
140
120
120
100
80
140 V
70 V
60
0 V
Temperature (oC)
Temperature (oC)
140 V
40
100
70 V
0 V
80
60
40
20
20
1
10
100
1000
1
10
Frequency (kHz)
Figure 39. IRS2109S vs. Frequency (IRFBC30),
Rgate=22 Ω , V CC=15 V
140 V 70 V
140 V 70 V 0 V
140
120
0 V
100
80
60
Tempreture (oC)
120
Temperature (oC)
1000
Frequency (kHz)
Figure 38. IRS2109S vs. Frequency (IRFBC20),
Rgate=33 Ω , V CC=15 V
140
100
100
80
60
40
40
20
20
1
10
100
1000
Frequency (kHz)
Figure 40. IRS2109S vs. Frequency (IRFBC40),
Rgate=15 Ω , V CC=15 V
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1
10
100
1000
Frequency (kHz)
Figure 41. IRS2109S vs. Frequency (IRFPE50),
Rgate=10 Ω , V CC=15 V
21
140
140
120
120
100
80
60
140 V
70 V
0V
40
Temperature (oC)
Temperature (oC)
IRS2109/IRS21094(S)PbF
80
140 V
70 V
60
0V
40
20
20
1
10
100
1
1000
10
100
1000
Frequency (kHz)
Frequency (kHz)
Figure 42. IRS21094S vs. Frequency (IRFBC20),
Rgate=33 Ω, Vcc=15 V
Figure 43. IRS21094S vs. Frequency (IRFBC30),
Rgate=22 Ω, Vcc=15 V
140
140
120
120
100
140 V
70 V
80
0 V
60
Temperature (oC)
Temperature (oC)
100
140 V 70 V
0 V
100
80
60
40
40
20
20
1
1
10
100
1000
10
100
1000
Frequency (kHz)
Frequency (kHz)
Figure 44. IRS21094S vs. Frequency (IRFBC40),
Rgate=15 Ω, Vcc=15 V
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Figure 45. IRS21094S vs. Frequency (IRFPE50),
Rgate=10 Ω, Vcc=15 V
22
IRS2109/IRS21094(S)PbF
Case Outlines
01-6014
01-3003 01 (MS-001AB)
8 Lead PDIP
D
DIM
B
5
A
FOOTPRINT
8
6
7
6
5
H
E
1
2
3
0.25 [.010]
4
A
6.46 [.255]
MIN
.0532
.0688
1.35
1.75
A1 .0040
e
3X 1.27 [.050]
e1
.0098
0.10
0.25
.013
.020
0.33
0.51
c
.0075
.0098
0.19
0.25
D
.189
.1968
4.80
5.00
E
.1497
.1574
3.80
4.00
e
.050 BASIC
0.25 [.010]
A1
0.635 BASIC
H
.2284
.2440
5.80
6.20
K
.0099
.0196
0.25
0.50
L
.016
.050
0.40
1.27
y
0°
8°
0°
8°
y
0.10 [.004]
8X L
8X c
7
C A B
NOTES:
1. DIMENSIONING & TOLERANCING PER ASME Y14.5M-1994.
2. CONTROLLING DIMENSION: MILLIMETER
3. DIMENSIONS ARE SHOWN IN MILLIMETERS [INC HES].
4. OUTLINE CONFORMS TO JEDEC OUTLINE MS-012AA.
8 Lead SOIC
www.irf.com
.025 BASIC
1.27 BASIC
K x 45°
A
C
8X b
8X 1.78 [.070]
MAX
b
e1
6X
MILLIMETERS
MAX
A
8X 0.72 [.028]
INCHES
MIN
5 DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS.
MOLD PROTRUSIONS NOT TO EXCEED 0.15 [.006].
6 DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS.
MOLD PROTRUSIONS NOT TO EXCEED 0.25 [.010].
7 DIMENSION IS THE LENG TH OF LEAD FOR SOLDERING TO
A SUBSTRATE.
01-6027
01-0021 11 (MS-012AA)
23
IRS2109/IRS21094(S)PbF
14 Lead PDIP
14 Lead SOIC (narrow body)
www.irf.com
01-6010
01-3002 03 (MS-001AC)
01-6019
01-3063 00 (MS-012AB)
24
IRS2109/IRS21094(S)PbF
Tape & Reel
8-lead SOIC
LOAD ED TA PE FEED DIRECTION
A
B
H
D
F
C
N OTE : CO NTROLLING
D IMENSION IN M M
E
G
C A R R I E R T A P E D IM E N S I O N F O R 8 S O I C N
M etr ic
Im p e r i a l
Cod e
M in
M ax
M in
M ax
A
7 .9 0
8 .1 0
0 . 31 1
0 .3 1 8
B
3 .9 0
4 .1 0
0 . 15 3
0 .1 6 1
C
1 1 .7 0
1 2.30
0 .4 6
0 .4 8 4
D
5 .4 5
5 .5 5
0 . 21 4
0 .2 1 8
E
6 .3 0
6 .5 0
0 . 24 8
0 .2 5 5
F
5 .1 0
5 .3 0
0 . 20 0
0 .2 0 8
G
1 .5 0
n/ a
0 . 05 9
n/ a
H
1 .5 0
1 .6 0
0 . 05 9
0 .0 6 2
F
D
C
B
A
E
G
H
R E E L D IM E N S I O N S F O R 8 S O IC N
M etr ic
Im p e r i a l
Cod e
M in
M ax
M in
M ax
A
3 2 9. 6 0
3 3 0 .2 5
1 2 .9 7 6
1 3 .0 0 1
B
2 0 .9 5
2 1.45
0 . 82 4
0 .8 4 4
C
1 2 .8 0
1 3.20
0 . 50 3
0 .5 1 9
D
1 .9 5
2 .4 5
0 . 76 7
0 .0 9 6
E
9 8 .0 0
1 0 2 .0 0
3 . 85 8
4 .0 1 5
F
n /a
1 8.40
n /a
0 .7 2 4
G
1 4 .5 0
1 7.10
0 . 57 0
0 .6 7 3
H
1 2 .4 0
1 4.40
0 . 48 8
0 .5 6 6
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25
IRS2109/IRS21094(S)PbF
Tape & Reel
14-lead SOIC
LOAD ED TA PE FEED DIRECTION
A
B
H
D
F
C
N OTE : CO NTROLLING
D IMENSION IN M M
E
G
C A R R I E R T A P E D IM E N S I O N F O R 1 4 S O IC N
M etr ic
Im p e r i a l
Cod e
M in
M ax
M in
M ax
A
7 .9 0
8 .1 0
0 . 31 1
0 .3 1 8
B
3 .9 0
4 .1 0
0 . 15 3
0 .1 6 1
C
1 5 .7 0
1 6.30
0 . 61 8
0 .6 4 1
D
7 .4 0
7 .6 0
0 . 29 1
0 .2 9 9
E
6 .4 0
6 .6 0
0 . 25 2
0 .2 6 0
F
9 .4 0
9 .6 0
0 . 37 0
0 .3 7 8
G
1 .5 0
n/ a
0 . 05 9
n/ a
H
1 .5 0
1 .6 0
0 . 05 9
0 .0 6 2
F
D
C
B
A
E
G
H
R E E L D IM E N S I O N S F O R 1 4 S O IC N
M etr ic
Im p e r i a l
Cod e
M in
M ax
M in
M ax
A
3 2 9. 6 0
3 3 0 .2 5
1 2 .9 7 6
1 3 .0 0 1
B
2 0 .9 5
2 1.45
0 . 82 4
0 .8 4 4
C
1 2 .8 0
1 3.20
0 . 50 3
0 .5 1 9
D
1 .9 5
2 .4 5
0 . 76 7
0 .0 9 6
E
9 8 .0 0
1 0 2 .0 0
3 . 85 8
4 .0 1 5
F
n /a
2 2.40
n /a
0 .8 8 1
G
1 8 .5 0
2 1.10
0 . 72 8
0 .8 3 0
H
1 6 .4 0
1 8.40
0 . 64 5
0 .7 2 4
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26
IRS2109/IRS21094(S)PbF
LEADFREE PART MARKING INFORMATION
IRxxxxxx
S
Part number
YWW?
Date code
Pin 1
Identifier
?
P
MARKING CODE
Lead Free Released
Non-Lead Free
Released
IR logo
?XXXX
Lot Code
(Prod mode - 4 digit SPN code)
Assembly site code
Per SCOP 200-002
ORDER INFORMATION
8-Lead PDIP IRS2109PbF
8-Lead SOIC IRS2109SPbF
8-Lead SOIC Tape & Reel IRS2109STRPbF
14-Lead PDIP IRS21094PbF
14-Lead SOIC IRS21094SPbF
14-Lead SOIC Tape & Reel IRS21094STRPbF
The SOIC-8 is MSL2 qualified.
The SOIC-14 is MSL3 qualified.
This product has been designed and qualified for the industrial level.
Qualification standards can be found at www.irf.com
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
Data and specifications subject to change without notice. 12/4/2006
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27