INTEGRATED CIRCUITS DATA SHEET 74LVC244A; 74LVCH244A Octal buffer/line driver with 5 V tolerant inputs/outputs (3-state) Product specification Supersedes data of 2003 May 20 2003 Oct 30 Philips Semiconductors Product specification Octal buffer/line driver with 5 V tolerant inputs/outputs (3-state) 74LVC244A; 74LVCH244A FEATURES DESCRIPTION • 5 V tolerant inputs/outputs for interfacing with 5 V logic The 74LVC244A/74LVCH244A is a high performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. • Wide supply voltage range from 1.2 to 3.6 V • CMOS low power consumption Inputs can be driven from either 3.3 or 5 V devices. In 3-state operation, outputs can handle 5 V. These features allow the use of these devices as translators in a mixed 3.3 and 5 V environment. • Direct interface with TTL levels • Inputs accept voltages up to 5.5 V • High-impedance when VCC = 0 V • Bushold on all data inputs (74LVCH244A only) The 74LVC244A/74LVCH244A is an octal non-inverting buffer/line driver with 3-state outputs. The 3-state outputs are controlled by the output enable inputs 1OE and 2OE. A HIGH on nOE causes the outputs to assume a high-impedance OFF-state. Schmitt-trigger action at all inputs makes the circuit highly tolerant for slower input rise and fall times. • Complies with JEDEC standard no. 8-1A • ESD protection: HBM EIA/JESD22-A114-A exceeds 2000 V MM EIA/JESD22-A115-A exceeds 200 V. • Specified from −40 to +85 °C and −40 to +125 °C. The 244 is functionally identical to the 240, but the 240 has inverting outputs. QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C; tr = tf ≤ 2.5 ns. SYMBOL PARAMETER tPHL/tPLH propagation delay 1An to 1Yn, 2An to 2Yn CI input capacitance CPD power dissipation capacitance per buffer CONDITIONS CL = 50 pF; VCC = 3.3 V VCC = 3.3 V; notes 1 and 2 Notes 1. CPD is used to determine the dynamic power dissipation (PD in µW). PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in Volts; N = total load switching outputs; Σ(CL × VCC2 × fo) = sum of the outputs. 2. The condition is VI = GND to VCC. 2003 Oct 30 2 TYPICAL UNIT 2.8 ns 4.0 pF 10 pF Philips Semiconductors Product specification Octal buffer/line driver with 5 V tolerant inputs/outputs (3-state) 74LVC244A; 74LVCH244A ORDERING INFORMATION PACKAGE TYPE NUMBER TEMPERATURE RANGE PINS PACKAGE MATERIAL CODE 74LVC244AD −40 to +125 °C 20 SO20 plastic SOT163-1 74LVCH244AD −40 to +125 °C 20 SO20 plastic SOT163-1 74LVC244ADB −40 to +125 °C 20 SSOP20 plastic SOT339-1 74LVCH244ADB −40 to +125 °C 20 SSOP20 plastic SOT339-1 74LVC244APW −40 to +125 °C 20 TSSOP20 plastic SOT360-1 74LVCH244APW −40 to +125 °C 20 TSSOP20 plastic SOT360-1 74LVC244ABQ −40 to +125 °C 20 DHVQFN20 plastic SOT764-1 74LVCH244ABQ −40 to +125 °C 20 DHVQFN20 plastic SOT764-1 FUNCTION TABLE See note 1. INPUT nOE OUTPUT nAn L L L L H H H X Z Note 1. H = HIGH voltage level; a) L = LOW voltage level; b) X = don’t care; c) Z = high-impedance OFF-state. 2003 Oct 30 nYn 3 Philips Semiconductors Product specification Octal buffer/line driver with 5 V tolerant inputs/outputs (3-state) PINNING PIN 1 74LVC244A; 74LVCH244A PIN SYMBOL 1OE DESCRIPTION SYMBOL DESCRIPTION 11 2A3 bus input output enable input (active LOW) 12 1Y3 bus output 13 2A2 bus input 2 1A0 data input 14 1Y2 bus output 3 2Y0 bus output 15 2A1 bus input 4 1A1 data input 16 1Y1 bus output 5 2Y1 bus output 17 2A0 bus input 6 1A2 data input 18 1Y0 bus output 7 2Y2 bus output 19 2OE 8 1A3 data input output enable input (active LOW) 9 2Y3 bus output 20 VCC supply voltage 10 GND ground (0 V) handbook, halfpage 1OE VCC 1 20 handbook, halfpage 1OE 1 20 VCC 1A0 2 19 2OE 2Y0 3 18 1Y0 1A1 4 17 2A0 2Y1 5 16 1Y1 1A2 6 15 2A1 2Y2 7 14 1Y2 1A3 8 13 2A2 2Y3 9 12 1Y3 GND 10 11 2A3 1A0 2 19 2OE 2Y0 3 18 1Y0 1A1 4 17 2A0 2Y1 5 16 1Y1 GND(1) 1A2 6 15 2A1 2Y2 7 14 1Y2 1A3 8 13 2A2 2Y3 9 12 1Y3 MNA872 Top view 10 11 GND 2A3 MBL761 (1) The die substrate is attached to this pad using conductive die attach material. It can not be used as a supply pin or input. Fig.1 Pin configuration SO and (T)SSOP. 2003 Oct 30 Fig.2 Pin configuration DHVQFN20. 4 Philips Semiconductors Product specification Octal buffer/line driver with 5 V tolerant inputs/outputs (3-state) 74LVC244A; 74LVCH244A handbook, halfpage 1A0 1Y0 2 18 1A1 1Y1 4 handbook, halfpage 1 EN 16 1A2 6 2 18 4 16 6 14 8 12 14 1A3 8 1 1Y2 1Y3 12 1OE 2A0 2Y0 17 19 3 EN 2A1 2Y1 15 11 9 13 7 15 5 17 3 5 2A2 13 2Y2 7 2A3 11 2Y3 9 MNA873 19 2OE MNA875 Fig.3 Logic symbol (IEEE/IEC). 2 handbook, halfpage Fig.4 Functional diagram. 18 1A0 4 1A3 1OE 6 8 2A0 1Y1 2A1 1Y2 2A2 1Y3 2A3 14 12 1 2OE 3 2Y0 15 16 1A1 1A2 17 1Y0 5 2Y1 13 7 2Y2 11 9 2Y3 19 MNA874 Fig.5 Logic symbol. 2003 Oct 30 5 Philips Semiconductors Product specification Octal buffer/line driver with 5 V tolerant inputs/outputs (3-state) 74LVC244A; 74LVCH244A RECOMMENDED OPERATING CONDITIONS SYMBOL VCC PARAMETER supply voltage VI input voltage VO output voltage Tamb operating ambient temperature tr, tf input rise and fall times CONDITIONS MIN. MAX. UNIT for maximum speed performance 2.7 3.6 V for low-voltage applications 1.2 3.6 V 0 5.5 V output HIGH or LOW state 0 VCC V output 3-state 0 5.5 V in free air −40 +125 °C VCC = 1.2 to 2.7 V 0 20 ns/V VCC = 2.7 to 3.6 V 0 10 ns/V LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V). SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT VCC supply voltage −0.5 +6.5 V IIK input diode current VI < 0 − −50 mA VI input voltage note 1 −0.5 +6.5 V IOK output diode current VO > VCC or VO < 0 − ±50 mA VO output voltage output HIGH or LOW state; note 1 −0.5 VCC + 0.5 V output 3-state; note 1 −0.5 +6.5 V VO = 0 to VCC IO output source or sink current − ±50 mA ICC, IGND VCC or GND current − ±100 mA Tstg storage temperature −65 +150 °C Ptot power dissipation − 500 mW Tamb = −40 to +125 °C; note 2 Notes 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. For SO20 packages: above 70 °C derate linearly with 8 mW/K. a) For SSOP20 and TSSOP20 packages: above 60 °C derate linearly with 5.5 mW/K. b) For DHVQFN20 packages: above 60 °C derate linearly with 5.5 mW/K. 2003 Oct 30 6 Philips Semiconductors Product specification Octal buffer/line driver with 5 V tolerant inputs/outputs (3-state) 74LVC244A; 74LVCH244A DC CHARACTERISTICS At recommended operating conditions; voltages are referenced to GND (ground = 0 V). TEST CONDITIONS SYMBOL PARAMETER MIN. OTHER TYP.(1) MAX. UNIT VCC (V) Tamb = −40 to +85 °C VIH VIL LOW-level input voltage VOH HIGH-level output voltage VOL 1.2 VCC − − V 2.7 to 3.6 2.0 − − V 1.2 − − GND V 2.7 to 3.6 − − 0.8 V IO = −100 µA 2.7 to 3.6 VCC − 0.2 VCC − V HIGH-level input voltage LOW-level output voltage VI = VIH or VIL IO = −12 mA 2.7 VCC − 0.5 − − V IO = −18 mA 3.0 VCC − 0.6 − − V IO = −24 mA 3.0 VCC − 0.8 − − V IO = 100 µA 2.7 to 3.6 − GND 0.20 V IO = 12 mA 2.7 − − 0.40 V IO = 24 mA 3.0 − − 0.55 V VI = VIH or VIL ILI input leakage current VI = 5.5 V or GND; notes 2 3.6 − ±0.1 ±5 µA IOZ 3-state output OFF-state current VI = VIH or VIL; VO = 5.5 V or GND; notes 2 3.6 − 0.1 ±5 µA Ioff power-off leakage supply current VI or VO = 5.5 V 0.0 − 0.1 ±10 µA ICC quiescent supply current VI = VCC or GND; IO = 0 3.6 − 0.1 10 µA ∆ICC additional quiescent supply VI = VCC − 0.6 V; current per input pin IO = 0 2.7 to 3.6 − 5 500 µA IBH(L) bushold LOW sustaining current VI = 0.8 V; notes 3 and 4 3.0 75 − − µA IBH(H) bushold HIGH sustaining current VI = 2.0 V; notes 3 and 4 3.0 −75 − − µA IBH(LO) bushold LOW overdrive current notes 3 and 5 3.6 500 − − µA IBH(HO) bushold HIGH overdrive current notes 3 and 5 3.6 −500 − − µA 2003 Oct 30 7 Philips Semiconductors Product specification Octal buffer/line driver with 5 V tolerant inputs/outputs (3-state) 74LVC244A; 74LVCH244A TEST CONDITIONS SYMBOL PARAMETER MIN. OTHER TYP.(1) MAX. UNIT VCC (V) Tamb = −40 to +125 °C VIH VIL VOH VOL HIGH-level input voltage LOW-level input voltage HIGH-level output voltage LOW-level output voltage 1.2 VCC − − V 2.7 to 3.6 2.0 − − V 1.2 − − GND V 2.7 to 3.6 − − 0.8 V VI = VIH or VIL IO = −100 µA 2.7 to 3.6 VCC − 0.3 − − V IO = −12 mA 2.7 VCC − 0.65 − − V IO = −18 mA 3.0 VCC − 0.75 − − V IO = −24 mA 3.0 VCC − 1 − − V IO = 100 µA 2.7 to 3.6 − − 0.3 V IO = 12 mA 2.7 − − 0.6 V IO = 24 mA 3.0 − − 0.8 V VI = VIH or VIL ILI input leakage current VI = 5.5 V or GND; notes 2 3.6 − − ±20 µA IOZ 3-state output OFF-state current VI = VIH or VIL; VO = 5.5 V or GND; notes 2 3.6 − − ±20 µA Ioff power-off leakage supply current VI or VO = 5.5 V 0.0 − − ±20 µA ICC quiescent supply current VI = VCC or GND; IO = 0 3.6 − − 40 µA ∆ICC additional quiescent supply VI = VCC − 0.6 V; current per input pin IO = 0 2.7 to 3.6 − − 5000 µA IBH(L) bushold LOW sustaining current VI = 0.8 V; notes 3 and 4 3.0 60 − − µA IBH(H) bushold HIGH sustaining current VI = 2.0 V; notes 3 and 4 3.0 −60 − − µA IBH(LO) bushold LOW overdrive current notes 3 and 5 3.6 500 − − µA IBH(HO) bushold HIGH overdrive current notes 3 and 5 3.6 −500 − − µA Notes 1. All typical values are measured at VCC = 3.3 V and Tamb = 25 °C. 2. For bushold parts, the bushold circuit is switched off when VI > VCC allowing 5.5 V on the input pin. 3. Valid for data inputs of bushold parts (74LVCH244A) only. For data inputs only, control inputs do not have a bushold circuit. 4. The specified sustaining current at the data inputs do not have a bushold circuit. 5. The specified overdrive current at the data input forces the data input to the opposite logic input state. 2003 Oct 30 8 Philips Semiconductors Product specification Octal buffer/line driver with 5 V tolerant inputs/outputs (3-state) 74LVC244A; 74LVCH244A AC CHARACTERISTICS GND = 0 V; tr = tf ≤ 2.5 ns. TEST CONDITIONS SYMBOL PARAMETER WAVEFORMS MIN. TYP. MAX. UNIT 1.2 − 17.0 − 2.7 1.5 3.3 6.9 ns 3.0 to 3.6 1.5 2.8(1) 5.9 ns 1.2 − 24.0 − ns 2.7 1.5 3.3 8.6 ns 3.0 to 3.6 1.0 3.4(1) 7.6 ns 1.2 − 9.0 − ns 2.7 1.5 3.2 6.8 ns 3.0 to 3.6 1.5 2.9(1) 5.8 ns − − 1.0 ns 1.2 − − − ns 2.7 1.5 − 9.0 ns VCC (V) Tamb = −40 to +85 °C tPHL/tPLH tPZH/tPZL tPHZ/tPLZ tsk(0) propagation delay 1An to 1Yn, 2An to 2Yn see Figs 6 and 8 3-state output enable time 1OE to 1Yn, 2OE to 2Yn 3-state output disable time 1OE to 1Yn, 2OE to 2Yn skew see Figs 7 and 8 see Figs 7 and 8 note 2 ns Tamb = −40 to +125 °C tPHL/tPLH tPZH/tPZL tPHZ/tPLZ tsk(0) propagation delay 1An to 1Yn, 2An to 2Yn see Figs 6 and 8 3-state output enable time 1OE to 1Yn, 2OE to 2Yn 3-state output disable time 1OE to 1Yn, 2OE to 2Yn skew see Figs 7 and 8 see Figs 7 and 8 note 2 3.0 to 3.6 1.5 − 7.5 ns 1.2 − − − ns 2.7 1.5 − 11 ns 3.0 to 3.6 1.0 − 9.5 ns 1.2 − − − ns 2.7 1.5 − 8.5 ns 3.0 to 3.6 1.5 − 7.5 ns − − 1.5 ns Notes 1. All typical values are measured at VCC = 3.3 V and Tamb = 25 °C. 2. Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design. 2003 Oct 30 9 Philips Semiconductors Product specification Octal buffer/line driver with 5 V tolerant inputs/outputs (3-state) 74LVC244A; 74LVCH244A AC WAVEFORMS handbook, halfpage VI nAn input VM VM GND tPLH tPHL VOH VM VM nYn output VOL VM = 1.5 V at VCC ≥ 2.7 V. VM = 0.5VCC at VCC < 2.7 V. MNA171 VOL and VOH are typical output voltage drop that occur with the output load. Fig.6 Input nAn to output nYn propagation delays. VI handbook, full pagewidth nOE input VM GND tPLZ tPZL VCC output LOW-to-OFF OFF-to-LOW VM VX VOL tPHZ VOH tPZH VY output HIGH-to-OFF OFF-to-HIGH GND VM outputs enabled outputs disabled outputs enabled MNA362 VM = 1.5 V at VCC ≥ 2.7 V. VM = 0.5VCC at VCC < 2.7 V. VX = VOL + 0.3 V at VCC ≥ 2.7 V; VX = VOL + 0.1VCC at VCC < 2.7 V. VY = VOH + 0.3 V at VCC ≥ 2.7 V; VY = VOH + 0.1VCC at VCC < 2.7 V. VOL and VOH are typical output voltage drop that occur with the output load. Fig.7 3-state enable and disable times. 2003 Oct 30 10 Philips Semiconductors Product specification Octal buffer/line driver with 5 V tolerant inputs/outputs (3-state) 74LVC244A; 74LVCH244A S1 handbook, full pagewidth VCC PULSE GENERATOR VI RL 500 Ω VO 2 × VCC open GND D.U.T. CL 50 pF RT RL 500 Ω MNA368 SWITCH POSITION TEST S1 tPLH/tPHL open tPLZ/tPZL 2 × VCC tPHZ/tPZH GND VCC VIN <2.7 V VCC 2.7 to 3.6 V 2.7 V Definitions for test circuits: RL = Load resistor. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to Zo of the pulse generator. Fig.8 Load circuitry for switching times. 2003 Oct 30 11 Philips Semiconductors Product specification Octal buffer/line driver with 5 V tolerant inputs/outputs (3-state) 74LVC244A; 74LVCH244A PACKAGE OUTLINES SO20: plastic small outline package; 20 leads; body width 7.5 mm SOT163-1 D E A X c HE y v M A Z 11 20 Q A2 A (A 3) A1 pin 1 index θ Lp L 1 10 e bp detail X w M 0 5 10 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y mm 2.65 0.3 0.1 2.45 2.25 0.25 0.49 0.36 0.32 0.23 13.0 12.6 7.6 7.4 1.27 10.65 10.00 1.4 1.1 0.4 1.1 1.0 0.25 0.25 0.1 0.9 0.4 inches 0.1 0.012 0.096 0.004 0.089 0.01 0.019 0.013 0.014 0.009 0.51 0.49 0.30 0.29 0.05 0.419 0.043 0.055 0.394 0.016 0.043 0.039 0.01 0.01 0.004 0.035 0.016 Z (1) θ 8o 0o Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC SOT163-1 075E04 MS-013 2003 Oct 30 JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 12 Philips Semiconductors Product specification Octal buffer/line driver with 5 V tolerant inputs/outputs (3-state) 74LVC244A; 74LVCH244A SSOP20: plastic shrink small outline package; 20 leads; body width 5.3 mm D SOT339-1 E A X c HE y v M A Z 20 11 Q A2 A (A 3) A1 pin 1 index θ Lp L 1 10 bp e detail X w M 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) θ mm 2 0.21 0.05 1.80 1.65 0.25 0.38 0.25 0.20 0.09 7.4 7.0 5.4 5.2 0.65 7.9 7.6 1.25 1.03 0.63 0.9 0.7 0.2 0.13 0.1 0.9 0.5 8 0o Note 1. Plastic or metal protrusions of 0.2 mm maximum per side are not included. OUTLINE VERSION SOT339-1 2003 Oct 30 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 MO-150 13 o Philips Semiconductors Product specification Octal buffer/line driver with 5 V tolerant inputs/outputs (3-state) 74LVC244A; 74LVCH244A TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm SOT360-1 E D A X c HE y v M A Z 11 20 Q A2 (A 3) A1 pin 1 index A θ Lp L 1 10 detail X w M bp e 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (2) e HE L Lp Q v w y Z (1) θ mm 1.1 0.15 0.05 0.95 0.80 0.25 0.30 0.19 0.2 0.1 6.6 6.4 4.5 4.3 0.65 6.6 6.2 1 0.75 0.50 0.4 0.3 0.2 0.13 0.1 0.5 0.2 8 0o Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT360-1 2003 Oct 30 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 MO-153 14 o Philips Semiconductors Product specification Octal buffer/line driver with 5 V tolerant inputs/outputs (3-state) 74LVC244A; 74LVCH244A DHVQFN20: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; SOT764-1 20 terminals; body 2.5 x 4.5 x 0.85 mm A B D A A1 E c detail X terminal 1 index area terminal 1 index area C e1 e 2 9 y y1 C v M C A B w M C b L 1 10 Eh e 20 11 19 12 Dh X 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A(1) max. A1 b c D (1) Dh E (1) Eh e e1 L v w y y1 mm 1 0.05 0.00 0.30 0.18 0.2 4.6 4.4 3.15 2.85 2.6 2.4 1.15 0.85 0.5 3.5 0.5 0.3 0.1 0.05 0.05 0.1 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC JEITA SOT764-1 --- MO-241 --- 2003 Oct 30 15 EUROPEAN PROJECTION ISSUE DATE 02-10-17 03-01-27 Philips Semiconductors Product specification Octal buffer/line driver with 5 V tolerant inputs/outputs (3-state) 74LVC244A; 74LVCH244A DATA SHEET STATUS LEVEL DATA SHEET STATUS(1) PRODUCT STATUS(2)(3) Development DEFINITION I Objective data II Preliminary data Qualification This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. III Product data This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Production This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. Notes 1. Please consult the most recently issued data sheet before initiating or completing a design. 2. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. 3. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. DEFINITIONS DISCLAIMERS Short-form specification The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Life support applications These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Limiting values definition Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Right to make changes Philips Semiconductors reserves the right to make changes in the products including circuits, standard cells, and/or software described or contained herein in order to improve design and/or performance. When the product is in full production (status ‘Production’), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Application information Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. 2003 Oct 30 16 Philips Semiconductors – a worldwide company Contact information For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825 For sales offices addresses send e-mail to: [email protected]. SCA75 © Koninklijke Philips Electronics N.V. 2003 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands R20/04/pp17 Date of release: 2003 Oct 30 Document order number: 9397 750 12177