INTEGRATED CIRCUITS DATA SHEET 74LVC162245A; 74LVCH162245A 16-bit transceiver with direction pin; 30 Ω series termination resistors; 5 V tolerant input/output; 3-state Product specification Supersedes data of 1998 Feb 17 2003 Dec 08 Philips Semiconductors Product specification 16-bit transceiver with direction pin; 30 Ω series 74LVC162245A; termination resistors; 5 V tolerant input/output; 3-state 74LVCH162245A FEATURES DESCRIPTION • 5 V tolerant inputs/outputs for interfacing with 5 V logic The 74LVC(H)162245A is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. • Wide supply voltage range from 1.2 to 3.6 V • CMOS low power consumption Inputs can be driven from either 3.3 or 5 V devices. In 3-state operation, outputs can handle 5 V. These features allow the use of these devices as translators in a mixed 3.3 and 5 V environment. • MULTIBYTETM flow-through standard pin-out architecture • Low inductance multiple power and ground pins for minimum noise and ground bounce The 74LVC(H)162245A is a 16-bit transceiver featuring non-inverting 3-state bus compatible outputs in both send and receive directions. • Direct interface with TTL levels • Inputs accept voltages up to 5.5 V • Integrated 30 Ω termination resistors The 74LVC(H)162245A features two output enable (nOE) inputs for easy cascading and two send/receive (nDIR) inputs for direction control. nOE controls the outputs so that the buses are effectively isolated. This device can be used as two 8-bit transceivers or one 16-bit transceiver. • High-impedance when VCC = 0 V • All data inputs have bushold (74LVCH162245A only) • Complies with JEDEC standard no. 8-1A • ESD protection: HBM EIA/JESD22-A114-A exceeds 2000 V MM EIA/JESD22-A115-A exceeds 200 V. The 74LVCH162245A bushold data inputs eliminates the need for external pull-up resistors to hold unused inputs. The 74LVC(H)162245A is designed with 30 Ω series termination resistors in both HIGH and LOW output stages to reduce line noise. • Specified from −40 to +85 °C and −40 to +125 °C. QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C; tr = tf ≤ 2.5 ns. SYMBOL PARAMETER tPHL/tPLH propagation delay nAn to nBn; nBn to nAn CONDITIONS CL = 50 pF; VCC = 3.3 V TYPICAL UNIT 3.3 ns CI input capacitance 5.0 pF CI/O input/output capacitance 10 pF CPD power dissipation capacitance 28 pF VCC = 3.3 V; notes 1 and 2 Note 1. CPD is used to determine the dynamic power dissipation (PD in µW). PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in Volts; N = total load switching outputs; Σ(CL × VCC2 × fo) = sum of the outputs. 2. The condition is VI = GND to VCC. 2003 Dec 08 2 Philips Semiconductors Product specification 16-bit transceiver with direction pin; 30 Ω series termination resistors; 5 V tolerant input/output; 3-state 74LVC162245A; 74LVCH162245A FUNCTION TABLE See note 1. INPUT OUTPUT nOE nDIR nAn nBn L L A=B inputs L H inputs B=A H X Z Z Note 1. H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state. ORDERING INFORMATION PACKAGE TYPE NUMBER TEMPERATURE RANGE PINS PACKAGE MATERIAL CODE 74LVC162245ADL −40 to +125 °C 48 SSOP48 plastic SOT370-1 74LVCH162245ADL −40 to +125 °C 48 SSOP48 plastic SOT370-1 74LVC162245ADGG −40 to +125 °C 48 TSSOP48 plastic SOT362-1 74LVCH162245ADGG −40 to +125 °C 48 TSSOP48 plastic SOT362-1 2003 Dec 08 3 Philips Semiconductors Product specification 16-bit transceiver with direction pin; 30 Ω series termination resistors; 5 V tolerant input/output; 3-state PINNING SYMBOL SYMBOL PIN DESCRIPTION 74LVC162245A; 74LVCH162245A PIN DESCRIPTION 1A5 40 data input/output 1DIR 1 direction control input 1A4 41 data input/output n.c. − not connected 1A3 43 data input/output 1B0 2 data input/output 1A2 44 data input/output 1B1 3 data input/output 1A1 46 data input/output GND 4, 10, 15, 21, 28, ground (0 V) 34, 39, 45 1A0 47 data input/output 1OE 48 1B2 5 data input/output output enable input (active LOW) 1B3 6 data input/output VCC 7, 18, 31, 42 supply voltage 1B4 8 data input/output 1B5 9 data input/output 1DIR 1 48 1OE 1B0 2 47 1A0 1B1 3 46 1A1 1B6 11 data input/output 1B7 12 data input/output GND 4 45 GND 2B0 13 data input/output 1B2 5 44 1A2 2B1 14 data input/output 1B3 6 43 1A3 data input/output VCC 7 42 VCC 1B4 8 41 1A4 1B5 9 40 1A5 2B2 16 2B3 17 data input/output 2B4 19 data input/output GND 10 39 GND 2B5 20 data input/output 1B6 11 38 1A6 data input/output 1B7 12 2B6 22 2B7 23 data input/output 2DIR 24 direction control input 2OE 25 2A7 2A6 26 27 2B0 13 162245 37 1A7 36 2A0 2B1 14 35 2A1 GND 15 34 GND output enable input (active LOW) 2B2 16 33 2A2 2B3 17 32 2A3 data input/output VCC 18 31 VCC data input/output 2B4 19 30 2A4 2B5 20 29 2A5 GND 21 28 GND 2A5 29 data input/output 2A4 30 data input/output 2B6 22 27 2A6 2A3 32 data input/output 2B7 23 26 2A7 2DIR 24 25 2OE 2A2 33 data input/output 2A1 35 data input/output 2A0 36 data input/output 1A7 37 data input/output 1A6 38 data input/output 2003 Dec 08 001aaa156 Fig.1 Pin configuration SSOP48 and TSSOP48. 4 Philips Semiconductors Product specification 16-bit transceiver with direction pin; 30 Ω series termination resistors; 5 V tolerant input/output; 3-state handbook, full pagewidth 1DIR 1 2DIR 48 1A0 1A1 1A2 19 2A5 20 2A6 22 2A7 12 2B5 27 1B6 37 2B4 29 1B5 38 2B3 30 1B4 40 11 1A7 17 2A4 2B2 32 1B3 41 9 1A6 16 2A3 2B1 33 1B2 43 8 1A5 14 2A2 2B0 35 1B1 44 6 1A4 13 2A1 2OE 36 1B0 46 5 1A3 25 2A0 3 24 1OE 47 2 74LVC162245A; 74LVCH162245A 2B6 26 23 1B7 2B7 MNA708 Fig.2 Logic symbol. 2003 Dec 08 5 Philips Semiconductors Product specification 16-bit transceiver with direction pin; 30 Ω series termination resistors; 5 V tolerant input/output; 3-state handbook, halfpage 1OE 1DIR 48 1 25 2OE 24 2DIR 1A0 1A1 1A2 1A3 1A4 1A5 1A6 1A7 2A0 47 G3 3EN1 [BA] 3EN2 [AB] G6 6EN4 [BA] 6EN5 [AB] 2 1 2 46 3 44 5 43 6 41 8 40 9 38 11 37 12 36 13 4 1B0 1B1 handbook, halfpage 1B2 2A2 2A3 2A4 2A5 2A6 2A7 VCC 1B3 1B4 1B5 data input to internal circuit 1B6 1B7 2B0 MNA705 5 2A1 74LVC162245A; 74LVCH162245A 35 14 33 16 32 17 30 19 29 20 27 22 26 23 2B1 2B2 2B3 2B4 2B5 2B6 2B7 MNA709 Fig.3 Logic symbol (IEEE/IEC). 2003 Dec 08 Fig.4 Bushold circuit. 6 Philips Semiconductors Product specification 16-bit transceiver with direction pin; 30 Ω series termination resistors; 5 V tolerant input/output; 3-state 74LVC162245A; 74LVCH162245A RECOMMENDED OPERATING CONDITIONS SYMBOL VCC PARAMETER supply voltage VI input voltage VO output voltage Tamb ambient temperature tr, tf input rise and fall times CONDITIONS MIN. MAX. UNIT for maximum speed performance 2.7 3.6 V for low voltage applications 1.2 3.6 V 0 5.5 V output HIGH or LOW state 0 VCC V output 3-state 0 5.5 V in free air −40 +125 °C VCC = 1.2 to 2.7 V 0 20 ns/V VCC = 2.7 to 3.6 V 0 10 ns/V LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V). SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT VCC supply voltage −0.5 +6.5 V IIK input diode current VI < 0 − −50 mA VI input voltage note 1 −0.5 +6.5 V IOK output diode current VO > VCC or VO < 0 − ±50 mA VO output voltage output HIGH or LOW state; note 1 −0.5 VCC + 0.5 V output 3-state; note 1 −0.5 +6.5 V VO = 0 to VCC IO output source or sink current − ±50 mA ICC, IGND VCC or GND current − ±100 mA Tstg storage temperature −65 +150 °C Ptot power dissipation − 500 mW Tamb = −40 to +125 °C; note 2 Notes 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. Above 60 °C the value of Ptot derates linearly with 5.5 mW/K. 2003 Dec 08 7 Philips Semiconductors Product specification 16-bit transceiver with direction pin; 30 Ω series termination resistors; 5 V tolerant input/output; 3-state 74LVC162245A; 74LVCH162245A DC CHARACTERISTICS At recommended operating conditions; voltages are referenced to GND (ground = 0 V). TEST CONDITIONS SYMBOL PARAMETER MIN. OTHER TYP.(1) MAX. UNIT VCC (V) Tamb = −40 to +85 °C VIH VIL LOW-level input voltage VOH HIGH-level output voltage VOL 1.2 VCC − − V 2.7 to 3.6 2.0 − − V 1.2 − − GND V 2.7 to 3.6 − − 0.8 V IO = −100 µA 2.7 to 3.6 VCC − 0.2 VCC − V IO = −6 mA 2.7 VCC − 0.5 − − V IO = −12 mA 3.0 VCC − 0.8 − − V HIGH-level input voltage LOW-level output voltage VI = VIH or VIL VI = VIH or VIL IO = 100 µA 2.7 to 3.6 − 0 0.20 V IO = 6 mA 2.7 − − 0.40 V IO = 12 mA 3.0 − − 0.55 V ILI input leakage current VI = 5.5 V or GND; note 2 3.6 − ±0.1 ±5 µA IOZ 3-state output OFF-state current VI = VIH or VIL; VO = 5.5 V or GND; notes 2 and 3 3.6 − ±0.1 ±5 µA Ioff power-off leakage supply current VI or VO = 5.5 V 0.0 − ±0.1 ±10 µA ICC quiescent supply current VI = VCC or GND; IO = 0 3.6 − 0.1 20 µA ∆ICC additional quiescent supply VI = VCC − 0.6 V; current per input pin IO = 0 2.7 to 3.6 − 5 500 µA IBHL bushold LOW sustaining current VI = 0.8 V; notes 4 and 5 3.0 75 − − µA IBHH bushold HIGH sustaining current VI = 2.0 V; notes 4 and 5 3.0 −75 − − µA IBHLO bushold LOW overdrive current notes 4 and 6 3.6 500 − − µA IBHHO bushold HIGH overdrive current notes 4 and 6 3.6 −500 − − µA 2003 Dec 08 8 Philips Semiconductors Product specification 16-bit transceiver with direction pin; 30 Ω series termination resistors; 5 V tolerant input/output; 3-state TEST CONDITIONS SYMBOL PARAMETER MIN. OTHER 74LVC162245A; 74LVCH162245A TYP.(1) MAX. UNIT VCC (V) Tamb = −40 to +125 °C VIH VIL VOH VOL HIGH-level input voltage LOW-level input voltage HIGH-level output voltage LOW-level output voltage 1.2 VCC − − V 2.7 to 3.6 2.0 − − V 1.2 − − GND V 2.7 to 3.6 − − 0.8 V VI = VIH or VIL IO = −100 µA 2.7 to 3.6 VCC − 0.3 − − V IO = −6 mA 2.7 VCC − 0.65 − − V IO = −12 mA 3.0 VCC − 1 − − V IO = 100 µA 2.7 to 3.6 − − 0.3 IO = 6 mA 2.7 − − 0.6 IO = 12 mA VI = VIH or VIL V V 3.0 − − 0.8 V ILI input leakage current VI = 5.5 V or GND; note 2 3.6 − − ±20 µA IOZ 3-state output OFF-state current VI = VIH or VIL; VO = 5.5 V or GND; notes 2 and 3 3.6 − − ±20 µA Ioff power-off leakage supply current VI or VO = 5.5 V 0.0 − − ±20 µA ICC quiescent supply current VI = VCC or GND; IO = 0 3.6 − − 80 µA ∆ICC additional quiescent supply VI = VCC − 0.6 V; current per input pin IO = 0 2.7 to 3.6 − − 5000 µA IBHL bushold LOW sustaining current VI = 0.8 V; notes 4 and 5 3.0 60 − − µA IBHH bushold HIGH sustaining current VI = 2.0 V; notes 4 and 5 3.0 −60 − − µA IBHLO bushold LOW overdrive current notes 4 and 6 3.6 500 − − µA IBHHO bushold HIGH overdrive current notes 4 and 6 3.6 −500 − − µA Notes 1. All typical values are measured at VCC = 3.3 V and Tamb = 25 °C. 2. For bushold parts, the bushold circuit is switched off when VI > VCC allowing 5.5 V on the input terminal. 3. For I/O ports the parameter IOZ includes the input leakage current. 4. Valid for data inputs of bushold parts (LVCH162245A) only. For data inputs only, control inputs do not have a bushold circuit. 5. The specified sustaining current at the data input holds the input below the specified VI level. 6. The specified overdrive current at the data input forces the data input to the opposite logic input state. 2003 Dec 08 9 Philips Semiconductors Product specification 16-bit transceiver with direction pin; 30 Ω series termination resistors; 5 V tolerant input/output; 3-state 74LVC162245A; 74LVCH162245A AC CHARACTERISTICS GND = 0 V; tr = tf ≤ 2.5 ns. TEST CONDITIONS SYMBOL PARAMETER MIN. WAVEFORMS TYP.(1) MAX. UNIT VCC (V) Tamb = −40 to +85 °C tPHL/tPLH tPZH/tPZL tPHZ/tPLZ propagation delay nAn to nBn; nBn to nAn 3-state output enable time nOE to nAn; nOE to nBn 3-state output disable time nOE to nAn; nOE to nBn see Figs 5 and 7 see Figs 6 and 7 see Figs 6 and 7 1.2 − 12 − 2.7 1.0 4.2 6.7 ns 3.0 to 3.6 1.0 3.3(2) 5.7 ns 1.2 − 18 − ns 2.7 1.5 5.1 8.5 ns 3.0 to 3.6 1.0 3.4(2) 7.5 ns 1.2 − 10 − ns 2.7 1.5 3.5 7.5 ns 3.0 to 3.6 1.5 3.3(2) 6.5 ns ns Tamb = −40 to +125 °C tPHL/tPLH tPZH/tPZL tPHZ/tPLZ propagation delay nAn to nBn; nBn to nAn 3-state output enable time nOE to nAn; nOE to nBn 3-state output disable time nOE to nAn; nOE to nBn see Figs 5 and 7 see Figs 6 and 7 see Figs 6 and 7 1.2 − − − ns 2.7 1.0 − 8.5 ns 3.0 to 3.6 1.0 − 9.5 ns 1.2 − − − ns 2.7 1.5 − 7.5 ns 3.0 to 3.6 1.0 − 9.5 ns 1.2 − − − ns 2.7 1.5 − 11.0 ns 3.0 to 3.6 1.5 − 8.5 ns Notes 1. All typical values are measured at Tamb = 25 °C. 2. These typical values are measured at VCC = 3.3 V and Tamb = 25 °C. 2003 Dec 08 10 Philips Semiconductors Product specification 16-bit transceiver with direction pin; 30 Ω series termination resistors; 5 V tolerant input/output; 3-state 74LVC162245A; 74LVCH162245A AC WAVEFORMS handbook, halfpage VI nAn, nBn input VM GND t PHL t PLH VOH nBn, nAn output VM VOL MNA477 INPUT VCC VM VI tr = tf 1.2 V 0.5 × VCC VCC ≤ 2.5 ns 2.7 V 1.5 V 2.7 V ≤ 2.5 ns 3.0 to 3.6 V 1.5 V 2.7 V ≤ 2.5 ns VOL and VOH are typical output voltage drop that occur with the output load. Fig.5 The input (nAn, nBn) to outputs (nBn, nAn) propagation delays. 2003 Dec 08 11 Philips Semiconductors Product specification 16-bit transceiver with direction pin; 30 Ω series termination resistors; 5 V tolerant input/output; 3-state 74LVC162245A; 74LVCH162245A VI handbook, full pagewidth nOE input VM GND tPLZ tPZL VCC output LOW-to-OFF OFF-to-LOW VM VX VOL tPHZ tPZH VOH VY output HIGH-to-OFF OFF-to-HIGH GND VM outputs enabled outputs disabled outputs enabled MNA362 INPUT VCC VM VI tr = tf 1.2 V 0.5 × VCC VCC ≤ 2.5 ns 2.7 V 1.5 V 2.7 V ≤ 2.5 ns 3.0 to 3.6 V 1.5 V 2.7 V ≤ 2.5 ns VX = VOL + 0.3 V at VCC ≥ 2.7 V; VX = VOL + 0.1 V at VCC < 2.7 V; VY = VOH − 0.3 V at VCC ≥ 2.7 V; VY = VOH − 0.1 V at VCC < 2.7 V. VOL and VOH are typical output voltage drop that occur with the output load. Fig.6 3-state enable and disable times. 2003 Dec 08 12 Philips Semiconductors Product specification 16-bit transceiver with direction pin; 30 Ω series termination resistors; 5 V tolerant input/output; 3-state VEXT handbook, full pagewidth VCC VI PULSE GENERATOR RL VO D.U.T. CL RT RL MNA616 VCC VI CL RL Ω(1) VEXT tPLH/tPHL tPZH/tPHZ tPZL/tPLZ open GND 2 × VCC 1.2 V VCC 50 pF 500 2.7 V 2.7 V 50 pF 500 Ω open GND 2 × VCC 3.0 to 3.6 V 2.7 V 50 pF 500 Ω open GND 2 × VCC Note 1. The circuit performs better when RL = 1000 Ω. Definitions for test circuits: RL = Load resistor. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to the output impedance Zo of the pulse generator. Fig.7 Load circuitry for switching times. 2003 Dec 08 13 74LVC162245A; 74LVCH162245A Philips Semiconductors Product specification 16-bit transceiver with direction pin; 30 Ω series termination resistors; 5 V tolerant input/output; 3-state 74LVC162245A; 74LVCH162245A PACKAGE OUTLINES SSOP48: plastic shrink small outline package; 48 leads; body width 7.5 mm SOT370-1 D E A X c y HE v M A Z 25 48 Q A2 A1 A (A 3) θ pin 1 index Lp L 24 1 detail X w M bp e 0 5 10 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) θ mm 2.8 0.4 0.2 2.35 2.20 0.25 0.3 0.2 0.22 0.13 16.00 15.75 7.6 7.4 0.635 10.4 10.1 1.4 1.0 0.6 1.2 1.0 0.25 0.18 0.1 0.85 0.40 8 o 0 Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT370-1 2003 Dec 08 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 MO-118 14 o Philips Semiconductors Product specification 16-bit transceiver with direction pin; 30 Ω series termination resistors; 5 V tolerant input/output; 3-state 74LVC162245A; 74LVCH162245A TSSOP48: plastic thin shrink small outline package; 48 leads; body width 6.1 mm SOT362-1 E D A X c HE y v M A Z 48 25 Q A2 (A 3) A1 pin 1 index A θ Lp L 1 detail X 24 w M bp e 2.5 0 5 mm scale DIMENSIONS (mm are the original dimensions). UNIT A max. A1 A2 A3 bp c D (1) E (2) e HE L Lp Q v w y Z θ mm 1.2 0.15 0.05 1.05 0.85 0.25 0.28 0.17 0.2 0.1 12.6 12.4 6.2 6.0 0.5 8.3 7.9 1 0.8 0.4 0.50 0.35 0.25 0.08 0.1 0.8 0.4 8 o 0 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT362-1 2003 Dec 08 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 MO-153 15 o Philips Semiconductors Product specification 16-bit transceiver with direction pin; 30 Ω series termination resistors; 5 V tolerant input/output; 3-state 74LVC162245A; 74LVCH162245A DATA SHEET STATUS LEVEL DATA SHEET STATUS(1) PRODUCT STATUS(2)(3) Development DEFINITION I Objective data II Preliminary data Qualification This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. III Product data This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Production This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. Notes 1. Please consult the most recently issued data sheet before initiating or completing a design. 2. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. 3. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. DEFINITIONS DISCLAIMERS Short-form specification The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Life support applications These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Limiting values definition Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Right to make changes Philips Semiconductors reserves the right to make changes in the products including circuits, standard cells, and/or software described or contained herein in order to improve design and/or performance. When the product is in full production (status ‘Production’), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Application information Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. 2003 Dec 08 16 Philips Semiconductors – a worldwide company Contact information For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825 For sales offices addresses send e-mail to: [email protected]. SCA75 © Koninklijke Philips Electronics N.V. 2003 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands R20/05/pp17 Date of release: 2003 Dec 08 Document order number: 9397 750 12263