1-A Quad-HBD (Quad-Half-Bridge Driver) TLE 4208 Overview Features • • • • • • • • • • • • • • Driver for up to 3 motors Delivers up to 0.8 A continuous Optimized for DC motor management applications Very low current consumption in stand-by (Inhibit) mode P-DSO-28-6 Low saturation voltage; typ.1.2 V total @ 25 °C; 0.4 A Output protected against short circuit Error flag diagnosis Overvoltage lockout and diagnosis Undervoltage lockout CMOS/TTL compatible inputs with hysteresis No crossover current Internal clamp diodes Overtemperature protection with hysteresis and diagnosis Enhanced power P-DSO-Package Type Ordering Code Package TLE 4208 G Q67007-A9335 P-DSO-28-6 Description The TLE 4208 is a fully protected Quad-Half-Bridge-Driver designed specially for automotive and industrial motion control applications. The part is built using the Siemens bipolar high voltage power technology DOPL. In a cascade configuration up to three actuators (DC motors) can be connected between the four half-bridges. These four half-bridges are configured as 2 dual-half-bridges, which are supplied and controlled separately. Operation modes forward (cw), reverse (ccw), brake and high impedance are invoked from a standard interface. The standard enhanced power P-DSO-28 package meets the application requirements and saves PCB-board space and costs. Furthermore the built-in features like diagnosis, over- and undervoltage-lockout, shortcircuit protection, over-temperature protection and the very low quiescent current in stand-by mode will open a wide range of automotive and industrial applications. Semiconductor Group 1 1998-06-03 TLE 4208 GND EF12 IN1 N.C. OUT1 GND GND GND GND OUT3 N.C. IN3 INH 34 GND 1 2 3 4 5 6 7 TLE 4208 G 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 N.C. INH12 IN2 V S12 OUT2 GND GND GND GND OUT4 V S34 IN4 EF 34 N.C. AEP02349 Figure 1 Pin Configuration (top view) Semiconductor Group 2 1998-06-03 TLE 4208 Pin Definitions and Functions Pin No. Symbol Function 1, 6, 7, 8, 9, GND 14, 20, 21, 22, 23 Ground; negative reference potential for blocking capacitor 2 EF12 Error Flag output of half-bridges 1and 2; open collector; low = error 3 IN1 Input channel of half-bridge 1; controls OUT1 4, 11, 15, 28 N.C. Not connected 5 OUT1 Power output of half-bridge 1; full short circuit protected; with integrated clamp diodes 10 OUT3 Power output of half-bridge 3; full short-circuit protected; with integrated clamp diodes 12 IN3 Input channel of half-bridge 3; controls OUT3 13 INH34 Inhibit input of half-bridges 3 and 4; low = half-bridges 3 and 4 in stand-by 16 EF34 Error Flag output of half-bridges 3 and 4; open collector; low = error 17 IN4 Input channel of half-bridge 4; controls OUT4 18 VS34 Power supply voltage of half-bridges 3 and 4; positive reference potential for blocking capacitor 19 OUT4 Power output of half-bridge 4; full short circuit protected; with integrated clamp diodes 24 OUT2 Power-output of half-bridge 2; full short circuit protected; with integrated clamp diodes 25 VS12 Power supply voltage of half-bridges 1 and 2; positive reference potential for blocking capacitor 26 IN2 Input channel of half-bridge 2; controls OUT2 27 INH12 Inhibit input of half-bridges 1and 2; low = half-bridges 1 and 2 in stand-by Semiconductor Group 3 1998-06-03 TLE 4208 TLE 4208 G INH 12 27 25 V S12 Inhibit 1,2 DRV1 EF 12 IN1 IN2 2 3 26 5 Fault-Detection 1,2 INH 12 0 1 1 1 1 IN1 IN2 OUT1 OUT2 X 0 0 1 1 X 0 1 0 1 Z L L H H Z L H L H OUT1 DRV2 24 OUT2 1,6,7,8, 9,14, GND INH 34 13 Inhibit 3,4 DRV3 EF 34 IN3 IN4 16 12 17 10 Fault-Detection 3,4 INH 34 0 1 1 1 1 20,21, 22,23 IN3 IN4 OUT3 OUT4 X 0 0 1 1 X 0 1 0 1 Z L L H H Z L H L H OUT3 DRV4 19 18 OUT4 V S34 AEB02350 Figure 2 Block Diagram Semiconductor Group 4 1998-06-03 TLE 4208 Input Logic Functional Truth Table of Halfbridge 1 and 2 INH12 IN1 IN2 OUT1 OUT2 Mode 0 X X Z Z Stand-By 1 1 1 1 0 0 1 1 0 1 0 1 L L H H L H L H Brake LL CW CCW Brake HH Note: Half-Bridge 1 and 2 connected to a full-bridge Functional Truth Table of Half-Bridge 3 and 4 INH34 IN3 IN4 OUT3 OUT4 Mode 0 X X Z Z Stand-By 1 1 1 1 0 0 1 1 0 1 0 1 L L H H L H L H Brake LL CW CCW Brake HH IN: 0 = Logic LOW 1 = Logic HIGH X = don’t care OUT: Z = Output in tristate condition L = Output in sink condition H = Output in source condition Note: Half-Bridge 3 and 4 connected to a full-bridge Diagnosis EF12 EF34 Error 1 0 0 1 1 0 0 1 1 1 0 0 0 0 no error over temperature of half-bridge 1 and 2 or over voltage of half-bridge 1 and 2 over temperature of half-bridge 3 and 4 or over voltage of half-bridge 3 and 4 over temperature of all half-bridges or over voltage of all half-bridges Semiconductor Group 5 1998-06-03 TLE 4208 Electrical Characteristics Absolute Maximum Ratings Parameter Symbol Limit Values Unit Remarks min. max. VS12, VS34 VS12, VS34 VI – 0.3 45 V – –1 – V –5 20 V t < 0.5 s; IS12, IS34 > – 2 A 0V < VS12, VS34 < 45 V VEF12, VEF34 – 0.3 20 V 0 V < VS12, VS34 < 45 V IOUT1-4 IOUT1-4 IOUT1-4 IEF12-34 – – A internally limited – – A internally limited –1 1 A – –2 5 mA – Tj Tstg – 40 150 °C – – 50 150 °C – Rthj-pin RthjA – 25 K/W measured to pin 7 – 65 K/W – Voltages Supply voltage Supply voltage Logic input voltages (IN1; IN2; INH12; IN3; IN4; INH34) Logic output voltage (EF12; EF34) Currents Output current (cont.) Output current (peak) Output current (diode) Output current (EF) Temperatures Junction temperature Storage temperature Thermal Resistances Junction pin Junction ambient Note: Maximum ratings are absolute ratings; exceeding any one of these values may cause irreversible damage to the integrated circuit. Semiconductor Group 6 1998-06-03 TLE 4208 Operating Range Parameter Symbol Limit Values min. VS12, VS34 Supply voltage increasing VS12, VS34 Supply voltage decreasing VS12, VS34 Logic input voltages VI Supply voltage Unit Remarks V After VS12, VS34 rising above VUV ON max. VUV OFF 18 – 0.3 VUV ON V Outputs in tristate – 0.3 VUV OFF V Outputs in tristate –2 18 V – – 40 150 °C – (IN1; IN2; INH12; IN3; IN4; INH34) Junction temperature Tj Note: In the operating range the functions given in the circuit description are fulfilled. Semiconductor Group 7 1998-06-03 TLE 4208 Electrical Characteristics 8 V < VS12 = VS34 < 18 V; INH12 = INH34 = HIGH; IOUT1-4 = 0 A; – 40 °C < Tj < 150 °C; unless otherwise specified Parameter Symbol Limit Values Unit Test Condition min. typ. max. – – 100 µA – 20 40 µA Current Consumption INH12 = INH34 = LOW Quiescent current Quiescent current IS IS IS = IS12 + IS34 IS = IS12 + IS34; VS12 = VS34 = 13.2 V; Tj = 25 °C INH12 = HIGH and INH34 = LOW or INH12 = LOW and INH34 = HIGH 10 20 mA – Supply current IS12, IS34 – IS12, IS34 – – 30 mA Supply current IS12, IS34 – – 50 mA IOUT1/3 = 0.4 A IOUT2/4 = – 0.4 A IOUT1/3 = 0.8 A IOUT2/4 = – 0.8 A 6.5 7.5 V Supply current Over- and Under Voltage Lockout UV Switch ON voltage VUV ON – VS12, VS34 increasing UV Switch OFF voltage VUV OFF 5 6 – V VS12, VS34 decreasing UV ON/OFF hysteresis OV Switch OFF voltage VUV HY VOV OFF – 0.5 – V – 20 24 V VUV ON – VUV OFF VS12, VS34 increasing OV Switch ON voltage VOV ON 18 19.5 – V VS12, VS34 decreasing OV ON/OFF hysteresis Semiconductor Group VOV HY – 0.5 8 – V VOV OFF – VOV ON 1998-06-03 TLE 4208 Electrical Characteristics (cont’d) 8 V < VS12 = VS34 < 18 V; INH12 = INH34 = HIGH; IOUT1-4 = 0 A; – 40 °C < Tj < 150 °C; unless otherwise specified Parameter Symbol Limit Values min. typ. max. Unit Test Condition Outputs OUT1; OUT2; OUT 3; OUT 4 Saturation Voltages Source (upper) IOUT12, IOUT34 = – 0.2 A VSAT U – 0.85 1.15 V Tj = 25 °C Source (upper) IOUT12, IOUT34 = – 0.4 A VSAT U – 0.90 1.20 V Tj = 25 °C Sink (upper) IOUT12, IOUT34 = – 0.8 A VSAT U – 1.10 1.50 V Tj = 25 °C Sink (lower) IOUT12, IOUT34 = 0.2 A VSAT L – 0.15 0.23 V Tj = 25 °C Sink (lower) IOUT12, IOUT34 = 0.4 A VSAT L – 0.25 0.40 V Tj = 25 °C Sink (lower) IOUT12, IOUT34 = 0.8 A VSAT L – 0.45 0.75 V Tj = 25 °C Total Drop IOUT12, IOUT34 = 0.2 A VSAT – 1 1.4 V VSAT = VSAT U + VSAT L Total Drop IOUT12, IOUT34 = 0.4 A VSAT – 1.2 1.7 V VSAT = VSAT U + VSAT L Total Drop IOUT12, IOUT34 = 0.8 A VSAT – 1.6 2.5 V VSAT = VSAT U + VSAT L VFU ILKU VFL – 1 1.5 V – – 5 mA – 0.9 1.4 V IF = 0.4 A IF = 0.4 A1) IF = 0.4 A Clamp Diodes Forward voltage; upper Upper leakage current Forward voltage; lower Notes see page 11. Semiconductor Group 9 1998-06-03 TLE 4208 Electrical Characteristics (cont’d) 8 V < VS12 = VS34 < 18 V; INH12 = INH34 = HIGH; IOUT1-4 = 0 A; – 40 °C < Tj < 150 °C; unless otherwise specified Parameter Symbol Limit Values Unit Test Condition min. typ. max. VIH VIL VIHY IIH IIL – 2.0 3.0 V – 1.0 1.5 – V – – 0.5 – V – –2 – 10 µA – 100 – 20 – 5 µA VI = 5 V VI = 0 V VIH VIL VIHY IIH IIL – 2.7 3.5 V – 1.0 2.0 – V – – 0.7 – V – – 100 250 µA – 10 – 10 µA VINH = 5 V VINH = 0 V VEFL IEFLK – 0.2 0.4 V – – 10 µA Input Interface Logic Inputs IN1; IN2; IN3; IN4 H-input voltage L-input voltage Hysteresis of input voltage H-input current L-input current Logic Inputs INH12; INH34 H-input voltage L-input voltage Hysteresis of input voltage H-input current L-input current Error-Flags EF12; EF34 L-output voltage level Leakage current Semiconductor Group 10 IEF = 2 mA 0 V < VEF < 7 V 1998-06-03 TLE 4208 Electrical Characteristics (cont’d) 8 V < VS12 = VS34 < 18 V; INH12 = INH34 = HIGH; IOUT1-4 = 0 A; – 40 °C < Tj < 150 °C; unless otherwise specified Parameter Symbol Limit Values min. typ. max. Unit Test Condition Thermal Shutdown Thermal shutdown junction temperature TjSD 150 175 200 °C – Thermal switch-on junction temperature TjSO 120 – 170 °C – Temperature hysteresis ∆T – 30 – K – 1) Guaranteed by design. Note: The listed characteristics are ensured over the operating range of the integrated circuit. Typical characteristics specify mean values expected over the production spread. If not otherwise specified, typical characteristics apply at TA = 25 °C and the given supply voltage. Semiconductor Group 11 1998-06-03 TLE 4208 Watchdog In Watchdog Out Reset Out 1 WDO WDI R V CC TLE 4278 G 2 14 Q R QA 10 k Ω 13 8 9 D1 1N4001 Watchdog Adjust 6 3,4,5,10,11,12 7 D R QB 10 k Ω VS = 12 V Input CQ 22 µF GND Reset Adjust CD 100 nF R WA 100 k Ω CΙ CS 100 nF 22 µF TLE 4208 G INH12 4 28 V S12 Inhibit 1,2 DRV1 EF12 25 IN1 24 IN2 5 µC 27 OUT1 Fault-Detection 1,2 INH12 0 1 1 1 1 IN1 IN2 OUT1 OUT2 X 0 0 1 1 INH34 18 X 0 1 0 1 Z L L H H 1 Z L H L H OUT2 6,7,8,9, Inhibit 3,4 DRV3 EF34 11 IN3 10 IN4 19 IN3 0 1 1 1 1 X 0 0 1 1 IN4 OUT3 OUT4 X 0 1 0 1 Z L L H H GND 20,21, 22,23 13 OUT3 Fault-Detection 3,4 INH34 M1 DRV2 Z L H L H M2 DRV4 15 OUT4 14 V S34 AES02351 Figure 3 Application Circuit 1 (Device is used as Dual-Full-Bridge-Driver) Semiconductor Group 12 1998-06-03 TLE 4208 Diagrams Quiescent current IS over Temperature Saturation Voltage of Source VSAT U over Temperature AED02352 50 AED02308 1500 V SAT U VS = 14 V µA 1250 Ι S 40 Ι OUT = 800 mA mV 30 1000 Ι OUT = 400 mA 750 Ι OUT = 200 mA VS = 18 V VS = 13.2 V 20 500 VS = 8 V 10 250 0 -50 50 0 0 -50 100 C 150 Tj V SAT L 50 100 ˚C 150 Tj Saturation Voltage of Sink VSAT L over Temperature Total Drop at outputs VSAT over Temperature AED02309 1000 0 AED02310 2000 V SAT VS = 14 V VS = 14 V mV mV 750 1500 Ι OUT = 800 mA Ι OUT = 400 mA Ι OUT = 800 mA 500 Ι OUT = 200 mA 1000 Ι OUT = 400 mA 500 250 Ι OUT = 200 mA 0 -50 0 50 0 -50 100 ˚C 150 50 100 ˚C 150 Tj Tj Semiconductor Group 0 13 1998-06-03 TLE 4208 Package Outlines 0.35 x 45˚ 7.6 -0.2 1) 0.23 +0.0 9 8˚ ma x 2.65 max 2.45 -0.2 0.2 -0.1 P-DSO-28-6 (Plastic Dual Small Outline Package) 0.4 +0.8 1.27 0.35 +0.15 2) 0.1 0.2 28x 28 1 10.3 ±0.3 15 18.1 -0.4 1) 14 Index Marking 1) Does not include plastic or metal protrusions of 0.15 max rer side 2) Does not include dambar protrusion of 0.05 max per side Sorts of Packing Package outlines for tubes, trays etc. are contained in our Data Book “Package Information”. SMD = Surface Mounted Device Semiconductor Group 14 GPS05123 Dimensions in mm 1998-06-03