INFINEON TLE4207

1-A Dual-HBD (Dual-Half-Bridge Driver)
TLE 4207
Overview
Features
• Delivers up to 0.8 A continuous
• Optimized for DC motor management applications
• Very low current consumption
in stand-by (Inhibit) mode
• Low saturation voltage; typ.1.2 V total @ 25 °C; 0.4 A
• Output protected against short circuit
• Error flag diagnosis
• Overvoltage lockout and diagnosis
• Undervoltage lockout
• CMOS/TTL compatible inputs with hysteresis
• No crossover current
• Internal clamp diodes
• Overtemperature protection with hysteresis
and diagnosis
• Enhanced power P-DSO-Package
P-DSO-14-4
P-DSO-20-6
Type
Ordering Code
Package
TLE 4207 G
Q67006-A9275
P-DSO-14-4
TLE 4207 GL
on request
P-DSO-20-6
Description
The TLE 4207 is a fully protected Dual-Half-Bridge-Driver designed specially for
automotive and industrial motion control applications.
The part is built using the Siemens bipolar high voltage power technology DOPL.
The actuator (DC motor) can be connected direct between the halfbridges. Operation
modes forward (cw), reverse (ccw), brake and high impedance are invoked from a
standard interface. The standard enhanced power P-DSO-14 package meets the
application requirements and saves PCB-board space and costs.
Furthermore the built in features like diagnosis, over- and undervoltage-lockout, shortcircuit-protection, over-temperature-protection and the very low quiescent current in
stand-by mode will open a wide range of automotive and industrial applications.
Semiconductor Group
1
1998-02-01
TLE 4207
VS
OUT2
GND
GND
GND
IN2
INH
1
14
2
13
3
12
TLE
4
11
4207G
5
10
6
9
7
8
VS
OUT2
N.C.
GND
GND
GND
GND
N.C.
IN2
INH
N.C.
OUT1
GND
GND
GND
IN1
EF
AEP02303
1
2
3
4
5
6
7
8
9
10
TLE
4207GL
20
19
18
17
16
15
14
13
12
11
N.C.
OUT1
N.C.
GND
GND
GND
GND
N.C.
IN1
EF
AEP02304
Figure 1
Pin Configuration (top view)
Pin Definitions and Functions
Pin No.
Pin No.
Symbol Function
P-DSO-14-4 P-DSO-20-6
1
1
VS
Power supply voltage;
positive reference potential for blocking capacitor
2
2
OUT2
Power-output 2; full short circuit protected;
with integrated clamp diodes
3, 4, 5,
10, 11, 12
4, 5, 6, 7,
14, 15, 16,
17
GND
Ground;
negative reference potential for blocking
capacitor
6
9
IN2
Input channel 2; controls OUT2 (not inverted)
7
10
INH
Inhibit input; low = IC in stand-by
8
11
EF
Error Flag output; open collector; low = error
9
12
IN1
Input channel 1; controls OUT1 (not inverted)
13
19
OUT1
Power output 1; full short circuit protected;
with integrated clamp diodes
14
3, 8,
13, 18, 20
N.C.
Not connected
Semiconductor Group
2
1998-02-01
TLE 4207
VS
1
INH
7
Inhibit
DRV1
EF
IN1
IN2
8
9
6
13
Fault-Detection
INH
0
1
1
1
1
IN1
X
0
0
1
1
IN2
X
0
1
0
1
OUT1 OUT2
Z
Z
L
L
L
H
H
L
H
H
Figure 2
DRV2
2
3, 4, 5,
10, 11, 12
GND
TLE 4207G
OUT1
OUT2
AEB02080
Block Diagram
Semiconductor Group
3
1998-02-01
TLE 4207
Functional Truth Table
INH
IN1
IN2
OUT1
OUT2
Mode
0
X
X
Z
Z
Stand-By
1
1
1
1
0
0
1
1
0
1
0
1
L
L
H
H
L
H
L
H
Brake LL
CW
CCW
Brake HH
IN: 0 = Logic LOW
1 = Logic HIGH
X = don’t care
OUT: Z = Output in tristate condition
L = Output in sink condition
H = Output in source condition
Diagnosis
EF
Error
1
0
0
no error
over temperature
over voltage
Semiconductor Group
4
1998-02-01
TLE 4207
Electrical Characteristics
Absolute Maximum Ratings
Parameter
Symbol
Limit Values
Unit
Remarks
min.
max.
VS
VS
VI
– 0.3
45
V
–
–1
–
V
–5
20
V
t < 0.5 s; IS > – 2 A
0 V < VS < 45 V
VEF
– 0.3
20
V
0 V < VS < 45 V
IOUT1-2
IOUT1-2
IOUT1-2
IOUT1-2
–
–
A
internally limited
–
–
A
internally limited
–1
1
A
–
–2
5
mA
–
Tj
Tstg
– 40
150
°C
–
– 50
150
°C
–
Rthj-pin
RthjA
–
25
K/W
measured to pin 5
–
65
K/W
–
Voltages
Supply voltage
Supply voltage
Logic input voltages
(IN1; IN2; INH)
Logic output voltage (EF)
Currents
Output current (cont.)
Output current (peak)
Output current (diode)
Output current (EF)
Temperatures
Junction temperature
Storage temperature
Thermal Resistances
Junction pin
Junction ambient
Note: Maximum ratings are absolute ratings; exceeding any one of these values may
cause irreversible damage to the integrated circuit.
Semiconductor Group
5
1998-02-01
TLE 4207
Operating Range
Parameter
Symbol
Limit Values
min.
VS
VUV OFF 18
Supply voltage increasing
VS
VS
VI
– 0.3
Tj
Logic input voltage
(IN1; IN2; INH)
Junction temperature
Remarks
V
After VS rising
above VUV ON
max.
Supply voltage
Supply voltage decreasing
Unit
Outputs in tristate
– 0.3
VUV ON V
VUV OFF V
–2
18
V
–
– 40
150
°C
–
Outputs in tristate
Note: In the operating range the functions given in the circuit description are fulfilled.
Semiconductor Group
6
1998-02-01
TLE 4207
Electrical Characteristics
8 V < VS < 18 V; INH = High; IOUT1-2 = 0 A; – 40 °C < Tj < 150 °C;
unless otherwise specified
Parameter
Symbol
Limit Values
Unit Test Condition
min.
typ. max.
IS
IS
–
20
50
µA
INH = LOW
–
20
30
µA
INH = LOW;
VS = 13.2 V;
Tj = 25 °C
–
10
20
mA
–
Supply current
IS
IS
–
–
30
mA
Supply current
IS
–
–
50
mA
IOUT1 = 0.4 A
IOUT2 = – 0.4 A
IOUT1 = 0.8 A
IOUT2 = – 0.8 A
–
6.5
7.5
V
5.0
6
–
V
–
0.5
–
V
–
20
24
V
18.0
19.5 –
V
–
0.5
V
Current Consumption
Quiescent current
Quiescent current
Supply current
Over- and Under Voltage Lockout
UV Switch ON voltage
UV Switch OFF voltage
UV ON/OFF hysteresis
OV Switch OFF voltage
OV Switch ON voltage
OV ON/OFF hysteresis
Semiconductor Group
VUV ON
VUV OFF
VUV HY
VOV OFF
VOV ON
VOV HY
7
–
VS increasing
VS decreasing
VUV ON – VUV OFF
VS increasing
VS decreasing
VOV OFF – VOV ON
1998-02-01
TLE 4207
Electrical Characteristics (cont’d)
8 V < VS < 18 V; INH = High; IOUT1-2 = 0 A; – 40 °C < Tj < 150 °C;
unless otherwise specified
Parameter
Symbol
Limit Values
min.
typ. max.
Unit Test Condition
Outputs OUT1-2
Saturation Voltages
Source (upper)
IOUT = – 0.2 A
VSAT U
–
0.85 1.15
V
Tj = 25 °C
Source (upper)
IOUT = – 0.4 A
VSAT U
–
0.90 1.20
V
Tj = 25 °C
Sink (upper)
IOUT = – 0.8 A
VSAT U
–
1.10 1.50
V
Tj = 25 °C
Sink (lower)
IOUT = 0.2 A
VSAT L
–
0.15 0.23
V
Tj = 25 °C
Sink (lower)
IOUT = 0.4 A
VSAT L
–
0.25 0.40
V
Tj = 25 °C
Sink (lower)
IOUT = 0.8 A
VSAT L
–
0.45 0.75
V
Tj = 25 °C
VSAT
VSAT
VSAT
–
1
1.4
V
–
1.2
1.7
V
–
1.6
2.5
V
VSAT = VSAT U + VSAT L
VSAT = VSAT U + VSAT L
VSAT = VSAT U + VSAT L
VFU
ILKU
VFL
–
1
1.5
V
–
–
5
mA
–
0.9
1.4
V
Total Drop
Total Drop
Total Drop
IOUT = 0.2 A
IOUT = 0.4 A
IOUT = 0.8 A
Clamp Diodes
Forward voltage; upper
Upper leakage current
Forward voltage; lower
IF = 0.4 A
IF = 0.4 A1)
IF = 0.4 A
Notes see page 10.
Semiconductor Group
8
1998-02-01
TLE 4207
Electrical Characteristics (cont’d)
8 V < VS < 18 V; INH = High; IOUT1-2 = 0 A; – 40 °C < Tj < 150 °C;
unless otherwise specified
Parameter
Symbol
Limit Values
Unit Test Condition
min.
typ. max.
VIH
VIL
VIHY
IIH
IIL
–
2
3
V
–
1
1.5
–
V
–
–
0.5
–
V
–
–2
–
10
µA
– 100 – 20 – 5
µA
VI = 5 V
VI = 0 V
VIH
VIL
VIHY
IIH
IIL
–
2.7
3.5
V
–
1
2
–
V
–
–
0.7
–
V
–
–
100 250
µA
– 10
–
10
µA
VINH = 5 V
VINH = 0 V
VEFL
IEFLK
–
0.2
0.4
V
–
–
10
µA
Input-Interface
Logic Inputs IN1; IN2
H-input voltage
L-input voltage
Hysteresis of input voltage
H-input current
L-input current
Logic Input INH
H-input voltage
L-input voltage
Hysteresis of input voltage
H-input current
L-input current
Error-Flag EF
L-output voltage level
Leakage current
Semiconductor Group
9
IEF = 2 mA
0 V < VEF < 7 V
1998-02-01
TLE 4207
Electrical Characteristics (cont’d)
8 V < VS < 18 V; INH = High; IOUT1-2 = 0 A; – 40 °C < Tj < 150 °C;
unless otherwise specified
Parameter
Symbol
Limit Values
min.
typ. max.
Unit Test Condition
Thermal Shutdown
Thermal shutdown junction
temperature
TjSD
150
175 200
°C
–
Thermal switch-on junction
temperature
TjSO
120
–
170
°C
–
Temperature hysteresis
∆T
–
30
–
K
–
1)
Guaranteed by design.
Note: The listed characteristics are ensured over the operating range of the integrated
circuit. Typical characteristics specify mean values expected over the production
spread. If not otherwise specified, typical characteristics apply at TA = 25 °C and
the given supply voltage.
Semiconductor Group
10
1998-02-01
TLE 4207
Watchdog
Reset
Q
RQ
10 k Ω
WD
D
CQ
22 µF
I
TLE 4268G
CD
100 nF
DO1
1N4001
GND
VS = 12 V
CS
22 µF
R VCC
VS
1
INH 7
Inhibit
DRV1
EF 8
13 OUT1
Fault-Detection
µP
M1
IN1 9
IN2 6
INH
0
1
1
1
1
IN1
X
0
0
1
1
IN2
X
0
1
0
1
OUT1 OUT2
Z
Z
L
L
L
H
H
L
H
H
DRV2
2 OUT2
3, 4, 5,
10, 11, 12
TLE 4207G
GND
Figure 3
AES02081
Application Circuit
Semiconductor Group
11
1998-02-01
TLE 4207
Diagrams
Quiescent current IS
over Temperature
ΙS
Saturation Voltage of Source VSAT U
over Temperature
AED02307
50
AED02308
1500
V SAT U
µA
VS = 14 V
1250
Ι OUT = 800 mA
40
mV
1000
Ι OUT = 400 mA
750
Ι OUT = 200 mA
30
20
500
V S = 18 V
V S = 13.2 V
10
250
VS = 8 V
0
-50
0
50
0
-50
100 ˚C 150
0
50
Tj
Tj
Saturation Voltage of Sink VSAT L
over Temperature
V SAT L
Total Drop at outputs VSAT
over Temperature
AED02309
1000
100 ˚C 150
AED02310
2000
V SAT
VS = 14 V
VS = 14 V
mV
mV
750
1500
Ι OUT = 800 mA
Ι OUT = 400 mA
Ι OUT = 800 mA
500
Ι OUT = 200 mA
1000
Ι OUT = 400 mA
500
250
Ι OUT = 200 mA
0
-50
0
50
0
-50
100 ˚C 150
50
100 ˚C 150
Tj
Tj
Semiconductor Group
0
12
1998-02-01
TLE 4207
Package Outlines
P-DSO-14-4
(Plastic Dual Small Outline Package)
1.27
0.1
0.35 +0.15 2)
8˚ max.
4 -0.2
0.19 +0.06
1.75 max
1.45 -0.2
0.2 -0.1
0.35 x 45˚
1)
0.4 +0.8
0.2 14x
6 ±0.2
14
8
1
7
8.75 -0.21)
Index Marking
1) Does not include plastic or metal protrusion of 0.15 max. per side
2) Does not include dambar protrusion of 0.05 max. per side
Sorts of Packing
Package outlines for tubes, trays etc. are contained in our
Data Book “Package Information”.
SMD = Surface Mounted Device
Semiconductor Group
13
GPS05093
Dimensions in mm
1998-02-01
TLE 4207
1.27
0.35
x
8˚ ma
7.6 -0.2 1)
+0.09
0.35 x 45˚
0.23
2.65 max
2.45 -0.2
0.2 -0.1
P-DSO-20-6
(Plastic Dual Small Outline Package)
0.4 +0.8
+0.15 2)
0.2 24x
20
0.1
10.3 ±0.3
11
GPS05094
1 12.8 1) 10
-0.2
Index Marking
1) Does not include plastic or metal protrusions of 0.15 max per side
2) Does not include dambar protrusion of 0.05 max per side
Sorts of Packing
Package outlines for tubes, trays etc. are contained in our
Data Book “Package Information”.
SMD = Surface Mounted Device
Semiconductor Group
14
Dimensions in mm
1998-02-01