austriamicrosystems AG is now ams AG The technical content of this austriamicrosystems application note is still valid. Contact information: Headquarters: ams AG Tobelbaderstrasse 30 8141 Unterpremstaetten, Austria Tel: +43 (0) 3136 500 0 e-Mail: [email protected] Please visit our website at www.ams.com AN514x-10 PPTRIM OTP Programming AN514X-10 PPTRIM Programming MAGNETIC ROTARY ENCODER OTP Programming Guide APPLICATION NOTE • AS5140 • AS5145 • AS5245 al id This application note describes the available options for PPTRIM programming of all related AS51xx devices: lv Starting with the general permanent programming of the OTP memory register, it also describes how to do a “soft writing” for single or multiple non-permanent writing of the OTP. In addition the load function and the features for verification after programming are included. am lc s on A te G nt st il For an overall description of the device, please refer to the relevant datasheet. Note: The pin PROG at the AS5140 is identical to the PDIO pin of the AS5145. 1 Hardware Connections for OTP Memory Programming For OTP memory access, 3 signals are required: PROG/PDIO, CSn and CLK. To read the angle position for zero position programming, signal DO is also required. The AS5xxx can be programmed in either 3.3V or 5V mode. The related programming voltage Vprog is always between 3.3V….3.8V. VDD5V CSn CLK DataIn Vprog 10µF 100nF CLK PROG/PDIO AS5xxx VSS Te ch ni ca CSn Revision 1.3, July 2010 Figure 1 Programming circuit of AS5xxx www.austriamicrosystems.com Page 1 of 16 AN514x-10 PPTRIM OTP Programming 2 One Time Programmable Register (OTP) The OTP block should add flexibility to the user. It allows to define a new zero position, and several other output modes. For internal test purpose a test mode can be activated. It is not recommended to change the factory settings of the device. O T P A cc ess C S n P R O G /P D IO C LK E x it C o n d it i o n am lc s on A te G nt st il O p e r a t i o n M o d e S e le c t io n lv S e t u p C o n d i t io n al id By default the periphery pins CSn, CLK and PROG/PDIO are used for the SSI interface. To access the OTP block a special setup condition must be performed to access the block. Another exit condition must be performed to get out of the access! Figure 2 OTP register input and exit condition 2.1 AUTOLOAD Operation This mode transfers the permanent stored data from each PolyFuse to the corresponding register. The outputs of the registers are internally available and buffered in parallel format. The autoload operation is performed at every power on sequence. 2.2 LOAD Operation Transfer DATA from PolyFuse to registers on demand. ch ni ca - Figure 3 LOAD operation Te At CLK=LOW and PROG/PDIO=LOW the rising edge on CSn signal latches the load command internally. Each rising edge at CLK gets another bit stored into the register. This mode is not recommended in application because the asynchronously change (bit after bit). A power down and AUTOLOAD can be used instead. Revision 1.3, July 2010 www.austriamicrosystems.com Page 2 of 16 AN514x-10 PPTRIM OTP Programming 2.3 WRITE Operation Write DATA from External PROG/PDIO Pad to Register Operation stops automatically after DATA is latched DATA must be stable at rising edge of CLK am lc s on A te G nt st il lv al id - Figure 4 WRITE operation This operation is defined by CLK=LOW and PROG/PDIO=HIGH during rising edge of CSn signal. The signal PROG/PDIO works as input and has to be stable at rising edges of CLK signal. All external data will be shifted into an internal shift register. 2.4 READ Operation Read DATA from Registers at PROG/PDIO DATA is looping until CSn stops operation ch ni ca - Figure 5 READ operation Te This operation performs a serial read of the register data and is defined at CLK=HIGH and PROG/PDIO=LOW during rising edge of CSn signal. The signal PROG/PDIO works in data out direction after the second rising edge at CLK. Revision 1.3, July 2010 www.austriamicrosystems.com Page 3 of 16 AN514x-10 PPTRIM OTP Programming 2.5 PROG Operation - Permanent Storage of DATA from registers to PolyFuse am lc s on A te G nt st il lv al id - Figure 6 PROG operation During this operation the data written into the Latch during write cycle operation are permanently stored in the PolyFuse cell. PROG/PDIO=HIGH and CLK=HIGH during rising edge of CSn signal starts this operation. The fusing is managed bit by bit due to the high current need for fusing. The programming time of PolyFuse cell is defined by the high pulse of CLK (PROG_BURN). As there is a maximum current of 100mA needed for permanently fusing, PROG/PDIO has to be stabilized by some capacitance during this operation. The low time of CLK (PROG_RELOAD) allows to recharge the capacitor. This is useful if the source has a limited current and can be compensated by increasing this time. 2.6 ANALOG Operation Note: This operation is mandatory after programming. Every programmed fuse must be verified with this procedure! Reading Resistance of PolyFuse Te ch ni ca - Revision 1.3, July 2010 Figure 7 ANALOG operation www.austriamicrosystems.com Page 4 of 16 AN514x-10 PPTRIM OTP Programming Unprogrammed PolyFuse resistance: Comparator Level: Programmed PolyFuse resistance: 50Ω-200Ω 300Ω-2KΩ 1) >10KΩ There are two possibilities to do resistance measurements: am lc s on A te G nt st il Setting a fixed voltage of 100mV at PROG/PDIO and measuring of the current at CLK=HIGH. This is the preferred measurement method to get exact resistance values. lv - al id This operation is defined in a similar way than the PROG operation. At the 4th falling edge of CLK, PROG/PDIO must be LOW, further on internal switches enable the analogue resistance measurement between PROG/PDIO pad and GND. One rising edges of CLK later, the first PolyFuse resistance (mbit0) can be measured during CLK= HIGH. At each following CLK=HIGH, one PolyFuse element after the other is measured. During resistance measurement, the maximum current must not exceed 2mA, to avoid unwanted programming to the PolyFuse elements. This analogue measurement is necessary because of: Guard band for the comparator level Guard band for a maximum lifetime drift Check of a low ohmic programming path Resistance values and comparator level are within the following limits: Forcing a constant current of 200µA into PROG/PDIO pad and measuring of the voltage at CLK=HIGH. This is the preferred measurement method for a fast implementation. 1) Comparator level can not be measured from external Current compliance must be set to 2mA 3) Voltage compliance must be set to VDD Operating Conditions 3.1 PROG Operation SYMBOL MIN MAX UNIT Positive Supply Voltage (1) (=Programming Voltage) VDD 3.3 3.5 3.6 3.6 V V Positive supply for Temp < 70°C Positive supply for Temp < 150°C Negative Supply Voltage VSS 0V 0V V Ground =0V Tjunction 0 150 °C High temperature can cause a higher programming yield loss ! 100 mA required current to program a single PolyFuse element (2) us minimal refresh time during fusing – pad CLK (3) ni PARAMETER ca 3 2) ch Junction Temperature Te Programming Current into PROG/PDIO Programming refresh time IPROG,prog tPROG_REFRE SH 1.0 NOTE The PolyFuse cell can be programmed only once Notes: (1) The supply voltage must be fixed in the same range than the programming voltage (2) The PolyFuse cells are programmed in a bit by bit sequence due to the high current at fusing. (3) Refreshing time of the external capacitor depends on the compliance current of the fusing voltage source. Revision 1.3, July 2010 www.austriamicrosystems.com Page 5 of 16 AN514x-10 PPTRIM OTP Programming 3.2 AC Characteristics: Timing Specifications PARAMETER T_SETUP_CSn_CLK Setup time for operation 5 ns T_HOLD_CSn_CLK Hold time for operation 10 ns T _SETUP_CLK_ PROG Setup time for data 5 ns T_HOLD_CLK_PROG Hold time for data 10 ns T_ACCESS_READ Access time for data T _PROG_BURN Programming time 10 T _PROG_RELOAD Reload time of programming cap. 10 T _ACCESS_ ANALOG Delay time of analog read of PolyFuse TYP MAX 60 15 20 ns µs µs µs lv 10 Operating Conditions for ANALOG Operation PARAMETER UNIT am lc s on A te G nt st il 3.3 MIN al id PARAMETER SYMBOL MIN MAX UNIT Vanalog 90 100 mV Set on PROG(1) Analog Current Prog. Fuse Iana,1 0 10 uA 10kOhms - infinite(1) Analog Current Unprog. Fuse Iana,0 1 2 mA 50 - 100 Ohms (1) Setup time for operation mode T_Setup_MODE_C LK 5 ns Hold time for operation mode T_HOLD_MODE_C LK 10 ns Delay time of analog read of Polyfuse T_ACCESS_ANAL OG Analog Voltage 10 NOTE µs Te ch ni ca Notes: (1) The resistor or the PolyFuse can be calculated by setting a maximal voltage of 100mV on PROG/PDIO during PROG operation and measuring the current into the pin. Revision 1.3, July 2010 www.austriamicrosystems.com Page 6 of 16 AN514x-10 PPTRIM OTP Programming 4 Test Sequence 4.1.1 AUTOLOAD operation triggered with Power Up READ operation: Data must be 0 for all bits (for non programmed devices) WRITE operation of checkerboard pattern (1010..) READ operation data has to read checkerboard pattern WRITE operation of anti checkerboard pattern (0101..) READ operation data has to read anti checkerboard pattern 4.1.3 7) 8) 9) Check Comparator WRITE operation: Every bit high (1111..) LOAD operation performed to non programmed PolyFuses READ operation: Data must be 0 for all bits (for non programmed devices) 4.1.4 al id 3) 4) 5) 6) Check Serial Interface lv 4.1.2 am lc s on A te G nt st il 1) 2) Check AUTOLOAD Get Trimming Pattern 10) Test of user specific non trimmed parameter. 11) WRITE operation to trim parameter. 4.1.5 Program PolyFuses 12) PROG operation performed to program trimming pattern into PolyFuses. 4.1.6 ca AUTOLOAD operation (LOAD operation if AUTOLOAD will be performed on later tests) READ operation: Compare digital pattern with trimming pattern ANALOG operation: Read analog resistance levels for PolyFuses Calculate maximum resistance value for non programmed PolyFuses Calculate minimum resistance value for programmed PolyFuses Retest of user specific trimmed parameter. Te ch ni 13) 14) 15) 16) 17) 18) Check programmed Pattern Revision 1.3, July 2010 www.austriamicrosystems.com Page 7 of 16 AN514x-10 PPTRIM OTP Programming 5 Example source code The following source code is taken from the AS5140 and AS5145 DB Demoboards firmware. The microcontroller is a SiLabs C8051F320. Three functions are represented in chapter 5.6: void pptrimLoad(unsigned char num_bits) void pptrimWrite(unsigned char *buffer, unsigned char num_bits) Zero position programming example 5.1 lv On the following example an AS5145 is used. The sequence is: al id void pptrimRead(unsigned char *buffer, unsigned char num_bits) Read 18 bit SSI value from the AS5145 to a SSI buffer (3 bytes buffer for 18 bits) 2. Read 54 bit PPTrim OTP register to a buffer (7 bytes buffer for 54 bit) 3. Write the actual angle value from SSI buffer to the Zero position field in the PPTrim buffer 4. Write back the PPTrim buffer to the AS5145 5. Read back the new 18 SSI data. The angle should be 0. am lc s on A te G nt st il 1. This main (void) source code uses the three PPTRIM functions described above. PPTrimBuffer structure for AS5140: Bit7 ID11 Byte 0 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 ID12 ID13 ID14 ID15 ID16 ID17 MBit 0 7 ID3 Byte 1 6 ID4 15 FS 8 Byte 2 FS0 FS 9 30 Z9 39 Z0 Byte 5 Z1 - ch - RA0 Z2 RA1 Z3 MBit 1 Md0 43 Md1 52 24 RA4 33 Z6 42 51 FS 7 RA3 Div0 16 25 34 Z5 8 ID2 FS 6 RA2 Z4 9 17 26 35 44 53 FS 5 0 ID10 ID1 18 27 36 45 ID0 FS 4 1 ID9 10 19 28 37 46 ni 47 Byte 6 CCW ID8 FS12 FS3 2 11 20 29 38 ID7 FS 11 FS2 3 12 21 ca Z8 ID6 FS 10 FS1 4 13 22 31 Byte 4 ID5 14 23 Byte 3 5 32 Z7 41 Div1 50 40 Index 49 48 Te SSIBuffer structure for AS5140: Bit7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 D1 D0 OCF COF LIN MagINC MagDEC Parity Byte 0 Byte 1 7 D9 D8 15 Revision 1.3, July 2010 6 5 D7 14 4 D6 13 3 D5 12 www.austriamicrosystems.com 2 D4 11 1 D3 10 0 D2 9 8 Page 8 of 16 AN514x-10 PPTRIM OTP Programming PPTrimBuffer structure for AS5145: Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 ID11 ID12 ID13 ID14 ID15 ID16 ID17 MBit 0 ID3 Byte 1 6 ID4 15 FS 6 Byte 2 FS 7 RA3 39 38 Z0 Byte 5 Z2 46 - 36 Z3 45 MBit 1 FS 3 CCW RA0 Z4 44 PWM Half 43 MagCompEN ID2 17 53 52 16 FS 5 25 24 RA1 34 Z5 8 FS 4 26 35 9 RA2 33 Z6 42 PWM Dis 51 32 Z7 41 MD0 am lc s on A te G nt st il - Z11 ID10 ID1 18 27 0 ID9 ID0 FS 2 1 10 19 28 37 Z1 47 Byte 6 Z10 ID8 FS10 FS1 2 11 20 29 Z9 ID7 FS 9 FS0 3 12 21 30 Z8 ID6 FS 8 RA4 4 13 22 31 Byte 4 ID5 14 23 Byte 3 5 al id 7 lv Byte 0 Bit7 50 40 MD1 49 48 SSIBuffer structure for AS5145: Bit7 D1 Byte 0 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 D0 OCF COF LIN MagINC MagDEC Parity 7 D9 Byte 1 6 D8 15 - Byte 2 { D7 14 4 D6 13 - 23 void main(void) 5 - 22 D5 12 - 21 3 2 D4 11 - 20 0 D3 10 - 19 1 D2 9 8 D11 18 D10 17 16 ca xdata unsigned char SSIBuffer[3], PPTrimBuffer[7]; xdata unsigned char ZeroTemp; ni xdata unsigned short angle; // Step 1: Read the 18 bit SSI value from the AS5145 (AS5140 uses 16 bit) ssiRead(SSIBuffer, 18); ch angle = extractAngleValueFromSsiBuffer(SSIBuffer); // Step 2: Read the 54 PPTRIM OTP bits from the AS5145 Te pptrimRead(PPTrimBuffer, 54); // Step 3: Write the actual angle to the zero position field of the OTP bits ZeroTemp = (SSIBuffer[2] << 2) + (SSIBuffer[1] >> 6); ZeroTemp = reversebits(ZeroTemp); PPTrimBuffer[4] = ZeroTemp; ZeroTemp = (SSIBuffer[1] << 2) + (SSIBuffer[0] >> 6); ZeroTemp = reversebits(ZeroTemp); Revision 1.3, July 2010 www.austriamicrosystems.com Page 9 of 16 AN514x-10 PPTRIM OTP Programming PPTrimBuffer[5] = ZeroTemp; // Step 4: Write back the 54 PPTRIM OTP bits containing the Zero position (which is the actual angle) to the AS5145 pptrimWrite(PPTrimBuffer, 54); // Step 5: Read the new angle. Must be 0 (+-1, if the mechanics is not very stable) angle = extractAngleValueFromSsiBuffer(SSIBuffer); Te ch ni ca am lc s on A te G nt st il lv } al id ssiRead(SSIBuffer, 18); Revision 1.3, July 2010 www.austriamicrosystems.com Page 10 of 16 AN514x-10 PPTRIM OTP Programming Definitions: Macro CLEAR_CSN() SET_CSN() CLEAR_CLK() SET_CLK() CLEAR_PROG() SET_PROG() do do do do do do { { { { { { CSN = 0; } while(0) CSN = 1; } while(0) CLK = 0; } while(0) CLK = 1; } while(0) PROG = 0; } while(0) PROG = 1; } while(0) #define PROG_HIGH_IMPED() do { P0MDOUT #define PROG_LOW_IMPED() do { P0MDOUT 5.3 = 0x5F; PROG = 1;} while(0) // Pushpull disabled, Hi-Z = 0xDF; } while(0) // Pushpull enabled Utility functions #define PPTRIMDelay 50 static void pptrimDelay(volatile unsigned int value) { am lc s on A te G nt st il for(value; value>0; value--); { al id #define #define #define #define #define #define lv 5.2 unsigned char foo = 30; while(foo--); } } void initPPTRIM() { PROG_LOW_IMPED(); CLEAR_PROG(); } static void clkPulses(unsigned char num) { unsigned char i; for(i = 0; i < num; i++) { pptrimDelay(PPTRIMDelay); ca SET_CLK(); CLEAR_CLK(); } ni } pptrimDelay(PPTRIMDelay); ch unsigned char reversebits(unsigned char value) // Endian switch { unsigned char i=0, result=0; Te while (i<8) { result += (value<<i)&0x80; if (i<7) result = result >> 1; i++; } return result; } Revision 1.3, July 2010 www.austriamicrosystems.com Page 11 of 16 AN514x-10 PPTRIM OTP Programming 5.4 Setup and exit conditions static void setupCondition() { CLEAR_CSN(); pptrimDelay(PPTRIMDelay); CLEAR_CLK(); al id pptrimDelay(PPTRIMDelay); SET_PROG(); pptrimDelay(PPTRIMDelay); SET_CSN(); pptrimDelay(PPTRIMDelay); lv CLEAR_CSN(); pptrimDelay(PPTRIMDelay); SET_CLK(); CLEAR_CLK(); am lc s on A te G nt st il pptrimDelay(PPTRIMDelay); pptrimDelay(PPTRIMDelay); } static void exitCondition() { PROG_LOW_IMPED(); pptrimDelay(PPTRIMDelay); CLEAR_CSN(); pptrimDelay(PPTRIMDelay); SET_CLK(); pptrimDelay(PPTRIMDelay); CLEAR_CLK(); pptrimDelay(PPTRIMDelay); SET_CLK(); SET_CSN(); ca pptrimDelay(PPTRIMDelay); pptrimDelay(PPTRIMDelay); CLEAR_PROG(); Te ch } ni pptrimDelay(PPTRIMDelay); Revision 1.3, July 2010 www.austriamicrosystems.com Page 12 of 16 AN514x-10 PPTRIM OTP Programming 5.5 Operation modes static void operationModeLoad() { CLEAR_PROG(); pptrimDelay(PPTRIMDelay); SET_CSN(); al id pptrimDelay(PPTRIMDelay); clkPulses(4); } static void operationModeRead() lv { CLEAR_PROG(); pptrimDelay(PPTRIMDelay); am lc s on A te G nt st il SET_CLK(); pptrimDelay(PPTRIMDelay); SET_CSN(); pptrimDelay(PPTRIMDelay); CLEAR_CLK(); pptrimDelay(PPTRIMDelay); clkPulses(1); PROG_HIGH_IMPED(); } static void operationModeWrite() { SET_CSN(); pptrimDelay(PPTRIMDelay); clkPulses(3); } { SET_CLK(); ca static void operationModeProg() ni pptrimDelay(PPTRIMDelay); SET_CSN(); ch pptrimDelay(PPTRIMDelay); CLEAR_CLK(); pptrimDelay(PPTRIMDelay); Te clkPulses(4); } Revision 1.3, July 2010 www.austriamicrosystems.com Page 13 of 16 AN514x-10 PPTRIM OTP Programming 5.6 PPTrim functions void pptrimLoad(unsigned char num_bits) { setupCondition(); operationModeLoad(); void pptrimRead(unsigned char *buffer, unsigned char num_bits) { xdata unsigned char current_byte = 0; am lc s on A te G nt st il xdata unsigned char current_bit = 0; lv exitCondition(); } al id clkPulses(num_bits); xdata unsigned char temp = 0; if(!num_bits) return; current_byte = num_bits >> 3; current_bit = num_bits & ~0x07; setupCondition(); operationModeRead(); clkPulses(1); // position the first bit to read //-- read OTP Data -temp = 0; temp += (SSI_PROG) ? 1 : 0; ca for(current_bit = num_bits; current_bit; current_bit--) { { ni if(((current_bit - 1) & 0x07) == 0) ch buffer[current_bit >> 3] = temp; temp = 0; Te } if (current_bit) { temp <<= 1; SET_CLK(); pptrimDelay(200); temp += (SSI_PROG) ? 1 : 0; Revision 1.3, July 2010 www.austriamicrosystems.com Page 14 of 16 AN514x-10 PPTRIM OTP Programming CLEAR_CLK(); pptrimDelay(200); } } exitCondition(); } xdata unsigned char *current_byte; xdata unsigned char current_bit = 0; xdata unsigned char temp = 0; current_byte = buffer + ((num_bits-1)>>3); temp = *current_byte; if(num_bits % 8) am lc s on A te G nt st il temp <<= 8 - (num_bits % 8); lv { al id void pptrimWrite(unsigned char *buffer, unsigned char num_bits) setupCondition(); operationModeWrite(); //-- send OTP Data for(current_bit = num_bits; current_bit; current_bit--) { if(temp & 0x80) SET_PROG(); else CLEAR_PROG(); pptrimDelay(100); SET_CLK(); ca pptrimDelay(300);// delay, tzapp=2us(typ.) CLEAR_CLK(); ni pptrimDelay(PPTRIMDelay); temp <<= 1; ch if(((current_bit-1) & 0x07) == 0) { temp = *(--current_byte); } Te } SET_PROG(); pptrimDelay(100); clkPulses(1); // data latched // END OTP-Write exitCondition(); } Revision 1.3, July 2010 www.austriamicrosystems.com Page 15 of 16 AN514x-10 PPTRIM OTP Programming Revision History Date Description 1.1 September, 2009 initial revision 1.2 December, 2009 Rename document from AN514X-10 to AN5000-30; Insert device list 1.3 July, 2010 Rename document and note for analog readback function (page 18) al id Revision Copyrights lv Copyright © 1997-2009, austriamicrosystems AG, Schloss Premstaetten, 8141 Unterpremstaetten, Austria-Europe. Trademarks Registered ®. All rights reserved. The material herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. am lc s on A te G nt st il All products and companies mentioned are trademarks or registered trademarks of their respective companies. Disclaimer Devices sold by austriamicrosystems AG are covered by the warranty and patent indemnification provisions appearing in its Term of Sale. austriamicrosystems AG makes no warranty, express, statutory, implied, or by description regarding the information set forth herein or regarding the freedom of the described devices from patent infringement. austriamicrosystems AG reserves the right to change specifications and prices at any time and without notice. Therefore, prior to designing this product into a system, it is necessary to check with austriamicrosystems AG for current information. This product is intended for use in normal commercial applications. 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No obligation or liability to recipient or any third party shall arise or flow out of austriamicrosystems AG rendering of technical or other services. ni Contact Information Headquarters ch austriamicrosystems AG A-8141 Schloss Premstaetten, Austria Te Tel: +43 (0) 3136 500 0 Fax: +43 (0) 3136 525 01 For Sales Offices, Distributors and Representatives, please visit: http://www.austriamicrosystems.com Revision 1.3, July 2010 www.austriamicrosystems.com Page 16 of 16