A OUT 1 2 E9 GND +V_5 E13 +V_3 E15 VRON B E14 V_GATE 3.3VIN E11 GND 5.0VIN E8 E6 2 D5 CMDSH-3 1 D4 CMDSH-3 C19 1uF 6.3V C17 1uF 6.3V C15 10uF 25V R8 1.3K R4 18K - + J2 4V 4V 1 CONNECTOR-80 1 1 41 41 2 2 42 42 3 3 43 43 4 4 44 44 5 5 45 45 6 6 46 46 7 7 47 47 8 8 48 48 9 9 49 49 10 10 50 50 11 11 51 51 12 12 52 52 13 13 53 53 14 14 54 54 15 15 55 55 16 16 56 56 17 17 57 57 18 18 58 58 19 19 59 59 20 20 60 60 21 21 61 61 22 22 62 62 23 23 63 63 24 24 64 64 25 25 65 65 26 26 66 66 27 27 67 67 28 28 68 68 29 29 69 69 30 30 70 70 31 31 71 71 32 32 72 72 33 33 73 73 34 34 74 74 35 35 75 75 36 36 76 76 37 37 77 77 38 38 78 78 39 39 79 79 40 40 80 80 C13 180uF C12 180uF C11 optional VR1 LT1004CZ 2 3 + 8 7.5V to 24V +V_IN 3 U1A LT1361CS8 + 1 C7 0.01uF TRIG RSET DSCH THRES CON U2 TLC555CD 2 4 7 6 5 +12V 2 D3 CMDSH-3 C2 100pF 1 + 2 3 C9 0.1uF R7 1.5K R3 39K R2 390K 3 D2 MMBZ5231BLT1 1 2 3 8 4 6 5 - + 8 C 7 U1B LT1361CS8 C R12 1K 4 VDD GND 1 R6 50K VID4 VID3 VID2 VID1 VID0 IMAX 2 ADJ. R5 15K 3 1 3 5 7 9 2 C18 1uF 6.3V C16 10uF 6.3V 2 4 6 8 10 E4 E7 E5 E12 E10 C8 4.7uF 25V 3528 1 2 C5 0.1uF U3 LT1210CR SW1 ON / OFF C14 10uF 6.3V C3 4.7uF 25V 3528 R1 680 0805 Pulsed Load C10 0.1uF 1 3 1 JP1 HEADER 5X2 D1 MMBZ5231BLT1 3 1 +12V + - 5 R13 2K 7 C6 0.01uF D D RESERVED 2.5V @ 0.15A +VCC_CPU_CLK GND 1.5V @ 2.5A +VCC_CPU_IO GND 0.9V to 1.6V +VCC_CPU_CORE 3 B + 4 6 C4 0.1uF C1 0.1uF 1206 R10 0.020 1 1206 R11 0.020 Q1 SUD50N03-07 E3 E2 E1 J1 Pulsed Load Current Monitor -12V GND +12V E Date: Size Title Friday, January 17, 2003 DEMO DC296 Document Number E Sheet of LTC1735, LTC1772, LT1761 VRM Interface Board 1630 McCarthy Blvd. Milpitas, CA. 95035 (408) 432-1900 FAX. (408) 434-0507 Linear Technology Corporation R9 10K 1 -12V +12V 4 3 4 A 2 3 4 5 + A Rev 1 2 3 4