DEMO MANUAL DC1485A LTC2757 18-Bit, Parallel Input, SoftSpan IOUT DAC Description Demonstration circuit 1485A features the LTC®2757A single 18-bit SoftSpan™ IOUT DAC with ±1LSB maximum INL. This device features six programmable output ranges: 0V to 5V, 0V to 10V, ± 5V, ±10V, ±2.5V and –2.5V to 7.5V. The demo circuit allows all of the LTC2757’s features to be exercised, including system-level gain and offset adjustments. Design files for this circuit board are available at http://www.linear.com/demo L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and SoftSpan and QuikEval are trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. DAC CONNECTIONS RIBBON CABLE TO DC590 CONTROLLER ANALOG POWER SUPPLY (NORMALLY ±15V) Figure 1. Connection Diagram dc1485afa 1 DEMO MANUAL DC1485A quick start procedure Connect a clean ±15V power supply to the turret posts at the bottom of the DC1485A board. Connect J1 to a DC590 USB serial controller using the supplied 14-conductor ribbon cable. Connect DC590 to a host PC with a standard USB A/B cable. Run the QuikEval™ evaluation software which can be downloaded from www.linear.com/software. The correct control panel will be loaded automatically. The software automatically sets the LTC2757 outputs according to the entries in the control panel. A square wave option is available to test settling time. MSPAN jumper should be in the lower position if software span control is desired. Additional software documentation may be available from the Help menu item, as features may be added periodically. dc1485afa 2 DEMO MANUAL DC1485A Using the Parallel Connector Protocol The DC1485A can be used without the DC590 QuikEval system. If a DC590 demo board is not connected the shift registers on the DC1485A are disabled, allowing the user to clock in data through the parallel connector (P1). The data input register is loaded directly from the 18-bit microprocessor bus (D0-D17 on the parallel connector) by holding the D_/S pin low and then pulsing the WR_ pin low. The second register (DAC register) is loaded by pulsing the UPD pin high, which copies the data held in the input register into the DAC register. Note that updates always include both data and span; but the DAC register values will not change unless the input register values have been changed by writing. Loading the span input register is accomplished in a similar manner, by holding the D_/S pin high and then bringing the WR_ pin low. The span and data register structures are the same except for the number of parallel bits. The span registers have three bits, while the data registers have 18 bits. Please see the LTC2757 data sheet for in depth timing diagrams and more information about the communication protocol. Parallel Pin Descriptions D0-D17: DAC Input/Output Data Bits. These I/O pins set and read back the DAC code. D17 is the MSB. D0 is the LSB. D_/S: Data/Span Select: This pin is used to select activation of the data or span I/O pins (D0 to D17 or S0 to S2, respectively), along with their respective dedicated registers, for write or read operations. Update operations ignore D_/S, since all updates affect both data and span registers. For single-span operation, tie D_/S to GND. READ: Read Pin. When READ is asserted high, the data I/O pins (D0-D17) or span I/O pins (S0-S2) output the contents of the selected register. For single-span operation, readback of the span I/O pins is disabled. UPD: Update and Buffer Select Pin. When READ is held low and UPD is asserted high, the contents of the input registers (both data and span) are copied into their respective DAC registers. The output of the DAC is updated, reflecting the new DAC register values. When READ is held high, the update function is disabled and the UPD pin functions as a buffer selector—logic low to select the input register, high for the DAC register. WR_: Active Low Write Pin. A Write operation copies the data present on the data or span I/O pins (D0-D17 or S0-S2, respectively) into the input register. When READ is high, the Write function is disabled. MSPAN: Manual Span Control Pin. MSPAN is used to configure the LTC2757 for operation in a single, fixed output range. G: Ground Pin. (Note, if an IDE cable is used, Pin 21 is often keyed on the connector and may be trimmed.) S0-S2: Span Input/Output. Pins S0, S1 and S2 are used to program and to read back the output range of the DAC. dc1485afa 3 DEMO MANUAL DC1485A Hardware Setup Jumpers Analog Connections (Turret Posts) MSPAN: Manual Span Control Pin. MSPAN is used to configure the LTC2757 for operation in a single, fixed output range. If MSPAN is high it will be configured for single-span use. If MSPAN is low it will be set through the QuikEval Software. Default position is 0 (low). VOUT : DAC Voltage Output. S0, S1, S2: Used to set the fixed output range if MSPAN is high. Default position is 0, 0, 0 (0V to 5V). S2 S1 S0 SPAN 0 0 0 0V to 5V 0 0 1 0V to 10V 0 1 0 ±5V 0 1 1 ±10V 1 0 0 ±2.5 V 1 0 1 –2.5V to 7.5V REFADJ: Gain Adjust Pin. If no adjustments are required, select GND. Selecting EXT connects the pin to the turret allowing external adjustment to null gain error or compensate for reference errors. RVOS: Offset adjustment for DAC. If no offset adjustment is required, select GND. Selecting EXT connects the offset pin to the turret allowing external adjustment of offset. VCC: Select source for 5V VCC supply. Set to 5V for supply by onboard LT1236 reference (recommended). Set to REG to be supplied by regulated supply from DC590 Controller and remove the jumper to supply externally. VREF: DAC Reference Voltage. If the onboard LT1236 references are selected, the voltage may be measured at these points. If a remote reference is selected, then an external reference must be applied to these points. RVOS: DAC Offset Adjust Input. Use only if RVOS jumper is set to EXT. Nominal input range is ±5V. REFADJ: Gain Adjust Pin. This voltage-control pin can be used to null gain error or to compensate for reference errors. The gain error change expressed in LSB is the same for any output range. Power and Ground Connections Analog Power: The 15V, –15V and GND turret posts are the analog supplies for the internal DAC amplifiers. These should be connected to a well regulated, low noise power supply. VCC: Connection to VCC. See schematic and description for VCC jumper. Grounding: Separate power and signal grounds are provided. Signal GND is the turret closest to VOUT , use this for measurement ground and output return. Power GND is between AMP V+ and AMP V– turrets. dc1485afa 4 DEMO MANUAL DC1485A PArts List ITEM QTY REFERENCE PART DESCRIPTION MANUFACTURE/PART NUMBER KIT QTY NUMBER OF BOARDS = 175 1 16 C1-C4, C6-C8, C10-C12, C19, C25, C29, C31, C33, C40 CAP., X5R, 0.1µF 25V 20%, 0402 TDK, C1005X5R1E104M 2800 2 2 C5, C20 CAP., NP0, 100pF 50V, 5%,1206 AVX, 12065A101JAT2A 350 3 1 C9 CAP., X7R, 1µF 25V 10%, 0805 TDK, C2012X7R1E105K 175 4 2 C34, C37 CAP., X5R, 1µF 25V 20%, 0603 TDK, C1608X5R1E105M 350 5 6 C13, C18, C30, C36, C39, C41 CAP., X5R, 10µF 25V 20%,1206 TDK, C3216X5R1E106M 1050 6 1 C14 CAP., X7R, 1µF 25V 10%,1206 AVX, 12063C105KAT2A 175 7 0 C15, C16 CAP., 0603 OPT 8 0 C21 CAP., 1206 OPT 9 3 C17, C23, C28 CAP., NP0, 100pF 50V, 5%,0402 AVX, 04025A101JAT2A 525 10 2 C38, C35 CAP., X7R, 0.01µF 25V 20%,0402 TDK, C1005X7R1E103M 350 11 3 D1, D2, D5 DIODE, SCHOTTKY, SOT23 DIODES INC., BAT54C-7-F 525 12 9 E1, E2, E3, E4, E5, E6, E7, E8, E9 TEST POINT, TURRET, 0.064" MILL-MAX, 2308-2-00-80-00-00-07-0 1575 13 3 JP1, JP2, JP3 JMP, 2X3, 0.079" SAMTEC, TMM-103-02-L-D 525 14 2 JP4, JP5 JMP, 1X3, 0.079" SAMTEC, TMM-103-02-L-S 350 15 1 J1 HEADER, 2X7 PIN, 0.079CC MOLEX, 87831-1420 175 16 0 J2 CONN, BNC, RTANG 50Ω OPT (TYCO ELEC. AMP, 413631-1) 17 1 P1 JMP, 2X20, 0.100" SAMTEC, TSW-120-07-L-D 175 18 2 R1, R2 RES., Chip 10k 1/16W 5%, 0603 VISHAY, CRCW060310K0JNEA 350 19 3 R7, R8, R3 RES., Chip 1k 1/16W 5%, 0603 VISHAY, CRCW06031K00JNEA 525 20 6 R4, R9, R20, R21, R22, R23 RES., Chip 100Ω 1/16W 5%, 0402 VISHAY, CRCW0402100RJNED 1050 21 1 R5 RES., Chip 10Ω 1/16W 5%, 0603 VISHAY, CRCW060310R0JNEA 175 22 1 R6 RES., Chip 4.02k 1/16W 1%, 0603 VISHAY, CRCW06024K02FKED 175 23 8 R11, R16, R17, R18, R19, R27, R29, R30 RES., Chip 4.99k 1/16W 1%, 0402 VISHAY, CRCW04024K99FKED 1400 24 4 R24, R25 ,R26, R31 RES., Chip 10k 1/16W 5%,0402 VISHAY, CRCW040210K0JNED 700 25 1 R28 RES., Chip 20k 1/16W 5%,0402 VISHAY, CRCW040220K0JNED 175 26 1 U1 I.C., LTC2757ACLX, LQFP48LX LINEAR TECH., LTC2757ACLX 175 27 1 U2 I.C., LT1012ACS8, SO8 LINEAR TECH., LT1012ACS8 175 28 1 U3 I.C., LTC2054HVCS5, SOT23-5 LINEAR TECH., LTC2054HVCS5 175 29 1 U4 I.C., LTC6240HVCS5, SOT23-5 LINEAR TECH., LTC6240HVCS5 175 30 1 U5 I.C., LT1360CS8, SO8 LINEAR TECH., LT1360CS8 175 31 0 U6 I.C., LTC6655AHMS8-5, MSOP8 OPT 32 1 U8 I.C., LT1236ACS8-5, SO8 LINEAR TECH., LT1236ACS8-5 175 32 4 U9, U10, U11, U12 I.C., 74VHC595MTC, TSSOP16 FAIRCHILD SEMI., 74VHC595MTCX 700 33 1 U13 I.C., NC7SZ14P5X, SC70-5 FAIRCHILD SEMI., NC7SZ14P5X 175 34 1 U14 I.C., Serial EEPROM, TSSOP8 MICROCHIP, 24LC025-I/ST 175 35 1 U15 I.C., LT1761ES5-5, SOT23-5 LINEAR TECH., LT1761ES5-5 175 36 1 U16 I.C., LT1964ES5-5, SOT23-5 LINEAR TECH., LT1964ES5-5 175 37 8 SHUNTS AS SHOWN ON ASSY DWG SHUNT, 0.079" CENTER SAMTEC, 2SN-BK-G 1400 38 4 MTG STAND-OFF, NYLON (SNAP ON), 0.50" TALL KEYSTONE, 8833 (SNAP ON) 700 39 2 STENCILS BOTH SIDES DC1485A-1 0 0 0 0 2 dc1485afa 5 A B C D S0 6 CS 4 SCK/SCL 7 MOSI/SDA 5 MISO 10 EEVCC 9 EESDA 11 EESCL 12 EEGND 14 AUX 1 2 J1 HD2X7-079-MOLEX V+ 5V V- D1 BAT54C D2 BAT54C 4 3 2 1 R27 4.99K WP SCL SDA A1 A2 VSS 5 VCC A0 5 6 7 8 R25 10K R29 R30 4.99K 4.99K D_/S READ WR_ CLR_ MSPAN UPD D17 D15 D13 D11 D9 D7 D5 D3 D1 S2 S1 CS/ CLK SDI SDO U14 24LC025-I /ST C33 0.1uF G G G G G G G G 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 HD2X20-100 P1 R24 10K C18 10uF,25V 1206 C13 10uF,25V 1206 PARALLEL INTERFACE 5V E5 E4 E3 D16 D14 D12 D10 D8 D6 D4 D2 D0 AMP V- GND AMP V+ V+ 2. INSTALL SHUNTS ON JUMPERS AS SHOWN. 2 3 1 3 1 R31 10K R28 20K 100 R23 2 4 4 U13 NC7SZ14P5X VCC C31 0.1uF 100 R22 R26 10K 100 R21 C28 100pF C23 100pF C17 100pF 13 G RCK SCLR SCK 16 13 G RCK SCLR SCK G RCK SCLR SCK 100 13 12 10 11 16 G RCK SCLR SCK U12 74VHC595MTC 9 VCC Q'H 7 QH 6 C29 QG 5 0.1uF QF 4 QE 3 8 GND QD 2 QC 1 QB 15 14 SER QA R20 13 12 10 11 U11 74VHC595MTC 9 VCC Q'H 7 QH 6 C25 QG 5 0.1uF QF 4 QE 3 8 GND QD 2 QC 1 QB 15 14 SER QA 100 R9 12 10 11 U10 74VHC595MTC 16 9 VCC Q'H 7 QH 6 C19 QG 5 0.1uF QF 4 QE 3 8 GND QD 2 QC 1 QB 15 14 SER QA R4 100 12 10 11 U9 74VHC595MTC 9 VCC Q'H 7 QH 6 C2 QG 5 0.1uF QF 4 QE 3 8 GND QD 2 QC 1 QB 15 14 SER QA 16 V+ 2 1 S2 S1 S0 D17 D16 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 E8 D5 BAT54C 3 R19 4.99K R18 4.99K R16 4.99K R11 4.99K REFADJ S2 S1 S0 D17 D16 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 1 4 3 2 1 3 2 C30 10uF,25V 3 1206 4 C40 0.1uF UPD D_/S WR_ CLR_ MSPAN R17 4.99K READ 3 38 37 VCC C8 0.1uF 3 2 1 VREF 8 9 10 11 12 13 14 15 16 23 24 25 26 27 28 29 30 31 EXT GND JP4 3 2 3 - + V- GND 1206 C21 OPT 5 6 7 8 5 6 C41 10uF,25V 1206 39 4 5 6 40 3 4 EXT 1 3 5 C37 1uF 25V 0603 C34 1uF 25V 0603 5V V- V+ THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS. CUSTOMER NOTICE TRIM VOUT NC NC 8 7 RVOS GND/IOUT3 IOUT2S IOUT2F IOUT1 R8 1K 0603 0603 C9 1uF 0805 R2 10K R1 10K 0603 +5V + - C4 0.1uF BYP OUT BYP IN GND 2 SCALE = NONE LEO C. KT APPROVALS 5V VCC VREF 4 5 4 5 + - C3 0.1uF 2 REV E7 E6 VCC -5V C39 10uF,25V 1206 S2 DESCRIPTION - + C6 0.1uF EXT GND JP5 3 2 1 0603 R6 4.02K V- C15 OPT 0603 0 1 0 1 0 1 0 1 -5 0 0 -2.5 -2.5 7.5 2.5 10 5 10 5 SPAN JP2 RVOS 5 1 3 MSPAN 1 0 HD2X3-079 6 4 2 E9 DATE: N/A SIZE LTC2757CLX 1 DEMO CIRCUIT 1485A 02/13/2014, 11:18 AM IC NO. SHEET 1 2 OF 1 REV. 18-BIT PARALLEL INPUT, CURRENT OUTPUT DAC WITH READBACK 1630 McCarthy Blvd. Milpitas, CA 95035 Phone: (408)432-1900 www.linear.com Fax: (408)434-0507 LTC Confidential-For Customer Use Only 0 1 0 1 1 0 0 0 0 0 S2 S1 S0 S0 -10 VCC GND VOUT J2 OPT E2 MANUAL SPAN CONTROL R7 1K 0603 2 3 E1 LEO C. VOUT DATE 02-13-14 APPROVED U5 LT1360CS8 6 C12 0.1uF C20 100pF V+ 1206 JP1 1 6 5 4 3 S1 2 1 0 HD2X3-079 C5 100pF 1206 PRODUCTION 1 REVISION HISTORY TECHNOLOGY VREF C38 0.01uF C35 C36 0.01uF 10uF,25V 1206 +5V R5 10 0603 U4 LTC6240HVCS5 1 C10 0.1uF -5V C16 OPT 0603 3 4 +5V __ ECO TITLE: SCHEMATIC SHDN OUT U16 LT1964ES5-5 SHDN GND VIN U15 LT1761ES5-5 2 REF 4 6 REG HD2X3-079 JP3 3 2 1 3 2 1 1206 -5V C14 1uF U3 LTC2054HVCS5 1 C11 R3 0.1uF 1K 0603 2 LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS; HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO PCB DES. VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL APP ENG. APPLICATION. COMPONENT SUBSTITUTION AND PRINTED CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT PERFORMANCE OR RELIABILITY. CONTACT LINEAR TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE. GND NC VIN NC U8 LT1236ACS8-5 GND GND VOUT_S VIN VOUT_F GND U6 LTC6655AHMS8-5 SHDN C1 0.1uF U2 LT1012ACS8 6 C7 0.1uF V+ U1 LTC2757CLX 33 34 35 36 20 VCC 4 D_/S READ UPD WR_ CLR_ 21 2 RCOM MSPAN 1. ALL RESISTORS ARE IN OHMS, 0402. ALL CAPACITORS ARE IN MICROFARADS, 0402. GND GND GND 13 8 3 GND GND GND 18 19 7 NOTES: UNLESS OTHERWISE SPECIFIED 5 3 17 VDD 48 REFADJ 1 RINS 2 RINF 47 7 4 46 45 43 44 42 41 REFF REFS ROFSF ROFSS RFBS RFBF NC NC 22 32 5 2 5 2 7 6 4 5 A B C D DEMO MANUAL DC1485A Schematic Diagram dc1485afa DEMO MANUAL DC1485A Assembly Drawings dc1485afa 7 DEMO MANUAL DC1485A Assembly Drawings dc1485afa 8 DEMO MANUAL DC1485A PCB Layout and Film Top Silkscreen Top Solder Paste Top Solder Mask dc1485afa 9 DEMO MANUAL DC1485A PCB Layout and Film Layer 1-Top Layer Layer 2-GND Plane 1 Layer 3- GND Plane 2 + PWR Traces dc1485afa 10 DEMO MANUAL DC1485A PCB Layout and Film Layer 4-Bottom Layer Bottom Solder Mask dc1485afa 11 DEMO MANUAL DC1485A PCB Layout and Film Bottom Solder Paste Bottom Silkscreen dc1485afa 12 DEMO MANUAL DC1485A pc FAB DRAWING dc1485afa Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 13 DEMO MANUAL DC1485A DEMONSTRATION BOARD IMPORTANT NOTICE Linear Technology Corporation (LTC) provides the enclosed product(s) under the following AS IS conditions: This demonstration board (DEMO BOARD) kit being sold or provided by Linear Technology is intended for use for ENGINEERING DEVELOPMENT OR EVALUATION PURPOSES ONLY and is not provided by LTC for commercial use. As such, the DEMO BOARD herein may not be complete in terms of required design-, marketing-, and/or manufacturing-related protective considerations, including but not limited to product safety measures typically found in finished commercial goods. As a prototype, this product does not fall within the scope of the European Union directive on electromagnetic compatibility and therefore may or may not meet the technical requirements of the directive, or other regulations. If this evaluation kit does not meet the specifications recited in the DEMO BOARD manual the kit may be returned within 30 days from the date of delivery for a full refund. THE FOREGOING WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY THE SELLER TO BUYER AND IS IN LIEU OF ALL OTHER WARRANTIES, EXPRESSED, IMPLIED, OR STATUTORY, INCLUDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE. EXCEPT TO THE EXTENT OF THIS INDEMNITY, NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES. The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user releases LTC from all claims arising from the handling or use of the goods. Due to the open construction of the product, it is the user’s responsibility to take any and all appropriate precautions with regard to electrostatic discharge. Also be aware that the products herein may not be regulatory compliant or agency certified (FCC, UL, CE, etc.). No License is granted under any patent right or other intellectual property whatsoever. LTC assumes no liability for applications assistance, customer product design, software performance, or infringement of patents or any other intellectual property rights of any kind. LTC currently services a variety of customers for products around the world, and therefore this transaction is not exclusive. Please read the DEMO BOARD manual prior to handling the product. Persons handling this product must have electronics training and observe good laboratory practice standards. Common sense is encouraged. This notice contains important safety information about temperatures and voltages. For further safety concerns, please contact a LTC application engineer. Mailing Address: Linear Technology 1630 McCarthy Blvd. Milpitas, CA 95035 Copyright © 2004, Linear Technology Corporation dc1485afa 14 Linear Technology Corporation LT 0414 REV A • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com LINEAR TECHNOLOGY CORPORATION 2010