Product Overview MC74HC126A: Quad Non-inverting Buffer, 3-State For complete documentation, see the data sheet Product Description High-Performance Silicon-Gate CMOS The MC74HC125A and MC74HC126A are identical in pinout to the LS125 and LS126. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. The HC125A and HC126A noninverting buffers are designed to be used with 3-state memory address drivers, clock drivers, and other bus-oriented systems. The devices have four separate output enables that are active-low (HC125A) or active-high (HC126A). Features • • • • • • • • Output Drive Capability: 15 LSTTL Loads Outputs Directly Interface to CMOS, NMOS, and TTL Operating Voltage Range: 2.0 to 6.0 V Low Input Current: 1.0 <FONT FACE=SYMBOL>m</FONT>A High Noise Immunity Characteristic of CMOS Devices In Compliance with the Requirements Defined by JEDEC Standard No. 7A Chip Complexity: 72 FETs or 18 Equivalent Gates Pb-Free Packages are Available Part Electrical Specifications Product MC74HC126ADG Compliance Status Channels Output VCC Min (V) VCC Max (V) tpd Max (ns) IO Max (mA) Package Type Pb-free Active 4 3-State 2 6 24 6 SOIC-14 Active 4 3-State 2 6 24 6 SOIC-14 Active 4 3-State 2 6 24 6 TSSOP-14 Active 4 3-State 2 6 24 6 SOIC-14 Active 4 3-State 2 6 24 6 TSSOP-14 Halide free MC74HC126ADR2G Pb-free Halide free MC74HC126ADTR2G Pb-free Halide free NLV74HC126ADR2G AEC Qualified PPAP Capable Pb-free Halide free NLV74HC126ADTR2G AEC Qualified PPAP Capable Pb-free Halide free For more information please contact your local sales support at www.onsemi.com Created on: 6/30/2016