Evaluation Board For AD768x/AD769x/AD794x/AD798x EVAL-AD76XXCB 8/10-Pin Preliminary Technical Data FEATURES AD768x/AD769x/AD794x/AD798x is available at www.analog.com and should be consulted when utilizing this evaluation board. Versatile analog signal conditioning circuitry On-board reference, crystal oscillator and buffers 16-bit Parallel Buffered Outputs Ideal for DSP and data acquisition card interfaces Analog and digital prototyping area for breadbording the target system Stand-alone operation or Eval control board compatibility PC software for control and data analysis LabVIEW1 driver to develop custom application The evaluation board is ideal for use with either Analog Devices EVAL-CONTROL BRD2/BRD3 (EVAL-CONTROL BRDx), DSP based controller board, to run the Analog devices evaluation software and to develop a specific application using LabVIEW, or as a stand-alone evaluation board. The EVAL-CONTROL BRDx is sold separately from the evaluation board, is required to run the evaluation software, is not required in stand alone mode and can be reused with many Analog Devices ADCs. GENERAL DESCRIPTION The EVAL-AD76XXCB 8/10-Pin is an evaluation board for the AD768x/AD769x/AD794x/AD798x 8 and 10-pin PulSAR high resolution ADCs (see the Ordering Guide at the end of this document for a product list). The evaluation board is designed to demonstrate the ADC's performance and to provide an easy to understand interface for a variety of system applications. A full description of the 1 Labview is a trademark of National Instruments. Figure 1. Rev. Pr G Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.326.8703 © 2007 Analog Devices, Inc. All rights reserved. EVAL-AD76XXCB 8/10-Pin Preliminary Technical Data TABLE OF CONTENTS Detailed Description .................................................................... 3 Use as a Standalone Evaluation Board........................................4 Using the EVAL-AD768x/AD769x/AD794xCB Software ...... 3 Ordering Guide .......................................................................... 18 Testing Methods ........................................................................... 3 ESD Caution................................................................................ 18 REVISION HISTORY 03/07—PrG Version 02/06—PrF Version 05/05—PrE Version Rev. Pr G | Page 2 of 18 Preliminary Technical Data EVAL-AD76XXCB 8/10-Pin Detailed Description low distortion AC source. The EVAL-AD76XXCB 8/10-Pin includes a 5V ultrahigh precision reference (ADR435), and a signal conditioning circuit with two opamps (ADA4841-x) and digital logic. The board interfaces with a 96-way connector for the EVAL-CONTROL BRDx and a 26-pin IDC connector for the serial output interface. As an option, an ADG739 multiplexer can be used in front of the ADC to demonstrate performances for multichannel applications. The evaluation board is a four-layer board carefully laid out and tested to demonstrate the specific high accuracy performance of the AD768x/ AD769x/AD794x/AD798x. Figure 2 through Figure 5 show the schematics of the evaluation board. The layouts of the board are shown in the following figures: Using the Software Figure 6: Top-Side Silk-Screen Figure 7: Top-Side Layer Figure 8: Ground Layer Figure 9: Shield Layer Figure 10: Bottom-Side Layer Figure 11: Bottom-Side Silk-Screen The evaluation board has a flexible design that enables the user to choose among many different board configurations. A description of each selectable jumper is listed in Table 1, and the available test points are listed in Table 2. The evaluation board is configured in the factory with the front-end amplifiers U6 and U7 set to a gain of 1. The board is set to be powered through the EVAL-CONTROL BRDx. Buffered conversion data is available at the output parallel bus BD on U3 and on the 96-pin connector P3 and is valid during the falling edge of BBUSY on P3. Activity of the ADC turns on the on-board LED Power Supplies and Grounding The evaluation board has two power supply blocks: A second ADC can be mounted on the board to demonstrate the daisy-chain feature. This configuration requires to use the EVAL-CONTROL BRDx to interface the evaluation board with the PC. Software Description The evaluation board comes with software for analyzing the AD768x/AD769x/AD794x/AD798x. One can perform a histogram to determine code transition noise, and Fast Fourier Transforms (FFT's) to determine the Signal-to-Noise Ratio (SNR), Signal-to-Noise-plus-Distortion (SINAD) and TotalHarmonic-Distortion (THD). The AC performances can also been evaluated after digital filtering (averaging) with enhanced resolution (up to 32 bits). The front-end PC software has four screens: Figure 12 is the Setup Screen where sample rate, number of samples are selected. Figure 13 is the Histogram Screen, which allows the code distribution for DC input and computes the mean and standard deviation. Figure 14 is the FFT Screen, which performs an FFT on the captured data, computes SNR, SINAD and THD. Figure 15 is the time domain representation of the output. When the on-board conversion (CNV) generation is used, a synchronous FFT can be achieved by synchronizing an external AC generator with the 10MHz Fsync signal (J4) a 10 MHz signal, exact division of master clock (MCLK). Figure 16 is the FFT Screen when averaging is used. -SJ1 for the digital interface circuitry and the digital section of the ADC. -SJ2 for the analog section including the signal conditioning and the reference voltage circuitry. These offer flexibility to evaluate the ADC and the surrounding circuitry with any power supply combination. Analog Input Ranges and Multiplexing Software Installation (executable) There is no need to have LabVIEW installed to run the executable. Double-click on Setup.exe in the LabVIEW exe folder from the CD-ROM shipped with the evaluation board (do not use the CD shipped with the EVAL-CONTROL BRDx) and follow the installation instructions. The analog front-end amplifier circuitry U6 and U7 allows flexible configuration changes such as positive or negative gain, input range scaling, filtering, addition of a DC component, and the use of different op-amp and supplies. Developing your own application using LabVIEW The factory configuration of the analog input of U6 and U7 is set at midscale. This allows a transition noise test without any other equipment. An FFT test can be done by applying a very Testing Methods You need LabVIEW 7.1 or above to do this. Install the executable first, copy the folder LabVIEW VI and run the ADC vi example.vi Histogram To perform a histogram test, apply a DC signal to the input. It is Rev. Pr G | Page 3 of 18 EVAL-AD76XXCB 8/10-Pin Preliminary Technical Data advised to filter the signal to make the DC Source noise compatible with that of the ADC. C26 and C41 provide this filtering. Use as a Standalone Evaluation Board AC Testing To perform an AC test, apply a sinusoidal signal to the evaluation board. Low distortion, better than 100dB, is required to allow true evaluation of the part. One possibility is to filter the input signal from the AC source. There is no suggested band-pass filter but consideration should be taken in the choice. You have the option of using the evaluation board as a standalone. This method does not require the EVAL-CONTROL BRDx, nor does it require use of the accompanied software. The ADC serial interface signals are available on P1 (26-pin connector). Decimated Testing (Averaging) This test can be run with a shorted input to evaluate dynamic range or as the AC test. Setup Requirements • EVAL-CONTROL BRDx (ADSP2189) • EVAL-AD76XXCB 8/10-Pin evaluation board • Power supply (AC 12V/1A source could be bought from Analog Devices – sold separately from the EVALCONTROL BRDx) • Parallel port cable (provided with the evaluation control board) • AC source (low distortion) • DC source (low noise) • Band-pass filter (value based on the signal frequency, low distortion) Rev. Pr G | Page 4 of 18 Preliminary Technical Data EVAL-AD76XXCB 8/10-Pin Table 1. Jumper Description Jumper Designation JP1 Default position with the control board ( Factory settings) AMP+ JP2 AMP- JP3 Unip or Diff (see text) JP4 ADR43X JP5 BUF JP6 JP7 JP8 JP9 JP10 JP11 −5V 7V 12 V VDD +VA, +2.5V (for AD798x) 3.3 V JP13 BUF+ JP25 BUF- Function Selection of the IN+ analog signal of U1 and U8, ADC0 and ADC1. Position AMP+ = the signal present on JP13, buffered through U6. Position not in AMP+ = optional multiplexer output, DB, is used. Selection of JP3 source. Position AMP- = the signal present on JP25, buffered through U7. Position not in AMP- = optional multiplexer output, DA, is used. Selection of the IN− analog signal of U1. Position Unip = single-ended ADC: AD7683, AD7685, AD7694, AD7942, AD7946, AD7980. Position Diff = true differential ADC: AD7684, AD7687, AD7688, AD7690, AD7691, AD7693, AD7982. Selection of the reference voltage. Position ADR43X = on board 5V reference voltage is used. Position VDD = the ADC reference is coming from the VDD supply. Selection of the reference voltage. Positon NO BUF = refence present on JP4 (ADR43X or VDD) is selected Position BUF = buffered reference present on JP4 (ADR43X or VDD) is selected. This buffer (AD8032) can help to filter the VDD when used as the reference voltage. Selection for negative supply, VDRV. Selection for positive supply, VDRV+. Selection for reference circuit supply, VREF. Selection for digital output interface voltage, VIO. Selection for ADC, U1 and U8 supply VDD. Selection for FPGA output interface voltage VIO. Must be set at VIO or 3.3V which ever is the lowest. Selection of JP1 source BUF+ = U6 amplifier output. SMB+ = direct input from J1, AIN+ (SMB plug). DIF+ = optional differential amplifer + output. Selection of JP2 source BUF- = U7 amplifier output. SMB- = direct input from J2, AIN-(SMB plug). DIF- = optional differential amplifer - output. Table 2. EVAL-AD768x/AD769x/AD794xCB Test Points Test Point TP1 TP2 TP3 TP4 TP5 TP6 TP7 TP8 TP9 TP10 TP11 TP12 TP13 Mnemonic GND GND SIG+ GND REF SDI CNV SCK SDO SDO2 BBUSY GND SIG- Available Signal Ground Ground ADC Analog input IN+ Ground ADC Reference input ADC (U1) SDI signal ADC CNV signal ADC SCK signal ADC (U1) SDO signal ADC (U8) SDO signal Parallel ADC data valid Ground ADC Analog input Rev. Pr G | Page 5 of 18 D C B A GND TP12 GND J1 AIN+ GND AINJ2 VCM 1 .1uF 590 R60 GND R7 590 R35 C26 49.9 R31 R29 590 0.0 R61 R59 C41 49.9 R34 NOTE: EITHER U7A OR U7B IS USED AT A TIME R43 590 0.0 R10 R5 R1 C53 .1uF C52 VCM SMB- SMB+ SMB+ GND NOTE: EITHER U6A OR U6B IS USED AT A TIME R2 GND 3 C27 .1uF R44 3 4 49.9 U6B U7B GND .1uF 3 2 GND .1uF 3 2 R3 C19 C22 C42 TRIM VOUT 3 5 6 U6A 1 U7A 1 VDRV+ VDRV- 2 VDRV- C29 .1uF OUT 0 R64 R63 10pF-NPO C35 VDRV- 5 0 R75 GND C37 .1uF 6 C34 1uF C6 R57 GND 1 10pF-NPO 5 6 .1uF C20 GND VDRV+ IN U5B 2 AD158X VDRV+ C64 U5A 49.9 C36 3 4 TEMP R42 C28 .1uF GND VREF+ ADR43X NOTE: EITHER U5A OR U5B IS USED AT A TIME 2 GND 2 VREF+ 5 2 BUF+ A VDD DIF+ JP4 SMB+ BUF+ DIF+ 10K R4 3 R6 R9 DIF- SMBBUFDIF- JP1 JP13 AMP+ DB GND 3 DA 3 2 C9 1uF AMP- SIG+ SIG+ JP2 JP25 C59 10K R37 C60 U2A NOTE: GND TP4 C25 .1uF GND 4 JP5 A REF SIG- IN2 4 SGL JP3 DIFF IN2 IN1 1 2 5 GND NOTES: IN- IN+ GND VCM C8 10uF U1B SDI SCK SDO CNV 10 3 IN- IN+ REF GND CNV SDO SCK 2. U1A:AD7683,AD7684, AD7942 OR AD7944 3. EITHER U1A OR U1B IS USED AT A TIME 2 VCM 9 8 7 6 5 5 6 7 U1A GND C1 NOTE: EITHER C1 OR C30, C2 OR C31 C4 OR C32 ARE USED AT A TIME 7 5 1. U1B:AD7685,AD7686,AD7687 AD7688,AD7946 OR AD7947 4 3 AD8032AR U2B JP3 NOTES: IN- IN1 5 6 SGL:AD7683, 7685, 7686, 7942, 7946, 7694 DIFF:AD7684, 7687, 7688,7690, 7691, 7693, 7982 C39 2.7nF-NPO 0 R54 0 R53 C40 2.7nF-NPO GND GND GND 33 R47 SIG- 33 R48 SIGTP13 TP3 SIG+ REF TP5 REF ANY PASSIVE COMPONENTS WITHOUT VALUE ARE NOT POPULATED GND 1 AD8032AR VREF+ 8 4 +VIN GND 2.5/3v 4 8 5 2 7 4 1 7 4 REF VDD OVDD GND 1 8 REF VDD Rev. Pr G | Page 6 of 18 GND Figure 2. Schematic (Analog section) 4 .1uF C30 R38 0.0 VIO C32 C4 REF 6 Rev. : 7 ANALOG EVAL-AD768XCB SDI SCK SDO CNV C2 1/11/2007 SDI SCK SDO CNV .1uF C31 R39 0.0 VDD 6 M.M D C B A EVAL-AD76XXCB 8/10-Pin Preliminary Technical Data Figure 3. Schematic (Digital Section) Rev. Pr G | Page 7 of 18 D C B A GND P2C P2B GND B25 B24 B23 B22 B21 A29 A26 A25 A24 A23 A32 B32 C32 A31 B31 C31 C30 A8 B8 C8 A30 A4 A12 A16 A20 B4 B12 B16 B20 C4 C12 C16 C20 B26 B27 B28 B29 B30 C21 C22 C23 C24 C25 C26 C29 A21 A22 1 1 3.3V -12V VDIG +12V -VA +VA 3.3V JP23 VDIG +12V -VA +VA 2 2 CNV CNV R18 3.3V GND 2 JP11 SDI 1 SDO SCK CNV TP7 K A D2 VIO R19 10K VIO SDI R16 SDI TP6 3 SCK GND 3 .1uF .1uF C48 .1uF .1uF GND R13 10K R8 10K C10 DOUT DIN 14 JP24 13 1 2 22 21 23 10 SDO2 16 SDO2 TP10 3.3V JP16 SDO2 CSVDDI C18 SDO TP9 C17 R25 SDO R22 47K VIO GND JP14 SCKIN JP15 JP17 SCKIN R20 SCK TP8 R21 10K VIO GND R17 10K VIO .1uF C51 U3 GND .1uF C55 .1uF C56 VFPGA EPF6010T(144) .1uF C54 DOUT DIN CSVDDI SDO SDO2 SCKIN SCK CNV SDI 4 C11 .1uF DSPCLK MCLK MODE0 BSD0 C2 C1 C0 SCLK0 TFS0 RFS0 DT0 DR0 MODE1 MODE2 MODE3 BWR BRD RESETD RESETS CONTROL BCS FSYNC ADCOK BD0 BD1 BD2 BD3 BD4 BD5 BD6 BD7 BD8 BD9 BD10 BD11 BD12 BD13 BD14 BD15 AD2 AD1 AD0 BBUSY CONF_D STATUS CONFIG CE MSEL DCLK DATA 4 71 132 47 50 26 12 83 113 116 115 121 117 46 C12 .1uF 1 C15 .1uF 3.3V DSPCLK TP14 TP15 TP16 SCLK0 TFS0 RFS0 DT0 DR0 M0 BSD0 M1 M2 M3 44 45 BWR BRD RESETD 110 111 86 RESETS R32 R15 R14 GND 3.3V GND U4 2 4 GND 3.3V GND 3.3V GND J4 FSYNC VDIG R33 R28 R26 C16 .1uF VDIG OUT 10K 10K 10K 10K R41 10K 10K 10K 10K R40 10K R24 43 10K R27 CONTROL OE CS CASC 49.9 R30 U5 EPC1441 R36 DCLK DATA BCS 3 D1 49.9 2 1 108 ADCOK BD0 BD1 BD2 BD3 BD4 BD5 BD6 BD7 BD8 BD9 BD10 BD11 BD12 BD13 BD14 BD15 AD2 AD1 AD0 BBUSY GND CONF_D STATUS CONFIG DCLK DATA 130 131 49 123 122 118 114 112 109 107 106 97 94 87 84 72 81 82 73 95 96 93 85 105 56 53 4 33 128 125 5 TP1 GND CONFIG TP2 GND C3 .1uF 3 4 6 5 R23 R62 1K BSDO TP17 R58 1K GND DCLK CONF_D CONFIG STATUS DATA SCK BSD0 SDO2 SDO SDI CNV VIO RESETS 1K 3.3V C7 .1uF 2 4 6 8 10 12 14 16 18 20 22 24 26 M3 M2 VDD +12V -VA M0 M1 3.3V GND BD15 BD14 BD13 BD12 BD11 BD10 BD9 BD8 BD7 BD6 BD5 BD4 BD3 BD2 BD1 BD0 AD2 AD1 AD0 BCS BBUSY BRD BWR RESETD CONTROL DT0 TFS0 DSPCLK DR0 SCLK0 RFS0 C19 C18 B18 A18 B17 B15 B14 B13 B11 B10 B9 B7 B6 B5 B3 B2 C14 A14 C15 C10 C17 A9 C9 A17 B1 A5 A6 A19 C5 C7 C6 6 Rev. : 7 DIGITAL EVAL-AD768XCB P1 1/11/2007 1 3 5 7 9 11 13 15 17 19 21 23 25 BBUSY TP11 6 M.M P2A D C B A Preliminary Technical Data EVAL-AD76XXCB 8/10-Pin D C B A 1 VDRV+ VREF+ C72 1uF C33 GND +12V +12V C14 10uF C23 10uF 1uF GND 5 JP7 4 7 8 4 7 8 JP8 C24 10uF VDD OUT OUT FB NC IN IN OUT OUT U14 ADP3334ARM NC IN IN U12 ADP3334ARM 2 3 4 1 +12V C21 10uF VREF+ VDRV+ VDRV+ GND VREF+ VDRV- VDRV- GND SD FB 3 2 1 3 2 1 C73 1uF 2.5V R56 60.4k R55 90.4k GND 7V 2 GND R76 94.5k R77 106.1k C49 VDD GND JP6 -VA VDD JP10 +VA VDDI +12V +VA -VA 2 +VA GND 5 4 +12V 3 1 -VA SJ2 GND VDDE +12V +5V -5V 3 3 GND C58 1uF +12V 4 7 8 C57 NC IN IN OUT OUT U10 ADP3334ACP VDIG 4 GND 4 3 63.4K R52 FB C62 NC IN IN OUT OUT U9 ADP3334ACP 3.3V VDDI 1 2 3 2 SJ1 4 7 8 1 3.3V DGND VIO E 1uF VDIG 1 2 3 JP9 3 2 1 4 1 7 8 3.3V B A C13 10uF C61 SDI CLK CS GND 5 DIN SCK 4 5 CSVDDI 6 U6 .1uF GND C63 VIO 5 AD5160 3.3V GND VIO GND R46 78.7K R45 140K 3.3v NOTE: EITHER VR2 OR AD5160 ARE USED AT A TIME VR2 100K R49 154K VDD FB GND SD 5 6 2 GND SD 5 6 5 6 GND SD 5 6 2 VDD Rev. Pr G | Page 8 of 18 GND Figure 4. Schematic (Power Section) 3 1 DIN SCK CSVDDI 1/11/2007 6 Rev. : 7 POWER EVAL-AD768XCB 6 M.M D C B A EVAL-AD76XXCB 8/10-Pin Preliminary Technical Data Figure 5. Schematic (Option Section) D C B A IN1 IN2 UNI 1 JP12 GND DIFF 3 3 2 4 IN- IN+ IN- IN+ REF GND 5 GND U8B SCK CNV SDO 9 8 7 6 5 6 7 U8A SDI SCK SDO CNV 1 2 10 POSITION A : AD7685,AD7686,AD7683,AD7946,AD7942 POSITION NOT A: AD7687,AD7688,AD7684,AD7947,AD7944 JP12 NOTES: REF VDD OVDD GND 1 8 REF VDD GND GND 2 C43 VIO 3 4 5 6 14 13 12 11 JP20 JP19 JP18 C45 ADUM1402 U7 C44 R51 VDD VDD NOTE: EITHER U7 OR JP18,JP19,20 ARE USED AT A TIME C50 R50 VIO SCKIN CNV SDO2 SCK SDO SCKIN CNV SDO2 SCK SDO 3 NOTE: EITHER C43 OR C50, C44 OR C45 C46 OR C47 ARE USED AT A TIME GND C66 VIO C47 REF C65 JP27 C46 REF 3 DIN SIG+ SIGVCM SMB+ BUF+ DIN SMB+ BUF+ 4 CNV VCM JP26 4 590 R11 C68 GND 4 5 6 7 10 13 12 11 C71 S4B S1B S2B S3B S1A S2A S3A S4A C38 100pF GND JP22 R78 499 R71 590 GND JP21 SIG+ SIG- GND GND R65 590 0 VCM 590 R66 R68 R67 GND GND R69 VDD R70 590 SCK 2 8 1 U11 0 VDRV+ VDRV- R12 1K 6 6 Rev. : 7 OPTION EVAL-AD768XCB DOUT DB DA 1/11/2007 DOUT DB .1uF GND C70 DIF- DIF- DIF+ .1uF GND C69 DIF+ 9 VIO VDRV- 0 R74 VDRV+ R73 DA 5 C5 .1uF 5 4 5 8 GND U13 ADG739 DB DA VCM OUT- OUT+ IN+ IN- R72 GND 0 C67 14 VDD SYNC DIN SCK DOUT 2 3 1 16 3 6 2 15 Rev. Pr G | Page 9 of 18 4 GND 1 M.M D C B A Preliminary Technical Data EVAL-AD76XXCB 8/10-Pin EVAL-AD76XXCB 8/10-Pin Preliminary Technical Data Figure 6. Top-Side Silk-Screen (Not to Scale). Figure 7. Top-Side (Not to Scale). Rev. Pr G | Page 10 of 18 Preliminary Technical Data EVAL-AD76XXCB 8/10-Pin Figure 8. Ground Layer (Not to Scale). Figure 9. Shield Layer (Not to Scale). Rev. Pr G | Page 11 of 18 EVAL-AD76XXCB 8/10-Pin Preliminary Technical Data Figure 10. Bottom-Side Layer (Not to Scale). Figure 11. Bottom-Side Silk-Screen (Not to Scale). Rev. Pr G | Page 12 of 18 Preliminary Technical Data EVAL-AD76XXCB 8/10-Pin 1) The Run button starts the software. This button must be pressed first. 2) The part under evaluation is chosen from this menu. The device must be selected second. 3) Input configurations are chosen here. The available choices are: Interface Mode, ADC (use help (F1) to see the description of each parameter). This is the performance window. These controls are for locking and resetting the display axis to the data minimum and maximum values. 6) These gives direct access to datasheets and evaluation documentation. 5) This window allows the samples to be taken once (F3) or continuous (F4). Also selects: Help screen, Save data to Excel (F5), Print (F8) and Quit (F10). The Help menu shows a description of the functionality of the chosen d Figure 12. Setup Screen Rev. Pr G | Page 13 of 18 4) This window is used to select the test type, number of samples (in K), and conversion mode (continuous or burst). For the test type choose from either: Histogram test AC Test Decimated AC Test EVAL-AD76XXCB 8/10-Pin Preliminary Technical Data The results are displayed in this chart. Also, the cursor (yellow) can be dragged it to a desired location where the X-axis values and the Y-axis value will be displayed. This window shows the ADC range and LSB value in Volts. These control the choice of chart type and X-units. Chart type selection of Histogram or Time and X-units of hexadecimal or Volts. Different measurements are displayed here. The DC value, Transition Noise and other values Figure 13. Histogram Screen Rev. Pr G | Page 14 of 18 Preliminary Technical Data EVAL-AD76XXCB 8/10-Pin The results are displayed in this chart. Also, the cursor (yellow) can be dragged it to a desired location where the X-axis values and the Y-axis value will be displayed. These control the chart type choice of Frequency domain or Time domain and X axis units. AC test results are displayed here. Also the choice of viewing the amplitude of a certain FFT component can be selected from the FFT component menu. Choice of either a Kaiser window or a BlackmannHarris window from the is menu. Figure 14. FFT Screen Rev. Pr G | Page 15 of 18 EVAL-AD76XXCB 8/10-Pin Preliminary Technical Data The AC test can also be displayed in the Time Domain as shown below. To view the Time domain output, select Time in this menu. Figure 15. Time-Domain Screen Rev. Pr G | Page 16 of 18 Preliminary Technical Data EVAL-AD76XXCB 8/10-Pin The results are displayed in this chart. Also, the cursor (yellow) can be dragged it to a desired location where the X-axis values and the Y-axis value will be displayed. The decimation ratio (Dratio) and number of Ksamples are entered here. The Nyquist frequency is displayed here as: AC test results with decimated averaging are shown here. The SNR indicator also represents the dynamic range when no signal is present. FNYQUIST = Figure 16. Decimated (Averaging) Screen Rev. Pr G | Page 17 of 18 FSAMPLE 2 * D RATIO EVAL-AD76XXCB 8/10-Pin Preliminary Technical Data The term AD768x/AD769x/AD794x/AD798x is used in this document to represent all the ADCs listed in the ordering guide. ORDERING GUIDE Evaluation Board Model EVAL-AD7683CBZ EVAL-AD7684CBZ EVAL-AD7685CBZ EVAL-AD7686CBZ EVAL-AD7687CBZ EVAL-AD7688CBZ EVAL-AD7690CBZ EVAL-AD7691CBZ EVAL-AD7693CBZ EVAL-AD7694CBZ EVAL-AD7942CBZ EVAL-AD7946CBZ EVAL-AD7980CBZ EVAL-AD7982CBZ EVAL-CONTROL BRD2 EVAL-CONTROL BRD3 Product AD7683BRMZ AD7684BRMZ AD7685CRMZ AD7686CRMZ AD7687BRMZ AD7688BRMZ AD7690BRMZ AD7691BRMZ AD7693BRMZ AD7694BRMZ AD7942BRMZ AD7946BRMZ AD7980BRMZ AD7982BRMZ Controller Board Controller Board ESD CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. Rev. Pr G | Page 18 of 18 PR05105-0-3/07(PrG)