Product Overview

Product Overview
MC74VHC138: 3-to-8 Line Decoder
For complete documentation, see the data sheet
Product Description
The MC74VHC138 is an advanced high speed CMOS 3-to-8 decoder fabricated with silicon gate CMOS technology. It achieves high
speed operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation.
When the device is enabled, three Binary Select inputs (A0 - A2) determine which one of the outputs (Y0 - Y7) will go Low. When
enable input E3 is held Low or either E2bar or E1bar is held High, decoding function is inhibited and all outputs go high. E3, E2bar,
and E1bar inputs are provided to ease cascade connection and for use as an address decoder for memory systems.
The internal circuit is composed of three stages, including a buffer output which provides high noise immunity and stable output. The
inputs tolerate voltages up to 7V, allowing the interface of 5V systems to 3V systems.
Features
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High Speed: tPD = 5.7ns (Typ) at VCC = 5V
Low Power Dissipation: ICC = 4<FONT FACE=SYMBOL>m</FONT>A (Max) at TA = 25°C
High Noise Immunity: VNIH = VNIL = 28% VCC
Power Down Protection Provided on Inputs
Balanced Propagation Delays
Designed for 2V to 5.5V Operating Range
Low Noise: VOLP = 0.8 V (Max)
Pin and Function Compatible with Other Standard Logic Families
Latchup Performance Exceeds 300mA
ESD Performance: HBM > 2000V; Machine Model > 200V
For more features, see the data sheet
Part Electrical Specifications
Product
MC74VHC138DG
Compliance
Status
Channels
VCC Min (V)
VCC Max (V)
tpd Max (ns)
IO Max (mA)
Package Type
Pb-free
Active
1
2
5.5
10.1
8
SOIC-16
Active
1
2
5.5
10.1
8
SOIC-16
Active
1
2
5.5
10.1
8
TSSOP-16
Halide free
MC74VHC138DR2G
Pb-free
Halide free
MC74VHC138DTR2G
Pb-free
Halide free
For more information please contact your local sales support at www.onsemi.com
Created on: 6/30/2016