INTEGRATED CIRCUITS 74F280B 9-bit odd/even parity generator/checker Product specification IC15 Data Handbook 1996 Mar 12 Philips Semiconductors Product specification 9-bit odd/even parity generator/checker FEATURES 74F280B PIN CONFIGURATION • High-impedance NPN base inputs for reduced loading (20µA in Low and High states) • Buffered inputs — one normalized load • Word length easily expanded by cascading • Industrial temperature range available (–40°C to +85°C) 1 14 VCC I7 2 13 I5 NC 3 12 I4 I8 4 11 ΣE 5 10 I2 ΣO 6 9 I1 GND 7 8 I0 DESCRIPTION The 74F280B is a 9-bit Parity Generator or Checker commonly used to detect errors in high speed data transmission or data retrieval systems. Both Even (∑E) and Odd (∑O) parity outputs are available for generating or checking even or odd parity on up to 9 bits. I6 I3 SF00849 The Even (∑E) parity output is High when an even number of Data inputs (I0 - I8) are High. The Odd (∑O) parity output is High when an odd number of Data inputs are High. Expansion to larger word sizes is accomplished by tying the Even (∑E) outputs of up to nine parallel devices to the data inputs of the final stage. This expansion scheme allows an 81-bit data word to be checked in less than 20ns. TYPE TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT (TOTAL) 74F280B 5.5ns 26mA ORDERING INFORMATION DESCRIPTION COMMERCIAL RANGE VCC = 5V ±10%, Tamb = 0°C to +70°C INDUSTRIAL RANGE VCC = 5V ±10%, Tamb = –40°C to +85°C 14-pin plastic DIP N74F280BN I74F280BN SOT27-1 14-pin plastic SO N74F280BD I74F280BD SOT108-1 PKG. DWG. # INPUT AND OUTPUT LOADING AND FAN-OUT TABLE PINS DESCRIPTION 74F(U.L.) HIGH/LOW LOAD VALUE HIGH/LOW I0 - I8 Data inputs 1.0/0.033 20µA/20µA ∑E , ∑O Parity outputs 50/33 1.0mA/20mA NOTE: One (1.0) FAST Unit Load is defined as: 20µA in the High state and 0.6mA in the Low state. LOGIC SYMBOL 8 IEC/IEEE SYMBOL 9 10 11 12 13 1 2 4 8 2K 9 I0 I1 I2 I3 I4 I5 I6 I7 10 I8 11 ΣE 5 ΣO 6 12 ΣE ΣO 13 1 2 5 6 4 VCC=Pin 14 GND=Pin 7 SF00845 1996 Mar 12 2 SF00846 853-0363 16555 Philips Semiconductors Product specification 9-bit odd/even parity generator/checker 74F280B LOGIC DIAGRAM I0 I1 I2 I3 I4 I5 I6 I7 I8 8 9 10 ΣE 6 ΣO 11 12 13 1 2 4 VCC=Pin 14 GND=Pin 7 SF00847 FUNCTION TABLE INPUTS OUTPUTS Number of High Data Inputs (I0 - I8) ∑E Even — 0, 2, 4, 6, 8 H L L H Odd — 1, 3, 5, 7, 9 H = High voltage level L = Low voltage level 1996 Mar 12 5 ∑O 3 Philips Semiconductors Product specification 9-bit odd/even parity generator/checker 74F280B ABSOLUTE MAXIMUM RATINGS RATING UNIT VCC SYMBOL Supply voltage PARAMETER –0.5 to +7.0 V VIN Input voltage –0.5 to +7.0 V IIN Input current –30 to +5 mA VOUT Voltage applied to output in High output state –0.5 to VCC V IOUT Current applied to output in Low output state Tamb Operating free-air free air temperature range Tstg Storage temperature Commercial range Industrial range 40 mA 0 to +70 °C –40 to +85 °C –65 to +150 °C RECOMMENDED OPERATING CONDITIONS SYMBOL LIMITS PARAMETER Min Nom Max 5.0 5.5 UNIT VCC Supply voltage 4.5 VIH High-level input voltage 2.0 VIL Low-level input voltage 0.8 V IIK Input clamp current –18 mA IOH High-level output current –1 mA IOL Low-level output current Tamb Operating free-air free air temperature range Commercial range Industrial range V V 20 mA 0 70 °C –40 85 °C DC ELECTRICAL CHARACTERISTICS (Over recommended operating free-air temperature range unless otherwise noted.) SYMBOL PARAMETER TEST CONDITIONS1 LIMITS MIN TYP2 ±10%VCC 2.5 VIH = MIN, IOH = MAX ±5%VCC 2.7 VCC = MIN, VIL = MAX ±10%VCC 0.35 0.50 VIH = MIN, IOL = MAX ±5%VCC 0.35 0.50 –0.73 –1.2 V 100 µA 20 µA 40 µA –20 µA –150 mA 35 mA High level output voltage High-level VOL O Low level output voltage Low-level VIK Input clamp voltage VCC = MIN, II = IIK II Input current at maximum input voltage VCC = 0.0V, VI = 7.0V IIH High level input current High-level IIL Low-level input current V 3.4 V Commercial range current3 IOS Short-circuit output ICC Supply current (total) UNIT VCC = MIN, VIL = MAX VOH O Industrial range MAX VCC = MAX, MAX VI = 2 2.7V 7V VCC = MAX, VI = 0.5V VCC = MAX VCC = MAX –60 26 NOTES: 1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type. 2. All typical values are at VCC = 5V, Tamb = 25°C. 3. Not more than one output should be shorted at a time. For testing IOS, the use of high-speed test apparatus and/or sample-and-hold techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any sequence of parameter tests, IOS tests should be performed last. 1996 Mar 12 4 Philips Semiconductors Product specification 9-bit odd/even parity generator/checker 74F280B AC ELECTRICAL CHARACTERISTICS LIMITS SYMBOL TEST CONDITIONS PARAMETER tPLH tPHL Propagation delay I0 - I8 to ΣE tPLH tPHL Propagation delay I0 - I8 to ΣO Tamb= +25°C VCC = +5 +5.V V CL = 50pF, RL = 500Ω Tamb = 0°C to +70°C VCC = +5.V +5 V ± 10% CL = 50pF, RL = 500Ω Tamb = -40°C to +85°C VCC = +5.V +5 V ± 10% CL = 50pF, RL = 500Ω UNIT Min Typ Max Min Max Min Max Waveform 1, 2 4.0 4.0 6.5 7.0 9.0 10.0 3.5 3.5 10.0 11.1 3.0 3.5 11.0 12.0 ns ns Waveform 1, 2 4.0 4.0 6.5 7.0 9.0 10.0 3.5 3.5 10.0 11.0 3.0 3.5 11.0 12.0 ns ns 74F280B AC WAVEFORMS For all waveforms, VM=1.5V. VM I0 - I8 VM tPHL VM I0 - I8 tPLH tPLH ΣE, ΣO VM VM VM tPHL VM ΣE, ΣO VM SF00848 Waveform 1. SF00850 Propagation Delay for Inverting Outputs Waveform 2. Propagation Delay for Non-Inverting Outputs TEST CIRCUIT AND WAVEFORM VCC NEGATIVE PULSE VIN tw 90% VM D.U.T. RT CL RL AMP (V) VM 10% VOUT PULSE GENERATOR 90% 10% tTHL (tf ) tTLH (tr ) tTLH (tr ) tTHL (tf ) 0V AMP (V) 90% 90% POSITIVE PULSE DEFINITIONS: RL = Load resistor; see AC ELECTRICAL CHARACTERISTICS for value. CL = Load capacitance includes jig and probe capacitance; see AC ELECTRICAL CHARACTERISTICS for value. RT = Termination resistance should be equal to ZOUT of pulse generators. VM VM 10% Test Circuit for Totem-Pole Outputs 10% tw 0V Input Pulse Definition INPUT PULSE REQUIREMENTS family amplitude VM 74F 3.0V 1.5V rep. rate tw tTLH tTHL 1MHz 500ns 2.5ns 2.5ns SF00006 1996 Mar 12 5 Philips Semiconductors Product specification 9-bit parity odd/even parity generator/checker DIP14: plastic dual in-line package; 14 leads (300 mil) 1996 Mar 12 6 74F280B SOT27-1 Philips Semiconductors Product specification 9-bit parity odd/even parity generator/checker SO14: plastic small outline package; 14 leads; body width 3.9 mm 1996 Mar 12 7 74F280B SOT108-1 Philips Semiconductors Product specification 9-bit parity odd/even parity generator/checker 74F280B Data sheet status Data sheet status Product status Definition [1] Objective specification Development This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. Preliminary specification Qualification This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. Product specification Production This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. [1] Please consult the most recently issued datasheet before initiating or completing a design. Definitions Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Disclaimers Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Copyright Philips Electronics North America Corporation 1999 All rights reserved. Printed in U.S.A. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381 Date of release: 12-99 Document order number: 1996 Mar 12 8 9397 750 06706