INTEGRATED CIRCUITS 74F540 Octal inverter buffer (3- State) 74F541 Octal buffer (3- State) Product specification IC15 Data Handbook 1990 Jan 08 Philips Semiconductors Product specification Buffers 74F540, 74F541 74F540 Octal Inverter Buffer (3-State) 74F541 Octal Buffer (3-State) FEATURES • High impedance NPN base inputs for reduced loading TYPE TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT (TOTAL) 74F540 3.5ns 58mA 74F541 5.5ns 55mA (20µA in High and Low states) • Low power, light bus loading • Functionally similar to the 74F240 and 74F241 • Provides ideal interface and increases fan-out of MOS microprocessors ORDERING INFORMATION • Efficient pinout to facilitate PC board layout • Octal bus interface • 3-State buffer outputs sink 64mA • 15mA source current COMMERCIAL RANGE VCC = 5V ±10%, Tamb = 0°C to +70°C DESCRIPTION PKG DWG # 20-Pin Plastic DIP N74F540, N74F541N SOT146-1 20-Pin Plastic SOL N74F540D, N74F541D SOT163-1 DESCRIPTION The 74F540 and 74F541 are octal buffers that are ideal for driving bus lines or buffer memory address registers. The outputs are capable of sinking 64mA and sourcing up to 15mA, producing very good capacitive drive characteristics. The devices feature input and outputs on opposite sides of the package to facilitate printed circuit board layout. INPUT AND OUTPUT LOADING AND FAN-OUT TABLE PINS DESCRIPTION 74F(U.L.) HIGH/LOW LOAD VALUE HIGH/LOW I0–I7 Data inputs 1.0/0.033 20µA/20µA OE0, OE1 3-State output enable inputs (active Low) 1.0/0.033 20µA/20µA Y0 - Y7 Data outputs (74F541) 750/106.7 15mA/64mA Y0 - Y7 Data outputs (74F540) 750/106.7 15mA/64mA NOTE: One (1.0) FAST Unit Load is defined as: 20µA in the High state and 0.6mA in the Low state. PIN CONFIGURATION – 74F540 OE0 1 PIN CONFIGURATION – 74F541 20 VCC OE0 1 20 VCC 2 19 OE1 I0 2 19 OE1 I0 I1 3 18 Y0 I1 3 18 Y0 I2 4 17 Y1 I2 4 17 Y1 I3 5 16 Y2 I3 5 16 Y2 I4 6 15 Y3 I4 6 15 Y3 I5 7 14 Y4 I5 7 14 Y4 I6 8 13 Y5 I7 9 12 Y6 I6 8 13 Y5 I7 9 12 Y6 GND 10 GND 10 11 Y7 SF01060 1990 Jan 08 11 Y7 SF01021 2 853–0068 98494 Philips Semiconductors Product specification Buffers 74F540, 74F541 LOGIC SYMBOL – 74F540 1 19 VCC = Pin 20 GND = Pin 10 LOGIC SYMBOL – 74F541 2 3 4 5 6 7 8 9 2 3 4 5 6 7 8 9 I0 I1 I2 I3 I4 I5 I6 I7 I0 I1 I2 I3 I4 I5 I6 I7 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 18 17 16 15 14 13 12 11 OE0 1 OE0 OE1 19 OE1 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 18 17 16 15 14 13 12 11 VCC = Pin 20 GND = Pin 10 SF01022 SF01023 LOGIC SYMBOL (IEEE/IEC) – 74F540 1 LOGIC SYMBOL (IEEE/IEC) – 74F541 1 & EN 19 & EN 19 2 3 4 5 6 7 8 9 18 2 18 17 3 17 16 4 16 15 5 15 14 6 14 13 7 13 12 8 12 11 9 11 SF01024 SF01025 LOGIC DIAGRAM – 74F540 LOGIC DIAGRAM – 74F541 OE0 1 OE1 I0 2 18 I1 3 17 Y1 I1 3 17 I2 4 16 Y2 I2 4 16 5 15 Y3 I3 5 15 Y4 I4 6 14 Y5 I5 7 13 Y6 I6 8 12 I7 9 11 6 14 I5 7 13 8 12 I4 I6 I7 1990 Jan 08 OE1 19 Y0 I3 Pin 20 Pin 10 2 1 18 I0 VCC = GND = OE0 19 9 11 Y7 VCC = GND = SF01026 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 Pin 20 Pin 10 SF01027 3 Philips Semiconductors Product specification Buffers 74F540, 74F541 FUNCTION TABLE OUTPUTS INPUTS H L X Z 74F541 74F540 OE0 OE1 In Yn Yn L L X H L L H X L H X X L H Z Z H L Z Z = = = = High voltage level Low voltage level Don’t care High impedance “off” state ABSOLUTE MAXIMUM RATINGS (Operation beyond the limits set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the operating free-air temperature range.) SYMBOL RATING UNIT VCC Supply voltage PARAMETER –0.5 to +7.0 V VIN Input voltage –0.5 to +7.0 V IIN Input current –30 to +5.0 mA VOUT Voltage applied to output in High output state –0.5 to +VCC V IOUT Current applied to output in Low output state Tamb Operating free-air temperature range Tstg Storage temperature 128 mA 0 to +70 °C –65 to +150 °C RECOMMENDED OPERATING CONDITIONS SYMBOL LIMITS PARAMETER MIN NOM MAX 5.0 5.5 UNIT VCC Supply voltage 4.5 VIH High-level input voltage 2.0 VIL Low-level input voltage 0.8 V IIK Input clamp current –18 mA IOH High-level output current –15 mA IOL Low-level output current 64 mA Tamb Operating free-air temperature range 70 °C 1990 Jan 08 0 4 V V Philips Semiconductors Product specification Buffers 74F540, 74F541 DC ELECTRICAL CHARACTERISTICS (Over recommended operating free-air temperature range unless otherwise noted.) LIMITS SYMBOL TEST CONDITIONSNO TAG PARAMETER MIN VOH O VCC = MIN, VIL = MAX MAX, VIH = MIN High level output voltage High-level VCC = MIN, VIL = MAX, MAX VIH = MIN IOH 3mA O = –3mA IOH 15mA O = –15mA ±10%VCC 2.4 TYP NO TAG UNIT MAX V ±5%VCC 2.7 ±10%VCC 2.0 V ±5%VCC 2.0 V 3.4 ±10%VCC V 0.55 V 0.42 0.55 V –0.73 –1.2 V 100 µA VCC = MAX, VI = 2.7V 20 µA VCC = MAX, VI = 0.5V –20 µA Off-state output current High-level voltage applied VCC = MAX, VO = 2.7V 50 µA IOZL Off-state output current Low-level voltage applied VCC = MAX, VO = 0.5V –50 µA IOS Short-circuit output currentNO TAG –225 mA VOL O Low level output voltage Low-level VIK Input clamp voltage II Input current at maximum input voltage VCC = 0.0V, VI = 7.0V IIH High-level input current IIL Low-level input current IOZH 74F540 ICC VCC = MAX –100 ICCH In=OEn=GND 22 30 mA ICCL In=4.5V, OEn=GND 58 75 mA In=GND, OEn=4.5V 40 55 mA In=4.5V, OEn=GND 30 40 mA ICCL In=OEn=GND 55 72 mA ICCZ In=GND, OEn=4.5V 45 58 mA ICCH 74F541 ±5%VCC VCC = MIN, II = IIK ICCZ Supply y current (total) IOL O = MAX VCC = MAX NOTES: 1. For conditions shown as MIN or MAX, use the appropriate value under the recommended operating conditions for the applicable type. 2. All typical values are at VCC = 5V, Tamb = 25°C. 3. Not more than one output should be shorted at a time. For testing IOS, the use of high-speed test apparatus and/or sample-and-hold techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any sequence of parameter tests, IOS should be performed last. 1990 Jan 08 5 Philips Semiconductors Product specification Buffers 74F540, 74F541 AC ELECTRICAL CHARACTERISTICS LIMITS SYMBOL Tamb = +25°C VCC = +5.0V CL = 50pF, RL = 500Ω TEST CONDITIONS PARAMETER Tamb = 0°C to +70°C VCC = +5.0V ± 10% CL = 50pF, RL = 500Ω UNIT MIN TYP MAX MIN MAX Waveform 1 3.0 1.5 4.5 2.5 6.5 4.5 2.5 1.5 7.5 5.0 ns ns Waveform 3 Waveform 4 2.0 4.0 3.5 7.5 6.5 9.5 2.0 4.0 7.0 10.0 ns ns Output Disable time from High or Low level Waveform 3 Waveform 4 2.0 2.0 4.0 4.0 6.0 5.5 2.0 2.0 6.5 6.0 ns ns tPLH tPHL Propagation delay In to Yn Waveform 2 2.5 3.5 5.0 6.0 6.5 7.0 2.5 3.0 7.0 7.5 ns ns tPZH tPZL Output Enable time to High or Low level Waveform 3 Waveform 4 3.0 3.0 5.5 6.5 7.0 8.5 3.0 3.0 7.5 9.5 ns ns tPZH tPZL Output Disable time from High or Low level Waveform 3 Waveform 4 2.0 2.0 4.0 4.0 7.0 7.0 2.0 2.0 7.5 7.5 ns ns tPLH tPHL Propagation delay In to Yn tPZH tPZL Output Enable time to High or Low level tPZH tPZL 74F540 74F541 AC WAVEFORMS For all waveforms, VM = 1.5V. In VM In VM tPHL VM tPLH Yn VM VM tPLH tPHL VM VM Yn VM SF00150 SF01028 Waveform 2. Propagation Delay Data to Outputs for 74F541 Waveform 1. Propagation Delay Data to Outputs for 74F540 OEn VM tPZH Yn, Yn OEn VM tPHZ VOH -0.3V VM tPZL Yn, Yn VM 0V tPLZ VM VOL +0.3V SF01031 SF01030 Waveform 3. 3-State Output Enable Time to High Level and Output Disable Time from High Level 1990 Jan 08 VM Waveform 4. 3-State Output Enable Time to Low Level and Output Disable Time from Low Level 6 Philips Semiconductors Product specification Buffers 74F540, 74F541 TEST CIRCUIT AND WAVEFORM VCC 7.0V VIN RL VOUT PULSE GENERATOR tw 90% NEGATIVE PULSE VM CL AMP (V) VM 10% D.U.T. RT 90% 10% tTHL (tf ) tTLH (tr ) tTLH (tr ) tTHL (tf ) 0V RL AMP (V) 90% 90% Test Circuit for 3-State Outputs POSITIVE PULSE VM VM 10% TEST tPLZ tPZL All other SWITCH closed closed open DEFINITIONS: RL = Load resistor; see AC electrical characteristics for value. CL = Load capacitance includes jig and probe capacitance; see AC electrical characteristics for value. RT = Termination resistance should be equal to ZOUT of pulse generators. 10% tw SWITCH POSITION 0V Input Pulse Definition INPUT PULSE REQUIREMENTS family amplitude VM 74F 3.0V 1.5V rep. rate tw tTLH tTHL 1MHz 500ns 2.5ns 2.5ns SF00777 1990 Jan 08 7 Philips Semiconductors Product specification Buffers 74F540, 74F541 DIP20: plastic dual in-line package; 20 leads (300 mil) 1990 Jan 08 8 SOT146-1 Philips Semiconductors Product specification Buffers 74F540, 74F541 SO20: plastic small outline package; 20 leads; body width 7.5 mm 1990 Jan 08 9 SOT163-1 Philips Semiconductors Product specification Buffers 74F540, 74F541 Data sheet status Data sheet status Product status Definition [1] Objective specification Development This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. Preliminary specification Qualification This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make chages at any time without notice in order to improve design and supply the best possible product. Product specification Production This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. [1] Please consult the most recently issued datasheet before initiating or completing a design. Definitions Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Disclaimers Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Copyright Philips Electronics North America Corporation 1998 All rights reserved. Printed in U.S.A. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381 print code Document order number: yyyy mmm dd 10 Date of release: 10-98 9397-750-05134