V6213621 VID

REVISIONS
LTR
DESCRIPTION
DATE
Prepared in accordance with ASME Y14.24
APPROVED
Vendor item drawing
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PMIC N/A
PREPARED BY
Phu H. Nguyen
Original date of drawing
YY MM DD
CHECKED BY
14-02-18
4
Phu H. Nguyen
APPROVED BY
Thomas M. Hess
SIZE
A
REV
AMSC N/A
CODE IDENT. NO.
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DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
http://www.landandmaritime.dla.mil/
TITLE
MICROCIRCUIT, LINEAR, RS-232
TRANSCEIVER WITH SPLIT SUPPLY PIN FOR
LOGIC SIDE, MONOLITHIC SILICON
DWG NO.
V62/13621
16236
PAGE
1
OF
15
5962-V045-14
1. SCOPE
1.1 Scope. This drawing documents the general requirements of a high performance RS-232 transceiver with split supply pin for
logic side microcircuit, with an operating temperature range of -55°C to +125°C.
1.2 Vendor Item Drawing Administrative Control Number. The manufacturer’s PIN is the item of identification. The vendor item
drawing establishes an administrative control number for identifying the item on the engineering documentation:
V62/13621
-
Drawing
number
01
X
E
Device type
(See 1.2.1)
Case outline
(See 1.2.2)
Lead finish
(See 1.2.3)
1.2.1 Device type(s).
Device type
Generic
01
Circuit function
TRS3253E-EP
RS-232 transceiver with split supply pin for logic side
1.2.2 Case outline(s). The case outlines are as specified herein.
Outline letter
Number of pins
X
Package style
32
Plastic quad flatpack no-lead
1.2.3 Lead finishes. The lead finishes are as specified below or other lead finishes as provided by the device manufacturer:
Finish designator
A
B
C
D
E
Z
DLA LAND AND MARITIME
COLUMBUS, OHIO
Material
Hot solder dip
Tin-lead plate
Gold plate
Palladium
Gold flash palladium
Other
SIZE
A
CODE IDENT NO.
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2
1.3 Absolute maximum ratings.
1/
VCC to GND .........................................................................................................................................
VL to GND ..........................................................................................................................................
V+ to GND ..........................................................................................................................................
V- to GND ..........................................................................................................................................
Maximum V+ + |V-| .............................................................................................................................
Input voltage, (VI):
�������������� to GND, FORCEON to GND ...........................................................................
DIN, FORCEOFF
Maximum RIN to GND ................................................................................................................
-0.3 V to 6.0 V
-0.3 V to VCC + 0.3 V
-0.3 V to 7.0 V
0.3 V to -7.0 V
13.0 V
2/
Junction temperature, (TJ) ..................................................................................................................
Storage temperature, (Tstg) ...............................................................................................................
Typical ESD protection, (RIN, DOUT):
Human Body Model ....................................................................................................................
IEC 61000-4-2 Air Gap discharge ...............................................................................................
IEC 61000-4-2 Contact discharge ...............................................................................................
150°C
-65°C to 150°C
-0.3 V to 6.0 V
±25.0 V
Output voltage, (VO):
Maximum DOUT to GND ............................................................................................... ±13.2 V
ROUT ............................................................................................................................. -0.3 V to VL + 0.3 V
±15 kV
±8 kV
±8 kV
1.4 Recommended operating conditions.
Supply voltage, (VCC) .........................................................................................................................
Supply voltage, (VL) ...........................................................................................................................
��������������, FORCEON):
Maximum input logic threshold low, (DIN, FORCEOFF
VL = 3.0 V or 5.5 V ......................................................................................................................
VL = 2.3 V ....................................................................................................................................
VL = 1.65 V ..................................................................................................................................
��������������, FORCEON):
Minimum input logic threshold high, (DIN, FORCEOFF
VL = 5.5 V ....................................................................................................................................
VL = 3.0 V ....................................................................................................................................
VL = 2.3 V ....................................................................................................................................
VL = 1.65 V ..................................................................................................................................
Operating temperature .......................................................................................................................
Receiver input voltage ........................................................................................................................
1/
2/
3.0 V to 5.5 V
1.65 V to VCC
0.8 V
0.6 V
0.5 V
2.4 V
2.0 V
1.4 V
1.25 V
-55°C to 125°C
-25 V to 25 V
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress
ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended
operating conditions” is not implied. Exposure to absolute maximum rated conditions for extended periods may affect device
reliability.
V+ and V- can have maximum magnitudes of 7 V, but their absolute difference cannot exceed 13 V.
DLA LAND AND MARITIME
COLUMBUS, OHIO
SIZE
A
CODE IDENT NO.
16236
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DWG NO.
V62/13621
PAGE
3
2. APPLICABLE DOCUMENTS
INTERNATIONAL ELECTROTECHNICAL COMMISSION (IEC)
IEC 61000-4-2
–
Testing and measurement techniques –Electrostatic discharge immunity test
(Copies of these documents are available online at http:/www.iec.ch or IEC Regional Center for America (IEC-ReCNA) , 446 Main St.,
th
16 Floor, Worcester, MA 01608).
3. REQUIREMENTS
3.1 Marking. Parts shall be permanently and legibly marked with the manufacturer’s part number as shown in 6.3 herein and as
follows:
A.
B.
C.
Manufacturer’s name, CAGE code, or logo
Pin 1 identifier
ESDS identification (optional)
3.2 Unit container. The unit container shall be marked with the manufacturer’s part number and with items A and C (if applicable)
above.
3.3 Electrical characteristics. The maximum and recommended operating conditions and electrical performance characteristics are as
specified in 1.3, 1.4, and table I herein.
3.4 Design, construction, and physical dimension. The design, construction, and physical dimensions are as specified herein.
3.5 Diagrams.
3.5.1
Case outline. The case outline shall be as shown in 1.2.2 and figure 1.
3.5.2
Terminal connections. The terminal connections shall be as shown in figure 2.
3.5.3
Terminal function. The terminal function shall be as shown in figure 3.
3.5.4
Function table. The function table shall be as shown in figure 4.
3.5.5
Functional block diagram. The functional block diagram shall be as shown in figure 5.
3.5.6
Driver slew rate. The driver slew rate shall be as shown in figure 6.
3.5.7
Driver pulse skew. The driver pulse skew shall be as shown in figure 7.
3.5.8
Receiver propagation delay times. The receiver propagation delay times shall be as shown in figure 8.
3.5.9
Receiver enable and disable times. The receiver enable and disable times shall be as shown in figure 9.
3.5.10
����������� propagation delay times and supply enabling time. The INVALID
����������� propagation delay times and supply enabling
INVALID
time shall be as shown in figure 10.
DLA LAND AND MARITIME
COLUMBUS, OHIO
SIZE
A
CODE IDENT NO.
16236
REV
DWG NO.
V62/13621
PAGE
4
TABLE I. Electrical performance characteristics. 1/
Test
Symbol
Electrical characteristics 4/
��������������
Input leakage current
FORCEOFF,
FORCEON
Auto powerdown
plus disabled
Supply current
(TA = 25°C)
Power off
Auto powerdown
plus enabled
Limits
Test conditions
2/
Min
Typ 3/
Max
±0.01
±2.9
µA
0.5
1.11
mA
1
1
10
10
µA
±0.05
±25
0.4
µA
V
V
V
V
V
V
V
kΩ
II
No load,
ICC
�������������� and FORCEON at VCC
FORCEOFF
RECEIVER SECTION
Electrical characteristics
Output leakage current
Output voltage low
Output voltage high
Input threshold low
Ioff
VOL
VOH
VIT-
TA = 25°C
Input threshold high
VIT+
TA = 25°C
Input hysteresis
Input resistance
Switching characteristics
Receiver propagation delay
Vhys
5/ 6/
VL = 5 V
VL = 3.3 V
VL = 5 V
VL = 3.3 V
Receiver skew
Receiver output enable time
Receiver output disable time
tdis
See footnote at end of table.
DLA LAND AND MARITIME
COLUMBUS, OHIO
VL – 0.6
0.8
0.6
3
TA = 25°C
tPHL
tPLH
tPHL - tPLH
ten
Unit
VL – 0.1
1.2
1.5
1.8
1.5
0.5
5
Receiver input to receiver output
CL = 150 pF
��������������
From FORCEOFF
From ��������������
FORCEOFF
SIZE
A
CODE IDENT NO.
16236
REV
2.4
2.4
7
0.15
0.15
50
200
µs
200
ns
ns
ns
DWG NO.
V62/13621
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5
TABLE I. Electrical performance characteristics - Continued. 1/
Test
Symbol
Limits
Test conditions
5/
Min
Typ
±5
±5.4
300
10M
Unit
Max
DRIVER SECTION
Electrical characteristics
Output voltage swing
VOH
Output resistance
Output short circuit current
rO
IOS
All driver output load with 3 kΩ to ground,
VCC = 3.1 V to 5.5 V
VCC = V+ = V- = 0, Driver output = ±2V
VT_OUT = 0
IOZ
VT_OUT = ±12 V, ��������������
FORCEOFF = GND,
VCC = 3 V to 3.6 V
Output leakage current
Driver input hysteresis
Input leakage current
Timing requirements
Maximum data rate
Time to exit powerdown
Driver skew 7/
VT_OUT = ±12 V, ��������������
FORCEOFF = GND,
VCC = 4.5 V to 5.5 V
��������������, FORCEON
DIN, FORCEOFF
±0.01
RL = 3 kΩ, CL = 200 pF, One driver switching
|VT_OUT| > 3.7 V
±60
±25
Ω
mA
µA
0.5
±2.9
V
µA
150
kbps
µs
ns
V/µs
2.7
V
1000
100
100
|tPHL - tPLH|
VCC = 3.3 V,
CL = 150 pF to 1000 pF
TA = 25°C,
Transition region slew rate
RL = 3 kΩ to 7 kΩ,
Measured from
3 V to -3V or
-3 V to 3 V
AUTO POWERDOWN SECTION
Electrical characteristics
6/ 8/ (See FIGURE xx)
Receiver input threshold for
VT+(valid)
�������������� = VL
FORCEON = GND, FORCEOFF
����������� high level output voltage
INVALID
Receiver input threshold for
VIT-(valid)
�������������� = VL
FORCEON = GND, FORCEOFF
����������� high level output voltage
INVALID
Receiver input threshold for
VT(invalid)
FORCEON = GND, ��������������
FORCEOFF = VL
����������� low level output voltage
INVALID
�����������
VOH
INVALID high level output voltage
IOH = -1 mA, FORCEON = GND, ��������������
FORCEOFF = VL
�����������
�������������� = VL
VOL
INVALID low level output voltage
IOH = 1.6 mA, FORCEON = GND, FORCEOFF
V
15
-2.7
-0.3
0.3
VL – 0.6
Switching characteristic 6/ 8/ (See FIGURE xx)
Propagation delay time, low to
tvalid
high level output
Propagation delay time, high to
tinvalid
low level output
Supply enable time
ten
Receiver or driver edge to auto
tdis
powerdown plus
0.4
0.1
µs
50
25
30
µs
See footnote at end of table.
DLA LAND AND MARITIME
COLUMBUS, OHIO
SIZE
A
CODE IDENT NO.
16236
REV
DWG NO.
V62/13621
PAGE
6
TABLE I. Electrical performance characteristics - Continued. 1/
1/
2/
3/
4/
5/
6/
7/
8/
Testing and other quality control techniques are used to the extent deemed necessary to assure product performance over the
specified temperature range. Product may not necessarily be tested across the full temperature range and all parameters may not
necessarily be tested. In the absence of specific parametric testing, product performance is assured by characterization and/or
design.
Over operating free air temperature range, VCC = VL = 3 V to 5.5 V, C1 – C4 = 0.1 µF (tested at 3.3 V ±10%), C1 = 0.047 µF,
C2 – C4 = 0.33 µF (tested at 5 V ±10%) (unless otherwise noted).
All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C.
Testing supply conditions are C1-C4 = 0.1 µF at VCC = 3.3 V ±0.15 V; C1-C4 = 0.22 µF at VCC = 3.3 V ±0.3 V, and C1 = 0.047 µF and
C2-C4 = 0.33 µF at VCC = 5 V ±0.5 V.
Over operating free air temperature range, VCC = VL = 3 V to 5.5 V, C1 – C4 = 0.1 µF (tested at 3.3 V ±10%), C1 = 0.047 µF,
C2 – C4 = 0.33 µF (tested at 5 V ±10%), TA = TMIN to TMAX (unless otherwise noted).
Typical values are at VCC = VL = 3.3 V, TA = 25°C
Driver skew is measured at the driver zero cross point.
Over recommended ranges of supply voltage and operating free air temperature (unless otherwise noted).
DLA LAND AND MARITIME
COLUMBUS, OHIO
SIZE
A
CODE IDENT NO.
16236
REV
DWG NO.
V62/13621
PAGE
7
Case X
D/E
32
1
PIN 1 AREA
A2
A
SEATING
PLANE
0.08
A1
1
S
32 PLS
8
9
32
e1
e
25
EXPOSED THERMAL PAD
SEE NOTE 2
16
24
17
b
32 PLS
BOTTOM VIEW
Symbol
A
A1
A2
b
Dimensions
Millimeters
Symbol
Min
Max
Millimeters
Min
Max
0.80
1.00
0.00
0.05
0.20 NOM
0.15
0.25
3.85
4.15
0.40 BSC
2.80 BSC
0.30
0.50
D/E
e
e1
S
NOTES:
1. All linear dimensions are in millimeters.
2. The package thermal pad must be soldered to the board for thermal and mechanical performance. See manufacturer data
sheet for details regarding the exposed thermal pad dimensions.
3. This drawing is subject to change without notice..
FIGURE 1. Case outline.
DLA LAND AND MARITIME
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SIZE
A
CODE IDENT NO.
16236
REV
DWG NO.
V62/13621
PAGE
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Case outline X
Terminal
Terminal
number
symbol
Terminal
number
Terminal
symbol
Terminal
number
1
2
3
C2+
C2V-
9
10
11
FORCEON
ROUT5
4
DIN1
12
5
DIN2
�����������
INVALID
6
7
8
DIN3
NC
Terminal
symbol
Terminal
number
Terminal
symbol
17
18
RIN5
RIN4
DOUT1
GND
ROUT4
19
RIN3
25
26
27
ROUT3
20
RIN2
28
13
ROUT2
21
RIN1
29
14
ROUT1
22
DOUT3
30
��������������
FORCEOFF
15
16
VL
NC
23
24
DOUT2
NC
31
32
VCC
C1+
V+
C1NC
FIGURE 2. Terminal connections.
Terminal
Name
RSM
C1+, C2+
29, 1
V+
30
C1-, C231, 2
INVALID
6
V3
DIN1,
4
DIN2,
5
DIN3,
7
ROUT5 –
10, 11, 12,
ROUT1
13, 14
VL
15
RIN5 –
1517, 18,
RIN1
19, 20, 21
DOUT3,
22
DOUT2,
23
DOUT1
25
GND
26
VCC
27
��������������
28
FORCEOFF
FORCEON
9
Description
Positive terminal of the voltage-doubler charge pump capacitor
5.5 V supply generated by the charge pump
Negative terminal of the voltage doubler charge pump capacitor
Invalid output pin
-5.5 V supply generated by the charge pump
Driver inputs
Receiver outputs. Swing between 0 and VL
Logic level supply. All CMOS inputs and outputs are reference to this supply.
RS-232 receiver inputs
RS-232 driver outputs
Ground
3 V to 5.5 V supply voltage
Powerdown Control input (Refer to truth table)
Powerdown Control input (Refer to truth table)
FIGURE 3. Terminal functions.
DLA LAND AND MARITIME
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SIZE
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CODE IDENT NO.
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V62/13621
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Each Driver
INPUTS
DIN
FORCEON
X
L
H
L
H
L
H
X
H
H
L
L
L
L
��������������
FORCEOFF
Time elapsed since last
RIN or DIN transition
L
H
H
H
H
H
H
OUTPUT
DOUT
DRIVER STATUS
Z
H
L
H
L
Z
Z
Powered off
Normal operation with
auto powerdown plus disabled
Normal operation with
auto powerdown plus enabled
Power off by
auto-powerdown plus feature
X
X
X
<30 µs
<30 µs
>30 µs
>30 µs
H = high level, L = low level, X = irrelevant, Z = high impedance
Each Receiver
INPUTS
RIN1-RIN5
X
L
H
Open
��������������
FORCEOFF
OUTPUTS
Time elapsed since last
RIN or DIN transition
L
H
H
H
RECEIVER STATUS
ROUT1 – ROUT5
Z
H
L
H
<30 µs
<30 µs
<30 µs
Powered off
Normal operation with
auto powerdown plus
disabled/enabled
H = high level, L = low level, X = irrelevant, Z = high impedance (off), Open = input disconnected or connected driver off
FIGURE 4. Function tables.
DLA LAND AND MARITIME
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CODE IDENT NO.
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DIN1
DOUT1
DIN2
DOUT2
DIN3
DOUT3
FORCEOFF
AUTO-POWERDOWN PLUS
INVALID
FORCEON
ROUT1
RIN1
ROUT2
RIN2
ROUT3
RIN3
ROUT4
RIN4
ROUT5
RIN5
FIGURE 5. Functional block diagram.
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GENERATOR
SEE NOTE 2
RS-232
OUTPUT
50
RL
3V
FORCEOFF
TEST CIRCUIT
3V
INPUT
CL
t
SEE NOTE 1
t
THL
0V
TLH
OUTPUT
VOH
3V
-3 V
VOL
6V
SR(tr)=
tTHL
or tTLH
VOLTAGE WAVEFORMS
NOTES:
1. CL includes probe and jig capacitance.
2. The pulse generator has the following characteristics: PRR = 250 kbit/s, ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns.
FIGURE 6. Driver slew rate.
3V
GENERATOR
SEE NOTE 2
RS-232
OUTPUT
50
RL
3V
FORCEOFF
CL
INPUT
t
1.5 V
t
PHL
0V
PLH
SEE NOTE 1
OUTPUT
V OH
50%
V OL
TEST CIRCUIT
VOLTAGE WAVEFORMS
NOTES:
1. CL includes probe and jig capacitance.
2. The pulse generator has the following characteristics: PRR = 250 kbit/s, ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns.
FIGURE 7. Driver pulse skew
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3 V or 0 V
FORCEON
3V
OUTPUT
GENERATOR
SEE NOTE 2
50
1.5 V
INPUT
t
CL
t
PHL
-3 V
PLH
V OH
SEE NOTE 1
50%
OUTPUT
3V
FORCEOFF
V OL
TEST CIRCUIT
NOTES:
1.
2.
3.
4.
VOLTAGE WAVEFORMS
CL includes probe and jig capacitance.
The pulse generator has the following characteristics: PRR = 250 kbit/s, ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns.
tPLZ and tPHZ are the same as tdis.
tPZL and tPZH are the same as ten.
FIGURE 8. Receiver propagation delay times
3V
V CC
3 V or 0 V
FORCEON
GND
S1
0V
PZH
V OH
CL
SEE NOTE 1
50
t
PHZ
(S1 at GND)
OUTPUT
FORCEOFF
GENERATOR
SEE NOTE 2
t
RL
3 V or 0 V
1.5 V
INPUT
50%
OUTPUT
0.3 V
t
PLZ
(S1 at VCC )
OUTPUT
t
PZL
(S1 at VCC )
50%
V OL
0.3 V
TEST CIRCUIT
VOLTAGE WAVEFORMS
NOTES:
1. CL includes probe and jig capacitance.
2. The pulse generator has the following characteristics: PRR = 250 kbit/s, ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns.
FIGURE 9. Receiver enable and disable times
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GENERATOR
SEE NOTE 2
ROUT
VALID RS-232 LEVEL,INVALID HIGH
2.7 V
50
INTERMINATE
3.0 V
0V
AUTOPOWERDOWN
PLUS
INVALID
-3.0 V
IF SIGNAL REMAINS WITHIN THIS
REGION FOR MORE THAN 30
INTERMINATE
-2.7 V
C L =30 pF
VALID RS-232 LEVEL,INVALID HIGH
SEE NOTE 1
FORCEOFF
FORCEON
DIN
s
INVALID IS LOW
AUTO-POWERDOWN PLUS DISABLES AND
REDUCES SUPPLY CURRENT TO 1 A
DOUT
TEST CIRCUIT
RECIEVER
INPUT
tINVALID
3V
2.7 V
0V
0V
-2.7 V
-3 V
tVALID
VCC
50%
0V
INVALID
OUTPUT
3 V to 5 V
DRIVER
INPUT
50%
0V
5.5 V
DRIVER
OUTPUT
tdis
ten
tdis
ten
SUPPLY
VOLTAGES
-5.5 V
V+
V+-0.3 V
V-+0.3 V
V-
NOTES:
1. CL includes probe and jig capacitance.
2. The pulse generator has the following characteristics: PRR = 250 kbit/s, ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns.
FIGURE 10. �����������
INVALID propagation delay times and supply enabling time.
DLA LAND AND MARITIME
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CODE IDENT NO.
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PAGE
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4. VERIFICATION
4.1 Product assurance requirements. The manufacturer is responsible for performing all inspection and test requirements as
indicated in their internal documentation. Such procedures should include proper handling of electrostatic sensitive devices,
classification, packaging, and labeling of moisture sensitive devices, as applicable.
5. PREPARATION FOR DELIVERY
5.1 Packaging. Preservation, packaging, labeling, and marking shall be in accordance with the manufacturer’s standard commercial
practices for electrostatic discharge sensitive devices.
6. NOTES
6.1 ESDS. Devices are electrostatic discharge sensitive and are classified as ESDS class 1 minimum.
6.2 Configuration control. The data contained herein is based on the salient characteristics of the device manufacturer’s data book.
The device manufacturer reserves the right to make changes without notice. This drawing will be modified as changes are provided.
6.3 Suggested source(s) of supply. Identification of the suggested source(s) of supply herein is not to be construed as a guarantee of
present or continued availability as a source of supply for the item. DLA Land and Maritime maintains an online database of all current
sources of supply at http://www.landandmaritime.dla.mil/Programs/Smcr/.
Vendor item drawing
administrative control
number 1/
Device
manufacturer
CAGE code
Vendor part number
Top Side Marking
V62/13621-01XE
24355
TRS3253EMRSMREP
RS53EP
1/ The vendor item drawing establishes an administrative control number for
identifying the item on the engineering documentation.
CAGE code
01295
DLA LAND AND MARITIME
COLUMBUS, OHIO
Source of supply
Texas Instruments, Inc.
Semiconductor Group
8505 Forest Lane
P.O. Box 660199
Dallas, TX 75243
Point of contact: U.S. Highway 75 South
P.O. Box 84, M/S 853
Sherman, TX 75090-9493
SIZE
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