PMK35EP P-channel TrenchMOS extremely low level FET Rev. 02 — 29 April 2010 Product data sheet 1. Product profile 1.1 General description Extremely low level P-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using TrenchMOS technology. This product is designed and qualified for use in computing, communications, consumer and industrial applications only. 1.2 Features and benefits Low conduction losses due to low on-state resistance 1.3 Applications Battery management Load switching 1.4 Quick reference data Table 1. Quick reference data Symbol Parameter Conditions Min Typ Max Unit VDS drain-source voltage 25 °C ≤ Tj ≤ 150 °C - - -30 V ID drain current Tsp = 25 °C; VGS = -10 V; see Figure 1; see Figure 3 - - -14. 9 A Ptot total power dissipation Tsp = 25 °C; see Figure 2 - - 6.9 W VGS = -10 V; ID = -9.2 A; Tj = 25 °C; see Figure 9 - 16 19 mΩ - 6 - nC Static characteristics RDSon drain-source on-state resistance Dynamic characteristics QGD gate-drain charge VGS = -10 V; ID = -9.2 A; VDS = -15 V; Tj = 25 °C; see Figure 11; see Figure 12 PMK35EP NXP Semiconductors P-channel TrenchMOS extremely low level FET 2. Pinning information Table 2. Pinning information Pin Symbol Description 1 S source 2 S source 3 S source 4 G gate 5 D drain 6 D drain 7 D drain 8 D drain Simplified outline 8 Graphic symbol D 5 G 1 4 S SOT96-1 (SO8) 001aaa025 3. Ordering information Table 3. Ordering information Type number Package PMK35EP Name Description Version SO8 plastic small outline package; 8 leads; body width 3.9 mm SOT96-1 4. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Typ Max Unit VDS drain-source voltage 25 °C ≤ Tj ≤ 150 °C - - -30 V VDGR drain-gate voltage 25 °C ≤ Tj ≤ 150 °C; RGS = 20 kΩ - - -30 V VGS gate-source voltage -25 - 25 V ID drain current Tsp = 25 °C; VGS = -10 V; see Figure 1; see Figure 3 - - -14.9 A Tsp = 100 °C; VGS = -10 V; see Figure 1 - - -7 A - - -28.8 A IDM peak drain current Tsp = 25 °C; tp ≤ 10 µs; pulsed; see Figure 3 Ptot total power dissipation Tsp = 25 °C; see Figure 2 - - 6.9 W Tstg storage temperature -55 - 150 °C Tj junction temperature -55 - 150 °C Source-drain diode IS source current Tsp = 25 °C - - -5.8 A ISM peak source current Tsp = 25 °C; tp ≤ 10 µs; pulsed - - -23 A PMK35EP Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 02 — 29 April 2010 © NXP B.V. 2010. All rights reserved. 2 of 12 PMK35EP NXP Semiconductors P-channel TrenchMOS extremely low level FET 003aab604 120 003aab948 120 Pder (%) Ider (%) 80 80 40 40 0 0 0 50 100 150 0 200 50 100 150 Fig 1. 200 Tsp (°C) Tj (°C) Normalized continuous drain current as a function of solder point temperature Fig 2. Normalized total power dissipation as a function of solder point temperature 003aab603 −102 Limit RDSon = VDS / ID ID (A) tp = 10 μs −10 1 ms 10 ms DC −1 100 ms −10−1 −10−1 −1 −10 −102 VDS (V) Tsp = 25 °C; IDM is single pulse Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage 5. Thermal characteristics Table 5. Thermal characteristics Symbol Parameter Conditions Min Typ Max Unit Rth(j-sp) thermal resistance from junction to solder point see Figure 4 - - 18 K/W PMK35EP Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 02 — 29 April 2010 © NXP B.V. 2010. All rights reserved. 3 of 12 PMK35EP NXP Semiconductors P-channel TrenchMOS extremely low level FET 003aab605 102 Zth(j−sp) (K / W) δ = 0.5 10 0.2 0.1 1 0.05 0.02 δ= P single pulse 10−1 tp T t tp T 10−2 10−4 10−3 10−2 10−1 1 10 tp (s) Fig 4. Transient thermal impedance from junction to solder point as a function of pulse duration 6. Characteristics Table 6. Characteristics Symbol Parameter Conditions Min Typ Max Unit drain-source breakdown voltage ID = -250 µA; VGS = 0 V; Tj = 25 °C -30 - - V ID = -250 µA; VGS = 0 V; Tj = -55 °C -27 - - V gate-source threshold voltage ID = -250 µA; VDS = VGS; Tj = 25 °C; see Figure 7; see Figure 8 -1 - -3 V ID = -250 µA; VDS = VGS; Tj = 150 °C; see Figure 7; see Figure 8 -0.7 - - V ID = -250 µA; VDS = VGS; Tj = -55 °C; see Figure 7; see Figure 8 - - -3.3 V VDS = -30 V; VGS = 0 V; Tj = 25 °C - - -1 µA VDS = -30 V; VGS = 0 V; Tj = 70 °C - - -10 µA VGS = 20 V; VDS = 0 V; Tj = 25 °C - - -100 nA VGS = -20 V; VDS = 0 V; Tj = 25 °C - - -100 nA VGS = -10 V; ID = -9.2 A; Tj = 25 °C; see Figure 9 - 16 19 mΩ VGS = -10 V; ID = -9.2 A; Tj = 150 °C; see Figure 9 - 25 31 mΩ VGS = -4.5 V; ID = -6.8 A; Tj = 25 °C; see Figure 10; see Figure 9 - 26 35 mΩ ID = -9.2 A; VDS = -15 V; VGS = -10 V; Tj = 25 °C; see Figure 11; see Figure 12 - 42 - nC - 8 - nC - 6 - nC Static characteristics V(BR)DSS VGS(th) IDSS drain leakage current IGSS gate leakage current RDSon drain-source on-state resistance Dynamic characteristics QG(tot) total gate charge QGS gate-source charge QGD gate-drain charge PMK35EP Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 02 — 29 April 2010 © NXP B.V. 2010. All rights reserved. 4 of 12 PMK35EP NXP Semiconductors P-channel TrenchMOS extremely low level FET Table 6. Characteristics …continued Symbol Parameter Conditions Min Typ Max Unit VGS(pl) gate-source plateau voltage ID = -9.2 A; VDS = -15 V; Tj = 25 °C; see Figure 11; see Figure 12 - -2.5 - V Ciss input capacitance VDS = -25 V; VGS = 0 V; f = 1 MHz; Tj = 25 °C; see Figure 13 - 2100 - pF - 365 - pF - 275 - pF - 9 - ns Coss output capacitance Crss reverse transfer capacitance td(on) turn-on delay time VDS = -25 V; RL = 6 Ω; VGS = -10 V; RG(ext) = 6 Ω; Tj = 25 °C tr rise time - 9 - ns td(off) turn-off delay time - 50 - ns tf fall time - 24 - ns - -0.8 -1.2 V Source-drain diode source-drain voltage VSD IS = -3.45 A; VGS = 0 V; Tj = 25 °C; see Figure 14 003aab606 −30 VGS (V) = −5 −4 ID (A) 003aab608 −30 ID (A) −3.5 −20 −10 −20 −10 −3 Tj = 150 °C 25 °C −2.8 0 0 −0.5 −1 −1.5 VDS (V) 0 −2 0 Tj = 25 °C Fig 5. Product data sheet −2 −3 VGS (V) −4 VDS > ID x RDSon Output characteristics: drain current as a function of drain-source voltage; typical values PMK35EP −1 Fig 6. Transfer characteristics: drain current as a function of gate-source voltage; typical values All information provided in this document is subject to legal disclaimers. Rev. 02 — 29 April 2010 © NXP B.V. 2010. All rights reserved. 5 of 12 PMK35EP NXP Semiconductors P-channel TrenchMOS extremely low level FET 003aab613 −4 VGS(th) (V) 003aab612 −10−3 ID (A) −3 max. −10−4 min. −2 typ. −1 min. typ. max. −10−5 0 −60 0 60 120 180 −10−6 −2 −3 −4 VGS (V) Tj = 25 °C; VDS = -5 V ID = -1 mA; VDS = VGS Fig 7. −1 0 Tj (°C) Gate-source threshold voltage as a function of junction temperature 003aab614 2 a Fig 8. Sub-threshold drain current as a function of gate-source voltage 003aab607 100 VGS (V) = −3 −3.5 RDSon (mΩ) 1.5 75 1 50 −4 −4.5 0.5 0 −60 25 −5 0 0 60 120 180 0 Tj (°C) −10 −20 ID (A) −30 Tj = 25 °C Fig 9. Normalized drain-source on-state resistance factor as a function of junction temperature PMK35EP Product data sheet Fig 10. Drain-source on-state resistance as a function of drain current; typical values All information provided in this document is subject to legal disclaimers. Rev. 02 — 29 April 2010 © NXP B.V. 2010. All rights reserved. 6 of 12 PMK35EP NXP Semiconductors P-channel TrenchMOS extremely low level FET 003aab611 −10 VDS = −5 V ID = −9.2 A Tj = 25 °C VGS (V) VDS ID −7.5 VGS(pl) VGS(th) −5 VGS QGS1 −2.5 QGS2 QGS QGD QG(tot) 003aaa508 0 0 12.5 25 37.5 50 QG (nC) ID = -9.2 A; VDS = -15 V; Tj = 25 °C Fig 11. Gate-source voltage as a function of gate charge; typical values 003aab610 104 Fig 12. Gate charge waveform definitions 003aab609 −24 IS (A) C (pF) −18 Ciss −12 103 Tj = 150 °C 25 °C −6 Coss Crss 102 −10−1 −1 −10 VDS (V) −102 VGS = 0 V; f = 1 MHz Product data sheet 0 −0.4 −0.8 −1.2 VSD (V) −1.6 VGS = 0 V Fig 13. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values PMK35EP 0 Fig 14. Source current as a function of source-drain voltage; typical values All information provided in this document is subject to legal disclaimers. Rev. 02 — 29 April 2010 © NXP B.V. 2010. All rights reserved. 7 of 12 PMK35EP NXP Semiconductors P-channel TrenchMOS extremely low level FET 7. Package outline SO8: plastic small outline package; 8 leads; body width 3.9 mm SOT96-1 D E A X c y HE v M A Z 5 8 Q A2 A (A 3) A1 pin 1 index θ Lp 1 L 4 e detail X w M bp 0 2.5 5 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (2) e HE L Lp Q v w y Z (1) mm 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 5.0 4.8 4.0 3.8 1.27 6.2 5.8 1.05 1.0 0.4 0.7 0.6 0.25 0.25 0.1 0.7 0.3 inches 0.069 0.010 0.057 0.004 0.049 0.01 0.019 0.0100 0.014 0.0075 0.20 0.19 0.16 0.15 0.05 0.01 0.01 0.004 0.028 0.012 0.244 0.039 0.028 0.041 0.228 0.016 0.024 θ 8o o 0 Notes 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. 2. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC SOT96-1 076E03 MS-012 JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-18 Fig 15. Package outline SOT96-1 (SO8) PMK35EP Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 02 — 29 April 2010 © NXP B.V. 2010. All rights reserved. 8 of 12 PMK35EP NXP Semiconductors P-channel TrenchMOS extremely low level FET 8. Revision history Table 7. Revision history Document ID Release date Data sheet status Change notice Supersedes PMK35EP_2 20100429 Product data sheet - PMK35EP_1 - - Modifications: PMK35EP_1 PMK35EP Product data sheet • Various changes to content. 20070917 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 02 — 29 April 2010 © NXP B.V. 2010. All rights reserved. 9 of 12 PMK35EP NXP Semiconductors P-channel TrenchMOS extremely low level FET 9. Legal information 9.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term 'short data sheet' is explained in section "Definitions". [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 9.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet. 9.3 Disclaimers Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. PMK35EP Product data sheet Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on a weakness or default in the customer application/use or the application/use of customer’s third party customer(s) (hereinafter both referred to as “Application”). It is customer’s sole responsibility to check whether the NXP Semiconductors product is suitable and fit for the Application planned. Customer has to do all necessary testing for the Application in order to avoid a default of the Application and the product. NXP Semiconductors does not accept any liability in this respect. Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. All information provided in this document is subject to legal disclaimers. Rev. 02 — 29 April 2010 © NXP B.V. 2010. All rights reserved. 10 of 12 PMK35EP NXP Semiconductors P-channel TrenchMOS extremely low level FET Non-automotive qualified products — Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. NXP Semiconductors accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without NXP Semiconductors’ warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ standard warranty and NXP Semiconductors’ product specifications. 9.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. Adelante, Bitport, Bitsound, CoolFlux, CoReUse, DESFire, EZ-HV, FabKey, GreenChip, HiPerSmart, HITAG, I²C-bus logo, ICODE, I-CODE, ITEC, Labelution, MIFARE, MIFARE Plus, MIFARE Ultralight, MoReUse, QLPAK, Silicon Tuner, SiliconMAX, SmartXA, STARplug, TOPFET, TrenchMOS, TriMedia and UCODE — are trademarks of NXP B.V. HD Radio and HD Radio logo — are trademarks of iBiquity Digital Corporation. 10. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] PMK35EP Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 02 — 29 April 2010 © NXP B.V. 2010. All rights reserved. 11 of 12 PMK35EP NXP Semiconductors P-channel TrenchMOS extremely low level FET 11. Contents 1 1.1 1.2 1.3 1.4 2 3 4 5 6 7 8 9 9.1 9.2 9.3 9.4 10 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . .1 General description . . . . . . . . . . . . . . . . . . . . . .1 Features and benefits . . . . . . . . . . . . . . . . . . . . .1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 Quick reference data . . . . . . . . . . . . . . . . . . . . .1 Pinning information . . . . . . . . . . . . . . . . . . . . . . .2 Ordering information . . . . . . . . . . . . . . . . . . . . . .2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . .2 Thermal characteristics . . . . . . . . . . . . . . . . . . .3 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . .4 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . .8 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . .9 Legal information. . . . . . . . . . . . . . . . . . . . . . . .10 Data sheet status . . . . . . . . . . . . . . . . . . . . . . .10 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Contact information. . . . . . . . . . . . . . . . . . . . . . 11 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2010. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 29 April 2010 Document identifier: PMK35EP