INTEGRATED CIRCUITS 74ALVC16834A 18-bit registered driver with inverted register enable (3-State) Product specification Replaces datasheet 74ALVC16834 of 2000 Jan 04 IC24 Data Handbook 2000 Mar 14 Philips Semiconductors Product specification 18-bit registered driver with inverted register enable (3-State) FEATURES 74ALVC16834A PIN CONFIGURATION • Wide supply voltage range of 1.2 V to 3.6 V • Complies with JEDEC standard no. 8-1A. • CMOS low power consumption • Direct interface with TTL levels • Current drive ± 24 mA at 3.0 V • MULTIBYTETM flow-through standard pin-out architecture • Low inductance multiple VCC and GND pins for minimum noise and ground bounce • Output drive capability 50 Ω transmission lines @ 85°C • Input diodes to accommodate strong drivers DESCRIPTION The 74ALVC16834A is an 18-bit registered driver. Data flow is controlled by active low output enable (OE), active low latch enable (LE) and clock inputs (CP). When LE is LOW, the A to Y data flow is transparent. When LE is HIGH and CP is held at LOW or HIGH, the data is latched; on the LOW to HIGH transient of CP the A-data is stored in the latch/flip-flop. When OE is LOW the outputs are active. When OE is HIGH, the outputs go to the high impedance OFF-state. Operation of the OE input does not affect the state of the latch/flip-flop. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. NC 1 56 GND NC 2 55 NC Y1 3 54 A1 GND 4 53 GND Y2 5 52 A2 Y3 6 51 A3 VCC 7 50 VCC Y4 8 49 A4 Y5 9 48 A5 Y6 10 47 A6 GND 11 46 GND Y7 12 45 A7 Y8 13 44 A8 Y9 14 43 A9 Y10 15 42 A10 Y11 16 41 A11 Y12 17 40 A12 GND 18 39 GND Y13 19 38 A13 Y14 20 37 A14 Y15 21 36 A15 VCC 22 35 VCC Y16 23 34 A16 Y17 24 33 A17 GND 25 32 GND Y18 26 31 A18 OE 27 30 CP LE 28 29 GND SH00194 QUICK REFERENCE DATA GND = 0 V; Tamb = 25°C; tr = tf ≤ 2.5 ns SYMBOL PARAMETER CONDITIONS TYPICAL UNIT tPHL/tPLH Propagation delay An to Yn; LE to Yn; CP to Yn VCC = 3.3 V, CL = 50 pF 2.3 2.6 2.5 fmax Maximum clock frequency VCC = 3.3 V, CL = 50 pF 350 MHz CI Input capacitance 4.0 pF CI/O Input/Output capacitance 8.0 pF CPD Power dissipation capacitance per buffer VI = GND to VCC1 transparent mode Output enabled Output disabled ns 13 3 pF Clocked mode Output enabled Output disabled 22 15 NOTES: 1. CPD is used to determine the dynamic power dissipation (PD in µW): PD = CPD × VCC2 × fi + S (CL × VCC2 × fo) where: fi = input frequency in MHz; CL = output load capacitance in pF; fo = output frequency in MHz; VCC = supply voltage in V; S (CL × VCC2 × fo) = sum of outputs. 2000 Mar 14 2 853–2192 23314 Philips Semiconductors Product specification 18-bit registered driver with inverted register enable (3-State) 74ALVC16834A ORDERING INFORMATION PACKAGES 56-Pin Plastic Thin Shrink Small Outline (TSSOP) Type II PIN DESCRIPTION TEMPERATURE RANGE ORDER CODE DRAWING NUMBER –40°C to +85°C 74ALVC16834A DGG SOT364-1 LOGIC SYMBOL PIN NUMBER SYMBOL NAME AND FUNCTION 1, 2, 55 NC 3, 5, 6, 8, 9, 10, 12, 13, 14, 15, 16, 17, 19, 20, 21, 23, 24, 26 Y1 to Y18 Data outputs 4, 11, 18, 25, 32, 39, 46, 53, 56 GND Ground (0 V) 7, 22, 35, 50 VCC Positive supply voltage 27 OE Output enable input (active LOW) 28 LE Latch enable input (active LOW) 30 CP Clock input 54, 52, 51, 49, 48, 47, 45, 44, 43, 42, 41, 40, 38, 37, 36, 34, 33, 31 A1 to A18 Data inputs No connection OE CP LE D A1 Y1 LE CP TO THE 17 OTHER CHANNELS SH00202 TYPICAL INPUT (DATA OR CONTROL) VCC A1 SH00200 2000 Mar 14 3 Philips Semiconductors Product specification 18-bit registered driver with inverted register enable (3-State) LOGIC SYMBOL (IEEE/IEC) 74ALVC16834A FUNCTION TABLE INPUTS OE 27 CP 30 LE 28 EN1 2C3 OUTPUTS OE LE CP A H X X X Z L L X L L L L X H H L H ↑ L L L H ↑ H H C3 G2 Y1 3 54 A1 Y2 5 52 A2 51 A3 49 A4 L H H X Y01 9 48 A5 L H L X 10 47 Y02 Y6 A6 Y7 12 45 A7 Y8 13 44 A8 Y9 14 43 A9 Y10 15 42 Y11 16 41 A11 Y12 17 40 A12 Y13 19 38 A13 Y14 20 37 A14 Y15 21 36 A15 Y16 23 34 A16 Y17 24 33 A17 Y18 26 31 A18 Y3 6 Y4 8 Y5 1∇ 1 3D H L X Z ↑ A10 HIGH voltage level LOW voltage level Don’t care High impedance “off” state LOW-to-HIGH level transition NOTES: 1. Output level before the indicated steady-state input conditions were established, provided that CP is high before LE goes low. 2. Output level before the indicated steady-state input conditions were established. SH00196 2000 Mar 14 = = = = = 4 Philips Semiconductors Product specification 18-bit registered driver with inverted register enable (3-State) 74ALVC16834A RECOMMENDED OPERATING CONDITIONS SYMBOL VCC PARAMETER CONDITIONS MIN MAX DC supply voltage 2.5 V range (for max. speed performance @ 30 pF output load) 2.3 2.7 DC supply voltage 3.3 V range (for max. speed performance @ 50 pF output load) 3.0 3.6 DC supply voltage (for low-voltage applications) UNIT V 1.2 3.6 VI DC Input voltage range 0 VCC V VO DC output voltage range 0 VCC V –40 +85 °C 0 0 20 10 ns/V Tamb tr, tf Operating free-air temperature range VCC = 2.3 to 3.0 V VCC = 3.0 to 3.6 V Input rise and fall times ABSOLUTE MAXIMUM RATINGS In accordance with the Absolute Maximum Rating System (IEC 134). Voltages are referenced to GND (ground = 0 V). SYMBOL VCC IIK PARAMETER CONDITIONS DC supply voltage DC input diode current VI t0 DC output diode current VO uVCC or VO t 0 DC output voltage Note 1 IO DC output source or sink current VO = 0 to VCC DC VCC or GND current Storage temperature range For temperature range: –40 to +125 °C above +55°C derate linearly with 8 mW/K NOTE: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2000 Mar 14 mA –0.5 to VCC +0.5 VO Power dissipation per package –plastic thin-medium-shrink (TSSOP) –50 For data inputs1 IOK PTOT V –0.5 to +4.6 DC input voltage Tstg UNIT For control pins1 VI IGND, ICC RATING –0.5 to +4.6 5 V "50 mA –0.5 to VCC +0.5 V "50 mA "100 mA –65 to +150 °C 600 mW Philips Semiconductors Product specification 18-bit registered driver with inverted register enable (3-State) 74ALVC16834A DC ELECTRICAL CHARACTERISTICS Over recommended operating conditions. Voltage are referenced to GND (ground = 0 V). LIMITS SYMBOL PARAMETER VIH HIGH level Input voltage VIL LOW level Input voltage VOH HIGH level output voltage g TEST CONDITIONS Temp = -40°C to +85°C MIN TYP1 VCC = 2.3 to 2.7 V 1.7 1.2 VCC = 2.7 to 3.6 V 2.0 1.5 UNIT MAX V VCC = 2.3 to 2.7 V 1.2 0.7 VCC = 2.7 to 3.6 V 1.5 0.8 V VCC = 2.3 to 3.6 V; VI = VIH or VIL; IO = –100 µA VCC 02 0.2 VCC = 2.3 V; VI = VIH or VIL; IO = –6 mA VCC 0.3 VCC 0.08 VCC = 2.3 V; VI = VIH or VIL; IO = –12 mA VCC 0.6 VCC 0.26 VCC = 2.7 V; VI = VIH or VIL; IO = –12 mA VCC 0.5 VCC 0.14 VCC = 3.0 V; VI = VIH or VIL; IO = –12 mA VCC 0.6 VCC 0.09 VCC = 3.0 V; VI = VIH or VIL; IO = –24 mA VCC 1.0 VCC 0.28 VCC V 3 to 3 6V; VI = VIH or VIL; IO = 100 µA VCC = 2 2.3 3.6V; GND 0 20 0.20 V VCC = 2.3 V; VI = VIH or VIL; IO = 6 mA 0.07 0.40 V VCC = 2.3 V; VI = VIH or VIL; IO = 12 mA 0.15 0.70 VCC = 2.7 V; VI = VIH or VIL; IO = 12 mA 0.14 0.40 VCC = 3.0 V; VI = VIH or VIL; IO = 24 mA 0.27 0.55 g current Input leakage 3 to 3 6 V; VCC = 2 2.3 3.6 VI = VCC or GND 0.1 5 µ µA IOZ 3-State output OFF-state current VCC = 2.3 to 3.6 V; VI = VIH or VIL; VO = VCC or GND 0.1 10 µA ICC Quiescent supply current VCC = 2.3 to 3.6 V; VI = VCC or GND; IO = 0 0.2 40 µA Additional quiescent supply current VCC = 2.3 V to 3.6 V; VI = VCC – 0.6 V; IO = 0 150 750 µA VOL II ∆ICC LOW level output voltage NOTE: 1. All typical values are at Tamb = 25°C. 2000 Mar 14 6 V Philips Semiconductors Product specification 18-bit registered driver with inverted register enable (3-State) 74ALVC16834A AC CHARACTERISTICS FOR VCC = 2.3 V TO 2.7 V RANGE GND = 0 V; tr = tf ≤ 2.0 ns; CL = 30 pF LIMITS SYMBOL PARAMETER WAVEFORM VCC = 2.3 to 2.7 V UNIT MIN TYP1 MAX Propagation delay An to Yn 1, 7 1.0 2.4 4.2 Propagation delay LE to Yn 2, 7 1.0 2.8 5.0 Propagation delay CP to Yn 4, 7 1.0 2.8 5.0 tPZH/tPZL 3-State output enable time OE to Yn 6, 7 1.0 2.2 4.0 ns tPHZ/tPLZ 3-State output disable time OE to Yn 6, 7 1.0 2.0 – ns CP pulse width HIGH or LOW 4, 7 2.0 – – LE pulse width HIGH 2, 7 2.0 – – Set-up time An to CP 5, 7 1.0 – – Set-up time An to LE 3, 7 1.5 – – Hold time An to CP 5, 7 0.6 0.2 – Hold time An to LE 3, 7 1.4 0.4 – Maximum clock pulse frequency 4, 7 150 300 – tPHL/tPLH tW tSU S th fmax ns ns ns ns MHz NOTE: 1. All typical values are at VCC = 3.3 V and Tamb = 25°C. AC CHARACTERISTICS FOR VCC = 3.0 V TO 3.6 V RANGE AND VCC = 2.7 V GND = 0 V; tr = tf ≤ 2.5 ns; CL = 50 pF LIMITS SYMBOL PARAMETER LIMITS VCC = 3.3 ± 0.3 V WAVEFORM VCC = 2.7 V UNIT MIN TYP1, 2 MAX MIN TYP1 MAX Propagation delay An to Yn 1, 7 1.0 2.3 3.6 1.0 2.7 4.0 Propagation delay LE to Yn 2, 7 1.0 2.6 4.5 1.0 2.8 5.2 Propagation delay CP to Yn 4, 7 1.0 2.5 4.2 1.0 2.7 4.9 tPZH/tPZL 3-State output enable time OE to Yn 6, 7 1.0 2.3 4.4 1.0 3.0 5.4 ns tPHZ/tPLZ 3-State output disable time OE to Yn 6, 7 1.0 2.8 4.1 1.0 3.1 4.6 ns CP pulse width HIGH or LOW 4, 7 2.0 – – 2.0 – – LE pulse width HIGH 2, 7 2.0 – – 2.0 – – Set-up time An to CP 5, 7 1.0 – – 1.0 – – Set-up time An to LE 3, 7 1.5 – – 1.5 – – Hold time An to CP 5, 7 0.9 0.3 – 0.6 0.3 – Hold time An to LE 3, 7 1.4 0.3 – 1.7 0.4 – Maximum clock pulse frequency 4, 7 150 300 – 200 350 – tPHL/tPLH tW tSU S th fmax NOTES: 1. All typical values are measured Tamb = 25°C. 2. Typical value is measured at VCC = 3.3 V 2000 Mar 14 7 ns ns ns ns MHz Philips Semiconductors Product specification 18-bit registered driver with inverted register enable (3-State) AC WAVEFORMS FOR VCC = 3.0 V TO 3.6 V AND VCC = 2.7 V RANGE 74ALVC16834A 1/fMAX VI VM = 1.5 VCC VX = VOL + 0.3 V VY = VOH – 0.3 V VOL and VOH are the typical output voltage drop that occur with the output load. VI = 2.7 V VM CP INPUT VM tW GND tPHL tPLH VOH VM Yn OUTPUT AC WAVEFORMS FOR VCC = 2.3 V TO 2.7 V AND VCC < 2.3 V RANGE VOL NOTE: VM = 0.5VCC at VCC = 2.3 to 2.7 V VM = 0.5 V VX = VOL + 0.15 V VY = VOH – 0.15 V VOL and VOH are the typical output voltage drop that occur with the output load. VI = VCC SH00135 Waveform 4. The clock (CP) to Yn propagation delays, the clock pulse width and the maximum clock frequency. VI VM CP INPUT VI GND An INPUT VM ÉÉÉÉÉÉÉÉÉÉÉ ÉÉÉ ÉÉÉÉÉÉÉÉÉÉÉ ÉÉÉ ÉÉÉÉÉÉÉÉÉÉÉ ÉÉÉ tsu tsu th th GND tPHL VI tPLH An INPUT VOH Yn OUTPUT GND VM VOH VOL NOTE: VM = 0.5VCC at VCC = 2.3 to 2.7 V SH00132 VOL Waveform 1. Input (An) to output (Yn) propagation delay NOTE: The shaded areas indicate when the input is permitted to change for predictable output performance. VM = 0.5VCC at VCC = 2.3 to 2.7 V SH00136 VI VM LE INPUT VM Yn OUTPUT Waveform 5. Data set-up and hold times for the An input to the clock CP input VM tW GND tPHL tPLH VI VOH nOE INPUT VM Yn OUTPUT VOL VM GND NOTE: VM = 0.5 VCC at VCC = 2.3 to 2.7 V SH00165 tPLZ Waveform 2. Latch enable input (LE) pulse width, the latch enable input to output (Yn) propagation delays. OUTPUT LOW-to-OFF OFF-to-LOW ÉÉÉ ÉÉÉÉÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉÉÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉÉÉÉÉ ÉÉÉ VM VX VI An INPUT tPZL VCC VOL VM tPHZ tPZH GND th tSU VOH th OUTPUT HIGH-to-OFF OFF-to-HIGH tSU VI LE INPUT VY VM VM GND outputs enabled GND NOTE: The shaded areas indicate when the input is permitted to change for predictable output performance. VM = 0.5VCC at VCC = 2.3 to 2.7 V SH00166 NOTE: VM = 0.5VCC at VCC = 2.3 to 2.7 V outputs enabled SH00137 Waveform 6. 3-State enable and disable times Waveform 3. Data set-up and hold times for the An input to the LE input 2000 Mar 14 outputs disabled 8 Philips Semiconductors Product specification 18-bit registered driver with inverted register enable (3-State) TEST CIRCUIT S1 VCC RL = 500 Ω VO VI PULSE GENERATOR 2 * VCC Open GND D.U.T. RT RL = 500 Ω CL Test Circuit for switching times DEFINITIONS RL = Load resistor CL = Load capacitance includes jig and probe capacitance RT = Termination resistance should be equal to ZOUT of pulse generators. SWITCH POSITION TEST tPLH/tPHL tPLZ/tPZL tPHZ/tPZH S1 Open 2 VCC VCC VI < 2.7V VCC 2.7–3.6V 2.7V GND SV00906 Waveform 7. Load circuitry for switching times 2000 Mar 14 9 74ALVC16834A Philips Semiconductors Product specification 18-bit registered driver with inverted register enable (3-State) TSSOP56: plastic thin shrink small outline package; 56 leads; body width 6.1 mm 2000 Mar 14 10 74ALVC16834A SOT364-1 Philips Semiconductors Product specification 18-bit registered driver with inverted register enable (3-State) NOTES 2000 Mar 14 11 74ALVC16834A Philips Semiconductors Product specification 18-bit registered driver with inverted register enable (3-State) 74ALVC16834A Data sheet status Data sheet status Product status Definition [1] Objective specification Development This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. Preliminary specification Qualification This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. Product specification Production This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. [1] Please consult the most recently issued datasheet before initiating or completing a design. Definitions Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Disclaimers Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Copyright Philips Electronics North America Corporation 2000 All rights reserved. Printed in U.S.A. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381 Date of release: 02-00 Document order number: 2000 Mar 14 12 9397-750-06957