INTEGRATED CIRCUITS 74ABT162827A 74ABTH162827A 20-bit buffer/line driver, non-inverting, with 30 termination resistors (3-State) Product specification Supersedes data of 1997 Feb 26 IC23 Data Handbook 1998 Feb 27 Philips Semiconductors Product specification 20-bit buffer/line driver, non-inverting, with 30 termination resistors (3-State) FEATURES 74ABT162827A 74ABTH162827A DESCRIPTION • Multiple VCC and GND pins minimize switching noise • Live insertion/extraction permitted • 3-State output buffers • Power-up 3-State • 74ABTH162827A incorporates bus-hold data inputs which The 74ABT162827A high-performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive. The 74ABT162827A 20-bit buffers provide high performance bus interface buffering for wide data/address paths or buses carrying parity. They have NOR Output Enables (nOE1, nOE2) for maximum control flexibility. eliminate the need for external pull-up resistors to hold unused inputs The 74ABT162827A is designed with 30 series resistance in both the pull–up and pull–down output structures. This design reduces line noise in applications such as memory address drivers, clock drivers and bus receivers/transmitters. • Output capability: +64mA/-32mA • Latch-up protection exceeds 500mA per Jedec Std 17 • ESD protection exceeds 2000 V per MIL STD 883 Method 3015 Two options are available, 74ABT162827A which does not have the bus-hold feature and 74ABTH162827A which incorporates the bus-hold feature. and 200 V per Machine Model QUICK REFERENCE DATA SYMBOL PARAMETER CONDITIONS Tamb = 25°C; GND = 0V TYPICAL UNIT tPLH tPHL Propagation delay nAx to nYx CL = 50pF; VCC = 5V 1.8 1.9 ns CIN Input capacitance VI = 0V or VCC 4 pF VO = 0V or VCC; 3-State 6 pF Outputs disabled; VCC = 5.5V 500 µA Outputs Low; VCC = 5.5V 9 mA COUT Output capacitance ICCZ Quiescent su supply ly current ICCL ORDERING INFORMATION PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA DWG NUMBER 56-Pin Plastic SSOP Type III –40°C to +85°C 74ABT162827A DL BT162827A DL SOT371-1 56-Pin Plastic TSSOP Type II –40°C to +85°C 74ABT162827A DGG BT162827A DGG SOT364-1 56-Pin Plastic SSOP Type III –40°C to +85°C 74ABTH162827A DL BH162827A DL SOT371-1 56-Pin Plastic TSSOP Type II –40°C to +85°C 74ABTH162827A DGG BH162827A DGG SOT364-1 PIN DESCRIPTION PIN NUMBER SYMBOL 55, 54, 52, 51, 49, 48, 47, 45, 44, 43, 42, 41, 40, 38, 37, 36, 34, 33, 31, 30 1A0 - 1A9 2A0 - 2A9 Data inputs 2, 3, 5, 6, 8, 9, 10, 12, 13, 14, 15, 16, 17, 19, 20, 21, 23, 24, 26, 27 1Y0 - 1Y9 2Y0 - 2Y9 Data outputs 1, 56, 28, 29 1OE0, 1OE1 2OE0, 2OE1 4, 11, 18, 25, 32, 39, 46, 53 GND Ground (0V) 7, 22, 35, 50 VCC Positive supply voltage 1998 Feb 27 FUNCTION Output enable inputs (active-Low) 2 853-1928 19025 Philips Semiconductors Product specification 20-bit buffer/line driver, non-inverting, with 30 termination resistors (3-State) PIN CONFIGURATION 74ABT162827A 74ABTH162827A LOGIC SYMBOL (IEEE/IEC) 1 56 1OE1 1Y0 2 55 1A0 56 1Y1 3 54 1A1 28 GND 4 53 GND 29 1Y2 5 52 1A2 1Y3 6 51 1A3 VCC 7 50 1Y4 8 1Y5 1OE0 1OE1 5 1A4 51 6 9 48 1A5 49 8 1Y6 10 47 1A6 48 9 GND 11 46 GND 47 10 1Y7 12 45 1A7 45 12 1Y8 13 44 1A8 44 13 1Y9 14 43 1A9 43 14 2Y0 15 42 2A0 42 2Y1 16 41 2A1 41 16 2Y2 17 40 2A2 40 17 GND 18 39 GND 38 19 2Y3 19 38 2A3 37 20 2Y4 20 37 2A4 36 21 2Y5 21 36 2A5 34 23 VCC 22 35 VCC 33 24 2Y6 23 34 2A6 31 26 2Y7 24 33 2A7 30 27 GND 25 32 GND 2Y8 26 31 2A8 2Y9 27 30 2A9 2OE0 28 29 2OE1 54 52 51 49 48 47 INPUTS 45 44 43 1A7 1A8 1A9 1Y7 1Y8 1Y9 9 10 12 13 14 42 41 40 38 37 36 34 33 31 30 2A7 2A8 2A9 2Y0 2Y1 2Y2 2Y3 2Y4 2Y5 2Y6 2Y7 2Y8 2Y9 15 24 27 17 19 20 21 23 26 X Z H L SH00011 1998 Feb 27 15 OUTPUTS OPERATING MODE nOEx 8 16 2∇ FUNCTION TABLE 6 2A0 2A1 2A2 2A3 2A4 2A5 2A6 1 SH00012 5 2OE1 2 49 3 29 1∇ 3 2 2OE0 1 52 1Y0 1Y1 1Y2 1Y3 1Y4 1Y5 1Y6 28 EN2 VCC 1A0 1A1 1A2 1A3 1A4 1A5 1A6 1 & 54 LOGIC SYMBOL 56 EN1 55 SH00010 55 & 1 1OE0 3 nAx nYx L L L Transparent L H H Transparent H = = = = X Z Don’t care High impedance “off ” state High voltage level Low voltage level High impedance Philips Semiconductors Product specification 20-bit buffer/line driver, non-inverting, with 30 termination resistors (3-State) 74ABT162827A 74ABTH162827A SCHEMATIC OF Y OUTPUTS VCC 27Ω OUTPUT 27Ω GND SA00042 LOGIC DIAGRAM nA0 nA1 nA2 nA3 nA4 nA5 nA6 nA7 nA8 nA9 nY0 nY1 nY2 nY3 nY4 nY5 nY6 nY7 nY8 nY9 nOE0 nOE1 SH00013 ABSOLUTE MAXIMUM RATINGS1, 2 PARAMETER SYMBOL VCC CONDITIONS RATING UNIT –0.5 to +7.0 V –18 mA –1.2 to +7.0 V VO < 0 –50 mA Output in Off or High state –0.5 to +5.5 V Output in Low state 128 mA Output in High state –64 mA –65 to 150 °C DC supply voltage IIK DC input diode current VI DC input voltage3 IOK DC output diode current voltage3 VOUT DC output IOUT O DC output current Tstg Storage temperature range VI < 0 NOTES: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C. 3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 1998 Feb 27 4 Philips Semiconductors Product specification 20-bit buffer/line driver, non-inverting, with 30 termination resistors (3-State) 74ABT162827A 74ABTH162827A RECOMMENDED OPERATING CONDITIONS SYMBOL LIMITS PARAMETER MIN VCC DC supply voltage VI Input voltage VIH High-level input voltage UNIT MAX 4.5 5.5 V 0 VCC V 2.0 V VIL Low-level Input voltage 0.8 V IOH High-level output current –32 mA IOL Low-level output current ∆t/∆v Input transition rise or fall rate Tamb Operating free-air temperature range 12 mA 0 10 ns/V –40 +85 °C DC ELECTRICAL CHARACTERISTICS LIMITS SYMBOL PARAMETER MIN VIK VOH VOL O II Input clamp voltage High-level output voltage Low level output voltage Low-level Input leakage current VCC = 4.5V; IIK = -18mA Input leakage current 74ABTH162827A Bus H B Hold ld currentt A inputs i t 5 74ABTH162827A MAX –0.9 –1.2 MIN MAX –1.2 V 2.5 3.1 2.5 V VCC = 5.0V; IOH = -3mA; VI = VIL or VIH 3.0 3.6 3.0 V VCC = 4.5V; IOH = -32mA; VI = VIL or VIH 2.0 2.7 2.0 V VCC = 4.5V; IOH = 8mA; Vl = VIL or VIN 0.65 0.65 VCC = 4.5V; IOL = 12mA; VI = VIL 0.80 0.80 V ±0.01 ±1.0 ±1.0 µA 0.01 1 1 µA ±0.01 ±1 ±1 µA VCC = 5.5V; VI = GND or 5.5V VCC = 5.5V; VI = VCC or GND VCC = 5.5V; VI = VCC Control pins Data pins4 VCC = 5.5V; VI = 0 IHOLD TYP UNIT VCC = 4.5V; IOH = -3mA; VI = VIL or VIH VCC = 5.5V; VI = 5.5V II Tamb = -40°C to +85°C Tamb = +25°C TEST CONDITIONS VCC = 4.5V; VI = 0.8V V 0.01 1 1 µA –1 –3 –5 µA 35 35 VCC = 4.5V; VI = 2.0V –75 –75 VCC = 5.5V; VI = 0 to 5.5V ±800 µA Power-off leakage current VCC = 0.0V; VO = 4.5V; VI = 0V or 5.5V ±5.0 ±100 ±100 µA Power-up/down 3-State output current3 VCC = 2.1V; VO = 0.5V; VI = GND or VCC; V OE = Don’t care ±5.0 ±50 ±50 µA IOZH 3-State output High current VCC = 5.5V; VO = 2.7V; VI = VIL or VIH 1.0 10 10 µA IOZL 3-State output Low current VCC = 5.5V; VO = 0.5V; VI = VIL or VIH –1.0 –10 –10 µA ICEX Output High leakage current VCC = 5.5V; VO = 5.5V; VI = GND or VCC 1.0 50 50 µA Output current1 VCC = 5.5V; VO = 2.5V –70 –180 –180 mA 0.5 1 1 mA IOFF IPU/IPD IO ICCH ICCL Quiescent supply current ICCZ ∆ICC –50 VCC = 5.5V; Outputs High, VI = GND or VCC Additional supply current per input pin2 VCC = 5.5V; Outputs Low, VI = GND or VCC –50 9 19 19 mA VCC = 5.5V; Outputs 3-State; VI = GND or VCC 0.5 1 1 mA VCC = 5.5V; one input at 3.4V, other inputs at VCC or GND 0.2 1 1 mA NOTES: 1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second. 2. This is the increase in supply current for each input at 3.4V. 3. This parameter is valid for any VCC between 0V and 2.1V with a transition time of up to 10msec. From VCC = 2.1V to VCC = 5V ± 10% a transition time of up to 100µsec is permitted. 4. Unused pins at VCC or GND. 5. This is the bus hold overdrive current required to force the input to the opposite logic state. 1998 Feb 27 5 Philips Semiconductors Product specification 20-bit buffer/line driver, non-inverting, with 30 termination resistors (3-State) 74ABT162827A 74ABTH162827A AC CHARACTERISTICS GND = 0V, tR = tF = 2.5ns, CL = 50pF, RL = 500Ω LIMITS SYMBOL PARAMETER Tamb = -40 to +85oC VCC = +5.0V ±0.5V Tamb = +25oC VCC = +5.0V WAVEFORM UNIT MIN TYP MAX MIN MAX 1 1.0 1.0 1.8 1.4 2.6 2.6 1.0 1.0 2.9 2.9 ns Output enable time to High and Low level 2 1.5 2.0 3.0 3.6 4.2 4.9 1.5 2.0 5.2 6.0 ns Output disable time from High and Low level 2 2.0 1.5 3.4 2.8 4.8 4.0 2.0 1.5 5.4 4.3 ns tPLH tPHL Propagation delay nAx to nYx tPZH tPZL tPHZ tPLZ AC WAVEFORMS nOEx INPUT 3.0V or VCC whichever is less nAx INPUT VM VM VM VM tPZL tPLZ 3.5V 0V tPLH tPHL nYx OUTPUT VM VOL + 0.3V VOH nYx OUTPUT VM VOL VM tPHZ tPZH VOH VOL VOH – 0.3V nYx OUTPUT VM 0V SA00071 SA00016 Waveform 1. Input (nAx) to Output (nYx) Propagation Delays 1998 Feb 27 Waveform 2. 3-State Output Enable and Disable Times 6 Philips Semiconductors Product specification 20-bit buffer/line driver, non-inverting, with 30 termination resistors (3-State) 74ABT162827A 74ABTH162827A TEST CIRCUIT AND WAVEFORM VCC 7.0V PULSE GENERATOR VIN tW 90% VOUT VM NEGATIVE PULSE 10% 0V tTHL (tF) CL tTLH (tR) tTLH (tR) RL tTHL (tF) 90% POSITIVE PULSE Test Circuit for 3-State Outputs AMP (V) 90% VM VM 10% 10% tW SWITCH POSITION TEST SWITCH tPLZ closed tPZL closed All other open 0V VM = 1.5V Input Pulse Definition INPUT PULSE REQUIREMENTS DEFINITIONS RL = Load resistor; see AC CHARACTERISTICS for value. CL = Load capacitance includes jig and probe capacitance; see AC CHARACTERISTICS for value. RT = Termination resistance should be equal to ZOUT of pulse generators. AMP (V) VM 10% RL D.U.T. RT 90% FAMILY 74ABT/H16 Amplitude Rep. Rate tW tR tF 3.0V 1MHz 500ns 2.5ns 2.5ns SA00018 1998 Feb 27 7 Philips Semiconductors Product specification 20-bit buffer/line driver, non-inverting (3-State) SSOP56: plastic shrink small outline package; 56 leads; body width 7.5 mm 1998 Feb 27 8 74ABT16827A 74ABTH16827A SOT371-1 Philips Semiconductors Product specification 20-bit buffer/line driver, non-inverting (3-State) TSSOP56: plastic thin shrink small outline package; 56 leads; body width 6.1mm 1998 Feb 27 9 74ABT16827A 74ABTH16827A SOT364-1 Philips Semiconductors Product specification 20-bit buffer/line driver, non-inverting (3-State) NOTES 1998 Feb 27 10 74ABT16827A 74ABTH16827A Philips Semiconductors Product specification 20-bit buffer/line driver, non-inverting, with 30 termination resistors (3-State) 74ABT162827A 74ABTH162827A Data sheet status Data sheet status Product status Definition [1] Objective specification Development This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. Preliminary specification Qualification This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make chages at any time without notice in order to improve design and supply the best possible product. Product specification Production This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. [1] Please consult the most recently issued datasheet before initiating or completing a design. Definitions Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Disclaimers Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Copyright Philips Electronics North America Corporation 1998 All rights reserved. Printed in U.S.A. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381 print code Document order number: yyyy mmm dd 11 Date of release: 05-96 9397-750-03505