INTEGRATED CIRCUITS GTL2004 Quad GTL/GTL+ to LVTTL/TTL bidirectional latched translator Product specification Supersedes data of 1999 May 15 1999 Jul 19 Philips Semiconductors Product specification Quad GTL/GTL+ to LVTTL/TTL bidirectional latched translator GTL2004 FEATURES PIN CONFIGURATION • Operates as a quad GTL/GTL+ sampling receiver or as a LVTTL/TTL to GTL/GTL+ driver A0 • Quad bidirectional bus interface • Separate latch enable for each bit • Live insertion/extraction permitted • B outputs include 30Ω series resistance • Latch-up protection exceeds 500mA per JEDEC Std 17 • ESD protection exceeds 2000V per JEDEC Std 1 16 VCC LE0 2 15 DIR A1 3 14 B0 LE1 4 13 B1 A2 5 12 B2 LE2 6 11 B3 A3 7 10 GTLREF GND 8 9 LE3 DESCRIPTION SW00318 The GTL2004 is a quad translating transceiver designed for 3.3V system interface with a GTL/GTL+ bus. PIN DESCRIPTION The direction pin allows the part to function as either a GTL to TTL sampling receiver or as a TTL to GTL interface. Separate latch enables allow sampling and holding of data from the GTL bus. PIN NUMBER SYMBOL NAME AND FUNCTION 15 DIR Direction control input 1, 3, 5, 7 A0 – A3 Data inputs/outputs (A side, GTL) 11, 12, 13, 14 B0 – B3 Data inputs/outputs (B side, TTL) 2, 4, 6, 9 LE0 – LE3 Latch enables 10 GTLREF GTL reference voltage 8 GND Ground (0V) 16 VCC Positive supply voltage QUICK REFERENCE DATA SYMBOL TYPICAL CONDITIONS Tamb = 25°C PARAMETER UNIT B to A A to B tPLH tPHL Propagation delay An to Bn or Bn to An CL = 50pF; VCC = 3.3V 2.0 1.8 4.4 4.7 ns CIN Input capacitance DIR, LEn VI = 0V or VCC 3.0 3.0 pF CI/O I/O pin capacitance Outputs disabled; VI/O = 0V or 3.152V 7.2 4.6 pF ORDERING INFORMATION PACKAGES 16-Pin Plastic TSSOP Type II 1999 Jul 19 TEMPERATURE RANGE ORDER CODE DWG NUMBER –40°C to +85°C GTL2004 PW DH SOT403-1 2 853–2165 21984 Philips Semiconductors Product specification Quad GTL/GTL+ to LVTTL/TTL bidirectional latched translator GTL2004 LOGIC SYMBOL FUNCTION TABLE INPUT INPUT/OUTPUT DIR LEn A B L H Inputs An = Bn L L X NC H X Bn = An Inputs A0 LATCH B0 H = HIGH voltage level L = LOW voltage level X = Don’t care NC = No change LE0 A1 LATCH B1 LATCH B2 LATCH B3 LE1 A2 LE2 A3 LE3 GTLREF DIR SW00319 1999 Jul 19 3 Philips Semiconductors Product specification Quad GTL/GTL+ to LVTTL/TTL bidirectional latched translator GTL2004 ABSOLUTE MAXIMUM RATINGS1 In accordance with the Absolute Maximum System (IEC 134); voltages are referenced to GND (ground = 0V) PARAMETER SYMBOL VCC TEST CONDITIONS RATING DC supply voltage IIK DC input diode current VI DC input voltage3 IOK DC output diode current VO DC output voltage3 IOL O Current into any output in the LOW state IOH Current into any output in the HIGH state Tstg Storage temperature range UNIT –0.5 to +4.6 V VI < 0 –50 mA A port –0.5 to +7.0 V B port –0.5 to +4.6 V VO < 0 –50 mA Output in OFF or HIGH state; A port –0.5 to +7.0 V Output in OFF or HIGH state; B port –0.5 to +4.6 V A port 128 mA B port 80 mA A port –64 mA –60 to +150 °C NOTES: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C. 3. The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed. RECOMMENDED OPERATING CONDITIONS1 SYMBOL VCC VTT VREF PARAMETER GTL TYP MAX UNIT 3.6 V 1.14 1.2 1.26 GTL+ 1.35 1.5 1.65 0 Termination voltage Supply voltage Input voltage VIH HIGH level input voltage HIGH-level VIL LOW level input voltage LOW-level IOH HIGH-level output current Tamb MIN Supply voltage VI IOL O TEST CONDITIONS GTL 0.74 0.8 0.87 GTL+ 0.87 1.0 1.10 A port 0 VTT Except A port 0 5.5 A port VREF + 50mV Except A port 2 V V V A port VREF – 50mV Except A port 0.8 B port –12 mA A port 40 mA 12 mA 85 °C LOW level output current LOW-level B port Operating free-air temperature range –40 NOTE: 1. Unused control inputs must be held HIGH or LOW to prevent them from floating. 1999 Jul 19 V 4 V Philips Semiconductors Product specification Quad GTL/GTL+ to LVTTL/TTL bidirectional latched translator GTL2004 DC ELECTRICAL CHARACTERISTICS Over recommended operating conditions. Voltages are referenced to GND (ground = 0V). LIMITS SYMBOL PARAMETER –40°C to +85°C TEST CONDITIONS TYP1 MIN VOH O VOL O VCC = 3.0 to 3.6V; IOH = –100µA B port VCC = 3.0V; IOH = –12mA UNIT MAX VCC–0.2 V 2.0 A port VCC = 3.0V; IOL = 40mA 0.4 V B port VCC = 3.0V; IOL = 12mA 0.8 V Control inputs VCC = 3.6V; VI = VCC or GND ±1 A port VCC = 3.6V; VI = VTT or GND ±1 II B port VCC = 0 or 3.6V; VI = 5.5 10 VCC = 3.6V; VI = VCC ±1 VCC = 3.6V; VI = 0V –5 IOFF A port VCC = 0V;VI or VO = 0 to 4.5V IEX B port VO = 5.5V; VCC = 3.0V ICC A or B port VCC = 3.6V;VI = VCC or GND; IO = 0 B port or control inputs VCC = 3.6V; VI = VCC –0.6V Control inputs VI = 3.0V or 0 3 B port VO = 3.0V or 0 7.2 A port VO = VTT or 0 4.6 ∆ICC3 CI CIO O µA ± 100 µA 125 µA 3 mA 500 µA 50 pF pF NOTES: 1. All typical values are measured at VCC = 3.3V and Tamb = 25°C. 2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 3. This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND. AC CHARACTERISTICS (3.3V "0.3V RANGE) SYMBOL PARAMETER WAVEFORM LIMITS (GTL) LIMITS (GTL+) VCC = 3.3V "0.3V VREF = 0.8V VCC = 3.3V "0.3V VREF = 1.0V MIN TYP1 MAX UNIT TYP1 MAX 2.8 2.5 2.0 1.8 2.8 2.5 ns MIN tPLH tPHL Bn to An 2 2.0 1.8 tPLH tPHL An to Bn 3 4.4 4.7 6.5 5.8 4.4 4.5 5.7 5.1 ns 3.5 3.4 4.9 4.2 3.5 3.4 4.9 4.2 ns tPLH LEn to Bn 1 tPHL NOTE: 1. All typical values are at VCC = 3.3V and Tamb = 25°C. AC SETUP REQUIREMENT (3.3V "0.3V RANGE) Over recommended ranges of supply voltage.1 SYMBOL PARAMETER WAVEFORM LIMITS (GTL) LIMITS (GTL+) VCC = 3.3V "0.3V VREF = 0.8V VCC = 3.3V "0.3V VREF = 1.0V MIN tS(H) tS(L) Setup time (An to LEn) th(H) th(L) Hold time (An to LEn) MIN MAX 4 1.3 1.5 1.2 1.5 ns 4 0.0 0.0 0.0 0.0 ns 1.1 1.1 ns tw(H) LEn pulse width 2 NOTE: 1. These parameters are warranted but not production tested. 1999 Jul 19 MAX UNIT 5 Philips Semiconductors Product specification Quad GTL/GTL+ to LVTTL/TTL bidirectional latched translator GTL2004 AC WAVEFORMS VM = 1.5V at VCC w 3.0V, VM = VCC/2 at VCC v 2.7V for A ports and control pins VM = VRef for B ports VX = VOL + 0.3V at A ports VY = VOH – 0.3V at A ports VX = VREF at B ports VTT 3.0V or VCC LEn VM whichever is less VM VM tw(H) Input VREF VREF 0V 0V tPHL tPHL tPLH tPLH VOH VOH Bn VM VM 1.5V Output 1.5V VOL VOL ALL CONTROL INPUTS ARE TTL LEVELS. SW00333 ALL INPUT PULSES ARE SUPPLIED BY GENERATORS HAVING THE FOLLOWING CHARACTERISTICS: PRR ≤ 10MHz, ZO = 50Ω, tr ≤ 2.5ns, tf ≤ 2.5ns. Waveform 1. Propagation delay, Enable to Output and Enable Pulse Width SW00469 Waveform 3. Propagation delay A port to B port tPLH ÉÉÉÉ ÉÉÉÉ ÉÉÉÉ ÉÉÉÉ 3.0V VMV VMV Bn 0V VM VOLTAGE WAVEFORMS PULSE DURATION VM = 1.5V for B port and 0.8V for A port ts(H) 3.0V Input 1.5V LEn ÉÉÉÉ ÉÉÉÉ ÉÉÉÉ ÉÉÉÉ VM VM tn(H) ts(H) VM ÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉ 3.0V or VCC VM VM 0V tn(H) VM tPLH whichever is less 0V tPHL SW00334 VOH VREF Waveform 4. Data Setup and Hold Times VREF VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES B port to A port SW00470 Waveform 2. 1999 Jul 19 3.0V or VCC 1.5V 0V Output whichever is less 6 Philips Semiconductors Product specification Quad GTL/GTL+ to LVTTL/TTL bidirectional latched translator GTL2004 TEST CIRCUIT VCC VO VI PULSE GENERATOR D.U.T. 50pF RT RL = 500Ω CL Test Circuit for switching times DEFINITIONS RL = Load resistor CL = Load capacitance includes jig and probe capacitance RT = Termination resistance should be equal to ZOUT of pulse generators. SW00471 Figure 1. Load circuitry for switching times VCC VTT 25Ω VO VI PULSE GENERATOR D.U.T. RT CL 30pF SW00332 Figure 2. Load circuit for A outputs 1999 Jul 19 7 Philips Semiconductors Product specification Quad GTL/GTL+ to LVTTL/TTL bidirectional latched translator GTL2004 TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm 1999 Jul 30 8 SOT403-1 Philips Semiconductors Product specification Quad GTL/GTL+ to LVTTL/TTL bidirectional latched translator GTL2004 NOTES 1999 Jul 30 9 Philips Semiconductors Product specification Quad GTL/GTL+ to LVTTL/TTL bidirectional latched translator GTL2004 Data sheet status Data sheet status Product status Definition [1] Objective specification Development This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. Preliminary specification Qualification This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. Product specification Production This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. [1] Please consult the most recently issued datasheet before initiating or completing a design. Definitions Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Disclaimers Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Copyright Philips Electronics North America Corporation 1999 All rights reserved. Printed in U.S.A. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381 Date of release: 07-99 Document order number: 1999 Jul 30 10 9397 750 06247