INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: • The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications • The IC06 74HC/HCT/HCU/HCMOS Logic Package Information • The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines 74HC/HCT9014 Nine wide Schmitt trigger buffer/line driver; inverting Product specification Supersedes data of March 1988 File under Integrated Circuits, IC06 December 1990 Philips Semiconductors Product specification Nine wide Schmitt trigger buffer/line driver; inverting 74HC/HCT9014 The 74HC/HCT9014 are nine wide Schmitt trigger inverting buffer/line drivers with Schmitt trigger inputs. These inputs transform slowly changing input signals into sharply defined jitter-free output signals. FEATURES • Schmitt trigger action on all data inputs • Output capability: standard • ICC category: MSI The “9014” is identical to the “9015” but has inverting inputs. GENERAL DESCRIPTION The 74HC/HCT9014 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns TYPICAL SYMBOL PARAMETER tPHL/ tPLH propagation delay An to Yn CI input capacitance CPD power dissipation capacitance per buffer CONDITIONS CL = 15 pF; VCC = 5 V notes 1 and 2 Notes 1. CPD is used to determine the dynamic power dissipation (PD in µW): PD = CPD × VCC2 × fi + ∑ (CL × VCC2 × fo) where: fi = input frequency in MHz fo = output frequency in MHz ∑ (CL × VCC2 × fo) = sum of outputs CL = output load capacitance in pF VCC = supply voltage in V 2. For HC the condition is VI = GND to VCC For HCT the condition is VI = GND to VCC − 1.5 V ORDERING INFORMATION See “74HC/HCT/HCU/HCMOS Logic Package Information”. December 1990 2 UNIT HC HCT 12 13 ns 3.5 3.5 pF 30 32 pF Philips Semiconductors Product specification Nine wide Schmitt trigger buffer/line driver; inverting 74HC/HCT9014 PIN DESCRIPTION PIN NO. SYMBOL NAME AND FUNCTION 1, 2, 3, 4, 5, 6, 7, 8, 9 A0 to A8 data inputs 10 GND ground (0 V) 19, 18, 17, 16, 15, 14, 13, 12, 11 Y0 to Y8 data outputs 20 VCC positive supply voltage fpage 1 2 3 4 5 6 7 8 9 A0 Y0 A1 Y1 A2 Y2 A3 Y3 A4 Y4 A5 Y5 A6 Y6 A7 Y7 A8 Y8 19 1 19 18 2 18 17 3 17 16 4 16 15 5 15 14 6 14 13 7 13 12 8 12 11 9 11 MBA015 Fig.1 Pin configuration. December 1990 Fig.2 Logic symbol. 3 page MBA014 Fig.3 IEC logic symbol. Philips Semiconductors Product specification Nine wide Schmitt trigger buffer/line driver; inverting 74HC/HCT9014 handbook, halfpage An Yn MBA018 Fig.4 Functional diagram. Fig.5 Logic diagram (one Schmitt trigger). FUNCTION TABLE INPUTS OUTPUTS An Yn L H H L Notes 1. H = HIGH voltage level L = LOW voltage level December 1990 4 Philips Semiconductors Product specification Nine wide Schmitt trigger buffer/line driver; inverting 74HC/HCT9014 DC CHARACTERISTICS FOR 74HC For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”. Transfer characteristics are given below. Output capability: standard ICC category: MSI TRANSFER CHARACTERISTICS FOR 74HC Voltages are referred to GND (ground = 0 V) Tamb (°C) TEST CONDITIONS 74HC SYMBOL PARAMETER +25 −40 to +85 −40 to +125 min. typ. max. min. max. min. max. UNIT V CC WAVEFORMS (V) VT+ positive-going threshold 0.70 1.75 2.30 1.13 1.50 2.37 3.15 3.11 4.20 0.70 1.75 2.30 1.50 3.15 4.20 0.70 1.75 2.30 1.50 3.15 4.20 V 2.0 4.5 6.0 Figs 6 and 7 VT− negative-going threshold 0.30 1.35 1.80 0.70 1.10 1.80 2.40 2.43 3.30 0.30 1.35 1.80 1.10 2.40 3.30 0.30 1.35 1.80 1.10 2.40 3.30 V 2.0 4.5 6.0 Figs 6 and 7 VH hysteresis (VT+ − VT−) 0.2 0.4 0.5 0.43 0.80 0.57 1.00 0.68 1.10 0.18 0.40 0.50 0.80 1.00 1.10 0.15 0.40 0.50 0.80 1.00 1.10 V 2.0 4.5 6.0 Figs 6 and 7 AC CHARACTERISTICS FOR 74HC GND = 0 V; tr = tf = 6 ns; CL = 50 pF Tamb (°C) TEST CONDITIONS 74HC SYMBOL PARAMETER +25 −40 to +85 min. typ. max. min. max. −40 to +125 min. UNIT V CC WAVEFORMS (V) max. tPHL/ tPLH propagation delay An to Yn 33 12 10 105 21 18 130 26 22 160 32 27 ns 2.0 4.5 6.0 Fig.8 tTHL/ tTLH output transition time 19 7 6 75 15 13 95 19 16 110 22 19 ns 2.0 4.5 6.0 Fig.8 December 1990 5 Philips Semiconductors Product specification Nine wide Schmitt trigger buffer/line driver; inverting 74HC/HCT9014 DC CHARACTERISTICS FOR 74HCT For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”. Transfer characteristics are given below. Output capability: standard ICC category: MSI Note to HCT types The value of additional quiescent supply current (∆ICC) for a unit load of 1 is given in the family specifications. To determine ∆ICC per input, multiply this value by the unit load coefficient shown in the table below. INPUT UNIT LOAD COEFFICIENT An 0.3 TRANSFER CHARACTERISTICS FOR 74HCT Voltages are referred to GND (ground = 0 V) Tamb (°C) TEST CONDITIONS 74HCT SYMBOL PARAMETER +25 −40 to +85 −40 to +125 min. typ. max. min. max. min. max. UNIT V CC WAVEFORMS (V) VT+ positive-going threshold 0.9 1.2 1.50 2.0 1.70 2.1 0.9 1.2 2.0 2.1 0.9 1.2 2.0 2.1 V 4.5 5.5 Figs 6 and 7 VT− negative-going threshold 0.7 0.8 1.06 1.4 1.27 1.7 0.7 0.8 1.4 1.7 0.7 0.8 1.4 2.7 V 4.5 5.5 Figs 6 and 7 VH hysteresis (VT+ − VT−) 0.2 0.2 0.44 0.8 0.44 0.8 0.2 0.2 0.8 0.8 0.2 0.2 0.8 0.8 V 4.5 5.5 Figs 6 and 7 AC CHARACTERISTICS FOR 74HCT GND = 0 V; tr = tf = 6 ns; CL = 50 pF Tamb (°C) TEST CONDITIONS 74HCT SYMBOL PARAMETER +25 −40 to +85 min. typ. max. min. max. −40 to +125 min. UNIT V CC WAVEFORMS (V) max. tPHL/ tPLH propagation delay An to Yn 19 32 40 48 ns 4.5 Fig.8 tTHL/ tTLH output transition time 7 15 19 22 ns 4.5 Fig.8 December 1990 6 Philips Semiconductors Product specification Nine wide Schmitt trigger buffer/line driver; inverting 74HC/HCT9014 TRANSFER CHARACTERISTIC WAVEFORMS Fig.7 Fig.6 Transfer characteristic. Waveforms showing the definition of VT+, VT− and VH. AC WAVEFORMS handbook, full pagewidth A n INPUT VM (1) t PHL VM (1) Yn OUTPUT MBA020 t PLH t THL t TLH (1) HC : VM = 50%; VI = GND to VCC. HCT: VM = 1.3 V; VI = GND to 3 V. Fig.8 Waveforms showing the input (An) to output (Yn) propagation delays and the output transition times. PACKAGE OUTLINES See “74HC/HCT/HCU/HCMOS Logic Package Outlines”. December 1990 7