INTEGRATED CIRCUITS 74ABT16825A 74ABTH16825A 18-bit buffer/line driver; non-inverting (3-State) Product specification Supersedes data of 1995 Jul 14 IC23 Data Handbook 1998 Feb 25 Philips Semiconductors Product specification 74ABT16825A 74ABTH16825A 18-bit buffer/line driver; non-inverting (3-State) FEATURES DESCRIPTION • Multiple VCC and GND pins minimize switching noise • Live insertion/extraction permitted • 3-State output buffers • Power-up 3-State • 74ABTH16825A incorporates bus-hold data inputs which The74ABT16825A high-performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive. The74ABT16825A 18-bit buffers provide high performance bus interface buffering for wide data/address paths or buses carrying parity. They have NOR Output Enables (nOE1, nOE2) for maximum control flexibility. eliminate the need for external pull-up resistors to hold unused inputs Two options are available, 74ABT16825A which does not have the bus-hold feature and 74ABTH16825A which incorporates the bus-hold feature. • Output capability: +64mA/–32mA • Latch-up protection exceeds 500mA per Jedec Std 17 • ESD protection exceeds 2000V per MIL STD 883 Method 3015 and 200V per Machine Model • Bus-hold data inputs eliminate the need for external pull-up resistors to hold unused inputs QUICK REFERENCE DATA SYMBOL PARAMETER CONDITIONS Tamb = 25°C; GND = 0V TYPICAL UNIT tPLH tPHL Propagation delay nAx to nYx CL = 50pF; VCC = 5V 1.8 1.4 ns CIN Input capacitance VI = 0V or VCC 4 pF VO = 0V or VCC; 3-State 6 pF Outputs disabled; VCC = 5.5V 500 µA Outputs Low; VCC = 5.5V 9 mA COUT Output capacitance ICCZ Quiescent su supply ly current ICCL ORDERING INFORMATION PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA DWG NUMBER 56-pin SSOP Type III –40°C to +85°C 74ABT16825A DL BT16825A DL SOT371-1 56-pin TSSOP Type II –40°C to +85°C 74ABT16825A DGG BT16825A DGG SOT364-1 56-pin SSOP Type III –40°C to +85°C 74ABTH16825A DL BH16825A DL SOT371-1 56-pin TSSOP Type II –40°C to +85°C 74ABTH16825A DGG BH16825A DGG SOT364-1 PIN DESCRIPTION PIN NUMBER SYMBOL 55, 54, 52, 51, 49, 48, 47, 45, 44, 41, 40, 38, 37, 36, 34, 33, 31, 30 1A0 – 1A9 2A0 – 2A9 Data inputs 2, 3, 5, 6, 8, 9, 10, 12, 13 16, 17, 19, 20, 21, 23, 24, 26, 27 1Y0 – 1Y9 2Y0 – 2Y9 Data outputs 1, 56 28, 29 1OE0, 1OE1 2OE0, 2OE1 4, 11, 14, 15, 18, 25, 32, 39, 42, 43, 46, 53 GND Ground (0V) 7, 22, 35, 50 VCC Positive supply voltage 1998 Feb 25 FUNCTION Output enable inputs (active-Low) 2 853-1804 19018 Philips Semiconductors Product specification 74ABT16825A 74ABTH16825A 18-bit buffer/line driver; non-inverting (3-State) PIN CONFIGURATION LOGIC SYMBOL (IEEE/IEC) 1OE0 1 56 1OE1 1Y0 2 55 1A0 1OE0 1 1Y1 3 54 1A1 1OE1 56 & EN1 GND 4 53 GND 2OE0 28 1Y2 5 52 1A2 2OE1 29 1A0 55 2 1Y0 1A1 54 3 1Y1 1A2 52 5 1Y2 1A3 51 6 1Y3 1A4 49 8 1Y4 1A5 48 9 1Y5 1A6 47 10 1Y6 1A7 45 12 1Y7 1A8 44 13 1Y8 2A0 41 2A1 40 17 1Y3 6 51 1A3 VCC 7 50 VCC 1Y4 8 1Y5 49 9 1A4 48 1A5 & EN2 1∇ 1Y6 10 47 1A6 GND 11 46 GND 1Y7 12 45 1A7 1Y8 13 44 1A8 GND 14 43 GND GND 15 42 GND 2Y0 16 41 2A0 2Y1 17 40 2A1 2A2 38 19 GND 18 39 GND 2A3 37 20 2Y2 19 38 2A2 2A4 36 21 2Y3 20 37 2A3 2A5 34 23 2Y4 21 36 2A4 2A6 33 24 VCC 22 35 VCC 2A7 31 26 2Y5 23 34 2A5 2A8 30 27 2Y6 24 33 2A6 GND 25 32 GND 2Y7 26 31 2A7 2Y8 27 30 2A8 2OE0 28 29 2OE1 2∇ 16 2Y1 2Y2 2Y3 2Y4 2Y5 2Y6 2Y7 2Y8 SA00074 SA00073 LOGIC DIAGRAM nA0 nA1 nA2 nA3 nA4 nA5 nA6 nA7 nA8 nY0 nY1 nY2 nY3 nY4 nY5 nY6 nY7 nY8 nOE0 nOE1 SA00075 1998 Feb 25 2Y0 3 Philips Semiconductors Product specification 74ABT16825A 74ABTH16825A 18-bit buffer/line driver; non-inverting (3-State) FUNCTION TABLE INPUTS H L X Z LOGIC SYMBOL OUTPUTS OPERATING nOEx nAx nYx MODE L L L Transparent L H H Transparent H = = = = X Z High voltage level Low voltage level Don’t care High impedance “off ” state 55 54 52 51 49 48 47 1A0 1A1 1A2 1A3 1A4 1A5 1A6 High impedance 1 1OE0 56 1OE1 1Y0 1Y1 1Y2 1Y3 1Y4 1Y5 1Y6 45 44 1A7 1A8 1Y7 1Y8 2 3 5 6 8 9 10 12 13 41 40 38 37 36 34 33 31 30 2A0 2A1 2A2 2A3 2A4 2A5 2A6 28 2OE0 29 2OE1 2A7 2A8 2Y0 2Y1 2Y2 2Y3 2Y4 2Y5 2Y6 2Y7 2Y8 16 26 17 19 20 21 23 24 27 SA00072 ABSOLUTE MAXIMUM RATINGS1, 2 PARAMETER SYMBOL VCC IIK CONDITIONS RATING UNIT –0.5 to +7.0 V –18 mA –1.2 to +7.0 V VO < 0 –50 mA Output in Off or High state –0.5 to +5.5 V Output in Low state 128 Output in High state –64 DC supply voltage DC input diode current VI < 0 voltage3 VI DC input IOK DC output diode current voltage3 VOUT DC output IOUT DC output current Tstg Storage temperature range mA –65 to 150 °C NOTES: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C. 3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. RECOMMENDED OPERATING CONDITIONS SYMBOL VCC LIMITS PARAMETER MIN DC supply voltage MAX UNIT 4.5 5.5 V 0 VCC V VI Input voltage VIH High-level input voltage VIL Low-level Input voltage 0.8 V IOH High-level output current –32 mA IOL Low-level output current 64 mA 0 10 ns/V –40 +85 °C ∆t/∆v Input transition rise or fall rate Tamb Operating free-air temperature range 1998 Feb 25 2.0 4 V Philips Semiconductors Product specification 74ABT16825A 74ABTH16825A 18-bit buffer/line driver; non-inverting (3-State) DC ELECTRICAL CHARACTERISTICS LIMITS SYMBOL TEST CONDITIONS PARAMETER MIN VIK VOH VOL Input clamp voltage High-level output voltage Tamb = –40°C to +85°C Tamb = +25°C VCC = 4.5V; IIK = –18mA TYP MAX –0.9 –1.2 MIN UNIT MAX –1.2 V VCC = 4.5V; IOH = –3mA; VI = VIL or VIH 2.5 2.9 2.5 V VCC = 5.0V; IOH = –3mA; VI = VIL or VIH 3.0 3.4 3.0 V VCC = 4.5V; IOH = –32mA; VI = VIL or VIH 2.0 2.4 2.0 V Low-level output voltage VCC = 4.5V; IOL = 64mA; VI = VIL or VIH 0.42 0.55 0.55 V II Input leakage current ABT16825A VCC = 5.5V; VI = GND or 5.5V ±0.01 ±1.0 ±1.0 µA ±0.01 ±1 ±1 µA II In ut leakage current Input 74ABTH16825A Control pins VCC = 5.5V; VI = VCC or GND VCC = 5.5V; VI = VCC Data pins ins4 VCC = 5.5V; VI = 0 IHOLD Bus Hold current A inputs5 74ABTH16825A VCC = 4.5V; VI = 0.8V 0.01 1 1 µA –1 –3 –5 µA 35 35 VCC = 4.5V; VI = 2.0V –75 –75 VCC = 5.5V; VI = 0 to 5.5V ±500 µA Power-off leakage current VCC = 0.0V; VO = 4.5V; VI = 0V or 5.5V ±5.0 ±100 ±100 µA Power-up/down 3-State output current3 VCC = 2.1V; VO = 0.5V; VI = GND or VCC; V OE = Don’t care ±5.0 ±50 ±50 µA IOZH 3-State output High current VCC = 5.5V; VO = 5.5V; VI = VIL or VIH 1.0 10 10 µA IOZL 3-State output Low current VCC = 5.5V; VO = 0.0V; VI = VIL or VIH –1.0 –10 –10 µA ICEX Output High leakage current VCC = 5.5V; VO = 5.5V; VI = GND or VCC Output current1 VCC = 5.5V; VO = 2.5V IOFF IPU/IPD IO ICCH ICCL Quiescent supply current ICCZ –50 1.0 50 –70 –180 –50 50 µA –180 mA VCC = 5.5V; Outputs High, VI = GND or VCC 0.5 1 1 mA VCC = 5.5V; Outputs Low, VI = GND or VCC 9 19 19 mA VCC = 5.5V; Outputs 3-State; VI = GND or VCC 0.5 1 1 mA ∆ICC Additional supply current per input pin2 74ABT16825A VCC = 5.5V; one input at 3.4V, other inputs at VCC or GND 10 500 500 µA ∆ICC Additional supply current per input pin2 74ABTH16825A VCC = 5.5V; one input at 3.4V, other inputs at VCC or GND 0.2 1 1 mA NOTES: 1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second. 2. This is the increase in supply current for each input at 3.4V. 3. This parameter is valid for any VCC between 0V and 2.1V with a transition time of up to 10msec. From VCC = 2.1V to VCC = 5V ± 10% a transition time of up to 100µsec is permitted. 4. Unused pins at VCC or GND. 5. This is the bus hold overdrive current required to force the input to the opposite logic state. AC CHARACTERISTICS GND = 0V, tR = tF = 2.5ns, CL = 50pF, RL = 500Ω LIMITS SYMBOL PARAMETER UNIT MIN TYP MAX MIN MAX 1 1.0 0.6 1.8 1.4 2.5 2.0 1.0 0.6 2.8 2.3 ns Output enable time to High and Low level 2 1.0 1.0 2.9 2.9 3.8 3.8 1.0 1.0 4.8 5.0 ns Output disable time from High and Low level 2 2.0 1.6 3.3 2.5 4.5 3.4 2.0 1.6 5.2 3.7 ns tPLH tPHL Propagation delay nAx to nYx tPZH tPZL tPHZ tPLZ 1998 Feb 25 Tamb = -40 to +85oC VCC = +5.0V ±0.5V Tamb = +25oC VCC = +5.0V WAVEFORM 5 Philips Semiconductors Product specification 74ABT16825A 74ABTH16825A 18-bit buffer/line driver; non-inverting (3-State) AC WAVEFORMS nOEx INPUT 3.0V or VCC whichever is less nAx INPUT VM VM VM VM tPZL tPLZ 3.5V 0V tPLH tPHL nYx OUTPUT VM VOL + 0.3V VOH VM VM nYx OUTPUT VOL tPHZ tPZH VOH VOL VOH – 0.3V nYx OUTPUT VM 0V SA00071 SA00016 Waveform 1. Input (nAx) to Output (nYx) Propagation Delays Waveform 2. 3-State Output Enable and Disable Times TEST CIRCUIT AND WAVEFORM VCC 7.0V PULSE GENERATOR VIN tW 90% VOUT VM NEGATIVE PULSE RL 10% 0V tTLH (tR) tTHL (tF) CL tTLH (tR) RL tTHL (tF) 90% POSITIVE PULSE Test Circuit for 3-State Outputs AMP (V) 90% VM VM 10% 10% tW SWITCH POSITION TEST SWITCH tPLZ closed tPZL closed All other open 0V VM = 1.5V Input Pulse Definition INPUT PULSE REQUIREMENTS DEFINITIONS RL = Load resistor; see AC CHARACTERISTICS for value. CL = Load capacitance includes jig and probe capacitance; see AC CHARACTERISTICS for value. RT = Termination resistance should be equal to ZOUT of pulse generators. AMP (V) VM 10% D.U.T. RT 90% FAMILY 74ABT/H16 Amplitude Rep. Rate tW tR tF 3.0V 1MHz 500ns 2.5ns 2.5ns SA00018 1998 Feb 25 6 Philips Semiconductors Product specification 18-bit buffer/line driver; non-inverting (3-State) SSOP56: plastic shrink small outline package; 56 leads; body width 7.5 mm 1998 Feb 25 7 74ABT16825A 74ABTH16825A SOT371-1 Philips Semiconductors Product specification 18-bit buffer/line driver; non-inverting (3-State) TSSOP56: plastic thin shrink small outline package; 56 leads; body width 6.1mm 1998 Feb 25 8 74ABT16825A 74ABTH16825A SOT364-1 Philips Semiconductors Product specification 18-bit buffer/line driver; non-inverting (3-State) NOTES 1998 Feb 25 9 74ABT16825A 74ABTH16825A Philips Semiconductors Product specification 18-bit buffer/line driver; non-inverting (3-State) 74ABT16825A 74ABTH16825A Data sheet status Data sheet status Product status Definition [1] Objective specification Development This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. Preliminary specification Qualification This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make chages at any time without notice in order to improve design and supply the best possible product. Product specification Production This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. [1] Please consult the most recently issued datasheet before initiating or completing a design. Definitions Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Disclaimers Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Copyright Philips Electronics North America Corporation 1998 All rights reserved. Printed in U.S.A. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381 print code Document order number: yyyy mmm dd 10 Date of release: 05-96 9397-750-03503