Data Sheet No. PD94128 IRU1075 7.5A LOW DROPOUT POSITIVE ADJUSTABLE REGULATOR DESCRIPTION FEATURES 1V Dropout at Full Load Current Fast Transient Response 1% Voltage Reference Initial Accuracy Output Current Limiting Built-In Thermal Shutdown The IRU1075 is a low dropout three-terminal adjustable regulator with minimum of 7.5A output current capability. This product is specifically designed to provide well regulated supply for low voltage IC applications such as Pentium P54C, P55C as well as GTL+ termination for Pentium Pro and Klamath processor applications. The IRU1075 is also well suited for other processors such as Cyrix, AMD and Power PC applications. The IRU1075 is guaranteed to have <1.2V dropout at full load current making it ideal to provide well regulated outputs such as 3.3V with input supply voltage as low as 4.5V minimum. APPLICATIONS Low Voltage Processor Applications such as: P54C,P55C, Cyrix M2, POWER PC, AMD GTL+ Termination PENTIUM PRO, KLAMATH Low Voltage Memory Termination Applications Standard 3.3V Chip Set and Logic Applications TYPICAL APPLICATION 5V C1 1500uF Vin 3 IRU1075 Vout 2 Adj 1 R1 121 R2 200 3.3V C2 2x 1500uF 1075app1-1.0 Typical application of IRU1075 in a 5V to 3.3V regulator Notes: Pentium P54C, P55C, Klamath, Pentium Pro, VRE are trademarks of Intel Corp. Cyrix M2 is trademark of Cyrix Corp. Power PC is trademark of IBM Corp. PACKAGE ORDER INFORMATION Tj (°C) 0 To 150 Rev. 1.1 06/29/01 3-PIN PLASTIC TO-220 (T) IRU1075CT 3-PIN PLASTIC TO-263 (M) IRU1075CM 3-PIN PLASTIC Ultra Thin-Pak (P) IRU1075CP 1 IRU1075 ABSOLUTE MAXIMUM RATINGS Input Voltage (Vin) .................................................... Power Dissipation ..................................................... Storage Temperature Range ...................................... Operating Junction Temperature Range ..................... 7V Internally Limited -65°C To 150°C 0°C To 150°C PACKAGE INFORMATION 3-PIN PLASTIC TO-220 (T) 3-PIN PLASTIC TO-263 (M) 3-PIN PLASTIC ULTRA THIN-PAK (P) FRONT VIEW FRONT VIEW FRONT VIEW Tab is Vout 3 Vin 2 Vout 1 Adj θJT=2.7°C/W θJA=60°C/W Tab is Vout 3 Vin 2 Vout 1 Adj Tab is Vout θJA=35°C/W for 1" Square pad 3 Vin 2 Vout 1 Adj θJA=35°C/W for 1" Square pad ELECTRICAL SPECIFICATIONS Unless otherwise specified, these specifications apply over Cin=1µF, Cout=10µF, and Tj=0 to 150!C. Typical values refer to Tj=25!C. PARAMETER Reference Voltage Line Regulation Load Regulation (Note 1) Dropout Voltage (Note 2) Current Limit Minimum Load Current (Note 3) Thermal Regulation Ripple Rejection Adjust Pin Current Adjust Pin Current Change Temperature Stability Long Term Stability RMS Output Noise SYM Vref ∆Vo Iadj TEST CONDITION MIN TYP Io=10mA, Tj=25!C, (Vin-Vo)=1.5V 1.238 1.250 Io=10mA, (Vin-Vo)=1.5V 1.225 1.250 Io=10mA, 1.3V<(Vin-Vo)<7V Vin=3.3V, Vadj=0, 10mA<Io<7.5A 0.4 Io=7.5A 1.0 Io=4A 0.92 Vin=3.3V, dVo=100mV 7.6 9 Vin=3.3V, Vadj=0V 5 30ms Pulse, Vin-Vo=3V, Io=7.5A f=120Hz, Co=25µF Tantalum, Io=7.5A, Vin-Vo=3V Io=10mA, Vin-Vo=1.5V, Tj=25!C, Io=10mA, Vin-Vo=1.5V Io=10mA, Vin-Vo=1.5V, Tj=25!C Vin=3.3V, Vadj=0V, Io=10mA Tj=125!C, 1000Hrs Tj=25!C, 10Hz<f<10KHz Note 1: Low duty cycle pulse testing with Kelvin connections is required in order to maintain accurate data. Note 2: Dropout voltage is defined as the minimum differential voltage between Vin and Vout required to maintain regulation at Vout. It is measured when the output voltage drops 1% below its nominal value. 2 60 MAX 1.262 1.275 0.2 1.2 1.1 10 UNITS V % % V A mA 0.02 %/W 70 dB 55 0.2 0.5 0.3 0.003 120 5 µA µA % % %V Note 3: Minimum load current is defined as the minimum current required at the output in order for the output voltage to maintain regulation. Typically the resistor dividers are selected such that it automatically maintains this current. Rev. 1.1 06/29/01 IRU1075 PIN DESCRIPTIONS PIN # PIN SYMBOL 1 Adj PIN DESCRIPTION A resistor divider from this pin to the Vout pin and ground sets the output voltage. 2 Vout The output of the regulator. A minimum of 10µF capacitor must be connected from this pin to ground to insure stability. 3 Vin The input pin of the regulator. Typically a large storage capacitor is connected from this pin to ground to insure that the input voltage does not sag below the minimum drop out voltage during the load transient response. This pin must always be 1.3V higher than Vout in order for the device to regulate properly. BLOCK DIAGRAM Vin 3 2 Vout + 1.25V + CURRENT LIMIT THERMAL SHUTDOWN 1075blk1-1.0 1 Adj Figure 2 - Simplified block diagram of the IRU1075 APPLICATION INFORMATION Introduction The IRU1075 adjustable Low Dropout (LDO) regulator is a three-terminal device which can easily be programmed with the addition of two external resistors to any voltages within the range of 1.25 to 5.5 V. This regulator unlike the first generation of the three-terminal regulators such as LM117 that required 3V differential between the input and the regulated output, only needs 1.3V differential to maintain output regulation. This is a key requirement for today’s microprocessors that need typically 3.3V supply and are often generated from the 5V supply. Another major requirement of these microprocessors such as the Intel P54C is the need to switch the load current from zero to several amps in tens of Rev. 1.1 06/29/01 nanoseconds at the processor pins, which translates to an approximately 300 to 500ns current step at the regulator. In addition, the output voltage tolerances are also extremely tight and they include the transient response as part of the specification. For example Intel VRE specification calls for a total of ±100mV including initial tolerance, load regulation and 0 to 4.6A load step. The IRU1075 is specifically designed to meet the fast current transient needs as well as providing an accurate initial voltage, reducing the overall system cost with the need for fewer output capacitors. 3 IRU1075 Output Voltage Setting The IRU1075 can be programmed to any voltages in the range of 1.25V to 5.5V with the addition of R1 and R2 external resistors according to the following formula: VOUT = VREF × o1 + R2 p + IADJ × R2 R1 Where: VREF = 1.25V Typically IADJ = 50µA Typically R1 and R2 as shown in figure 3: regulator and the load is gained up by the factor of (1+R2/ R1), or the effective resistance will be, Rp(eff)=Rp*(1+R2/ R1). It is important to note that for high current applications, this can represent a significant percentage of the overall load regulation and one must keep the path from the regulator to the load as short as possible to minimize this effect. PARASITIC LINE RESISTANCE Rp Vin Vin Vout IRU1075 Vin Vin Vout Vout Adj IRU1075 Adj Vref IAdj = 50uA RL R1 R2 R1 R2 1075app3-1.0 1075app2-1.0 Figure 3 - Typical application of the IRU1075 for programming the output voltage The IRU1075 keeps a constant 1.25V between the output pin and the adjust pin. By placing a resistor R1 across these two pins a constant current flows through R1, adding to the Iadj current and into the R2 resistor producing a voltage equal to the (1.25/R1)*R2 + Iadj*R2 which will be added to the 1.25V to set the output voltage. This is summarized in the above equation. Since the minimum load current requirement of the IRU1075 is 10mA, R1 is typically selected to be 121Ω resistor so that it automatically satisfies the minimum current requirement. Notice that since Iadj is typically in the range of 50µA it only adds a small error to the output voltage and should only be considered when a very precise output voltage setting is required. For example, in a typical 3.3V application where R1=121Ω and R2=200Ω the error due to Iadj is only 0.3% of the nominal set point. Load Regulation Since the IRU1075 is only a three-terminal device, it is not possible to provide true remote sensing of the output voltage at the load. Figure 4 shows that the best load regulation is achieved when the bottom side of R2 is connected to the load and the top side of R1 resistor is connected directly to the case or the Vout pin of the regulator and not to the load. In fact, if R1 is connected to the load side, the effective resistance between the 4 Figure 4 - Schematic showing connection for best load regulation Stability The IRU1075 requires the use of an output capacitor as part of the frequency compensation in order to make the regulator stable. Typical designs for microprocessor applications use standard electrolytic capacitors with a typical ESR in the range of 50 to 100 mΩ and an output capacitance of 500 to 1000µF. Fortunately as the capacitance increases, the ESR decreases resulting in a fixed RC time constant. The IRU1075 takes advantage of this phenomena in making the overall regulator loop stable. For most applications a minimum of 100µF aluminum electrolytic capacitor such as Sanyo MVGX series, Panasonic FA series as well as the Nichicon PL series insures both stability and good transient response. Thermal Design The IRU1075 incorporates an internal thermal shutdown that protects the device when the junction temperature exceeds the maximum allowable junction temperature. Although this device can operate with junction temperatures in the range of 150!C, it is recommended that the selected heat sink be chosen such that during maximum continuous load operation the junction temperature is kept below this number. The example below shows the steps in selecting the proper regulator heat sink for the worst case current consumption using Intel 200MHz microprocessor as the load. Rev. 1.1 06/29/01 IRU1075 Assuming the following specifications: VIN = 5V VOUT = 3.5V IOUT(MAX) = 4.6A TA = 35!C The steps for selecting a proper heat sink to keep the junction temperature below 135°C is given as: 4) With the maximum heat sink temperature calculated in the previous step, the heat-sink-to-air thermal resistance (θSA) is calculated by first calculating the temperature rise above the ambient as follows: ∆T = TS - TA = 116 - 35 = 81!C ∆T = Temperature Rise Above Ambient θSA = 1) Calculate the maximum power dissipation using: PD = IOUT × (VIN - VOUT) PD = 4.6 × (5 - 3.5) = 6.9W 2) Select a package from the regulator data sheet and record its junction to case (or tab) thermal resistance. Selecting TO-220 package gives us: θJC = 2.7!C/W ∆T 81 = = 11.7!C/W PD 6.9 5) Next, a heat sink with lower θsa than the one calculated in Step 4 must be selected. One way to do this is to simply look at the graphs of the “Heat Sink Temp Rise Above the Ambient” vs. the “Power Dissipation” and select a heat sink that results in lower temperature rise than the one calculated in previous step. The following heat sinks from AAVID and Thermalloy meet this criteria. Air Flow (LFM) 3) Assuming that the heat sink is black anodized, calculate the maximum heat sink temperature allowed: Assume, θcs = 0.05°C/W (heat-sink-to-case thermal resistance for black anodized) 0 100 Thermalloy 6021PB 6021PB 200 AAVID 534202B 534202B 507302 300 6073PB 6109PB 400 7141D 575002 576802B TS = TJ - PD × (θJC + θCS) TS = 135 - 6.9 × (2.7 + 0.05) = 116!C Rev. 1.1 06/29/01 5 IRU1075 Notes IR WORLD HEADQUARTERS : 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information. Data and specifications subject to change without notice. 02/01 6 Rev. 1.1 06/29/01