PD - 96127
IRF7404QPbF
HEXFET® Power MOSFET
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Advanced Process Technology
Ultra Low On-Resistance
P Channel MOSFET
Surface Mount
Available in Tape & Reel
150°C Operating Temperature
Automotive [Q101] Qualified
Lead-Free
A
D
S
1
8
S
2
7
D
S
3
6
D
G
4
5
D
VDSS = -20V
RDS(on) = 0.040Ω
Top View
Description
Specifically designed for Automotive applications, these
HEXFET® Power MOSFET's in package utilize the lastest
processing techniques to achieve extremely low onresistance per silicon area. Additional features of these
Automotive qualified HEXFET Power MOSFET's are a
150°C junction operating temperature, fast switching
speed and improved repetitive avalanche rating. These
benefits combine to make this design an extremely efficient
and reliable device for use in Automotive applications and
a wide variety of other applications.
The efficient SO-8 package provides enhanced thermal
characteristics making it ideal in a variety of power
applications. This surface mount SO-8 can dramatically
reduce board space and is also available in Tape & Reel.
SO-8
Absolute Maximum Ratings
Parameter
ID @ TA = 25°C
ID @ TA = 25°C
ID @ TA = 70°C
IDM
PD @TA = 25°C
VGS
dv/dt
TJ, TSTG
Max.
10 Sec. Pulsed Drain Current, VGS @ -4.5V
Continuous Drain Current, VGS @ -4.5V
Continuous Drain Current, VGS @ -4.5V
Pulsed Drain Current
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Peak Diode Recovery dv/dt
Junction and Storage Temperature Range
Units
-7.7
-6.7
-5.4
-27
2.5
0.02
± 12
-5.0
-55 to + 150
A
W
W/°C
V
V/ns
°C
Thermal Resistance Ratings
Parameter
RθJA
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Maximum Junction-to-Ambient
Typ.
Max.
Units
50
°C/W
1
08/29/07
IRF7404QPbF
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
∆V(BR)DSS/∆TJ
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
RDS(ON)
Static Drain-to-Source On-Resistance
VGS(th)
gfs
Gate Threshold Voltage
Forward Transconductance
IDSS
Drain-to-Source Leakage Current
V(BR)DSS
Min.
-20
-0.70
6.8
Typ. Max. Units
Conditions
V
V GS = 0V, ID = -250µA
-0.012 V/°C Reference to 25°C, ID = -1mA
0.040
V GS = -4.5V, ID = -3.2A
Ω
0.060
V GS = -2.7V, ID = -2.7A
V
V DS = VGS, ID = -250µA
S
V DS = -15V, ID = -3.2A
-1.0
V DS = -16V, VGS = 0V
µA
-25
V DS = -16V, VGS = 0V, TJ = 125°C
-100
V GS = -12V
nA
100
V GS = 12V
50
I D = -3.2A
5.5
nC V DS = -16V
21
V GS = -4.5V, See Fig. 6 and 12
14
V DD = -10V
32
I D = -3.2A
ns
100
R G = 6.0Ω
65
R D = 3.1Ω, See Fig. 10
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
LD
Internal Drain Inductance
2.5
LS
Internal Source Inductance
4.0
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
1500
730
340
IGSS
D
nH
Between lead tip
and center of die contact
pF
V GS = 0V
V DS = -15V
= 1.0MHz, See Fig. 5
G
S
Source-Drain Ratings and Characteristics
IS
I SM
VSD
trr
Qrr
ton
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Forward Turn-On Time
Min. Typ. Max. Units
-3.1
-27
69
71
-1.0
100
110
A
V
ns
µC
Conditions
D
MOSFET symbol
showing the
G
integral reverse
p-n junction diode.
S
TJ = 25°C, IS = -2.0A, VGS = 0V
TJ = 25°C, I F = -3.2A
di/dt = 100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
ISD ≤ -3.2A, di/dt ≤ -65A/µs, VDD ≤ V(BR)DSS,
Pulse width ≤ 300µs; duty cycle ≤ 2%.
Surface mounted on FR-4 board, t ≤ 10sec.
TJ ≤ 150°C
2
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IRF7404QPbF
1000
1000
VGS
- 7.5V
- 5.0V
- 4.0V
- 3.5V
- 3.0V
- 2.5V
- 2.0V
BOTTOM - 1.5V
-ID , Drain-to-Source Current (A)
-I D , Drain-to-Source Current (A)
100
10
-1.5V
1
20µs PULSE WIDTH
TJ = 25°C
A
0.1
0.01
VGS
- 7.5V
- 5.0V
- 4.0V
- 3.5V
- 3.0V
- 2.5V
- 2.0V
BOTTOM - 1.5V
TOP
TOP
0.1
1
10
100
10
-1.5V
1
20µs PULSE WIDTH
TJ = 150°C
0.1
0.01
100
0.1
Fig 1. Typical Output Characteristics
2.0
R DS(on) , Drain-to-Source On Resistance
(Normalized)
-ID , Drain-to-Source Current (A)
TJ = 25°C
TJ = 150°C
10
VDS = -15V
20µs PULSE WIDTH
2.0
2.5
3.0
3.5
4.0
4.5
-VGS , Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
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A
100
Fig 2. Typical Output Characteristics
100
1.5
10
-VDS , Drain-to-Source Voltage (V)
-VDS , Drain-to-Source Voltage (V)
1
1
5.0
A
I D = -5.3A
1.5
1.0
0.5
VGS = -4.5V
0.0
-60
-40
-20
0
20
40
60
80
A
100 120 140 160
TJ , Junction Temperature (°C)
Fig 4. Normalized On-Resistance
Vs. Temperature
3
IRF7404QPbF
10
V GS = 0V,
f = 1MHz
C iss = Cgs + C gd , Cds SHORTED
C rss = C gd
C oss = C ds + C gd
-VGS , Gate-to-Source Voltage (V)
C, Capacitance (pF)
3000
Ciss
2000
Coss
1000
Crss
0
1
10
100
I D = -3.2A
VDS = -16V
8
6
4
2
FOR TEST CIRCUIT
SEE FIGURE 12
0
A
0
10
20
30
40
50
60
A
Q G , Total Gate Charge (nC)
-VDS , Drain-to-Source Voltage (V)
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
100
100
-I SD , Reverse Drain Current (A)
OPERATION IN THIS AREA LIMITED
BY RDS(on)
-IID , Drain Current (A)
TJ = 150°C
10
TJ = 25°C
1
VGS = 0V
0.1
0.2
0.4
0.6
0.8
1.0
1.2
1.4
-V SD , Source-to-Drain Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
1.6
1ms
10
10ms
TA = 25 ° C
TJ = 150 ° C
Single Pulse
1
0.1
1
10
100
-VDS , Drain-to-Source Voltage (V)
Fig 8. Maximum Safe Operating Area
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IRF7404QPbF
8.0
V DS
D.U.T.
V GS
-ID , Drain Current (A)
RD
RG
6.0
A
V
+ DD
-4.5V
Pulse Width ≤ 1µs
Duty Factor ≤ 0.1%
4.0
Fig 10a. Switching Time Test Circuit
2.0
VDS
90%
0.0
25
50
75
100
125
150
TC , Case Temperature ( °C)
10%
VGS
Fig 9. Maximum Drain Current Vs.
Ambient Temperature
td(on)
tr
t d(off)
tf
Fig 10b. Switching Time Waveforms
Thermal Response (Z thJA )
100
D = 0.50
10
0.20
0.10
0.05
PDM
0.02
1
0.01
t1
t2
SINGLE PULSE
(THERMAL RESPONSE)
0.1
0.0001
0.001
Notes:
1. Duty factor D = t 1 / t 2
2. Peak T J = P DM x Z thJA + TA
0.01
0.1
1
10
100
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient
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5
IRF7404QPbF
Current Regulator
Same Type as D.U.T.
50KΩ
QG
12V
.2µF
.3µF
-4.5 V
QGS
VGS
VG
-3mA
Charge
Fig 12a. Basic Gate Charge Waveform
6
D.U.T.
QGD
+VDS
IG
ID
Current Sampling Resistors
Fig 12b. Gate Charge Test Circuit
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IRF7404QPbF
Peak Diode Recovery dv/dt Test Circuit
+
D.U.T
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
+
-
-
+
**
RG
• dv/dt controlled by RG
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
VGS*
+
-
*
VDD
*
Reverse Polarity for P-Channel
** Use P-Channel Driver for P-Channel Measurements
Driver Gate Drive
P.W.
Period
D=
P.W.
Period
VGS=10V
[
] ***
D.U.T. ISD Waveform
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
[
Re-Applied
Voltage
Body Diode
VDD
]
Forward Drop
Inductor Curent
Ripple ≤ 5%
[
ISD
]
*** VGS = 5.0V for Logic Level and 3V Drive Devices
Fig 13. For P-Channel HEXFETS
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7
IRF7404QPbF
SO-8 Package Outline
Dimensions are shown in millimeters (inches)
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SO-8 Part Marking
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Note: For the most current drawing please refer to IR website at: http://www.irf.com/package/
8
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IRF7404QPbF
SO-8 Tape and Reel
Dimensions are shown in millimeters (inches)
TERMINAL NUMBER 1
12.3 ( .484 )
11.7 ( .461 )
8.1 ( .318 )
7.9 ( .312 )
FEED DIRECTION
NOTES:
1. CONTROLLING DIMENSION : MILLIMETER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS(INCHES).
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
330.00
(12.992)
MAX.
14.40 ( .566 )
12.40 ( .488 )
NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. OUTLINE CONFORMS TO EIA-481 & EIA-541.
Note: For the most current drawing please refer to IR website at: http://www.irf.com/package/
Data and specifications subject to change without notice.
This product has been designed and qualified for the Automotive [Q101] market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.08/2007
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9