IRF IRF7307QPBF_10

PD - 96106A
IRF7307QPbF
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Advanced Process Technology
Ultra Low On-Resistance
Dual N and P Channel MOSFET
Surface Mount
Available in Tape & Reel
150°C Operating Temperature
Lead-Free
HEXFET® Power MOSFET
S1
N-CHANNEL MOSFET
1
8
D1
G1
2
7
D1
S2
3
6
D2
G2
4
5
D2
N-Ch
P-Ch
20V
-20V
VDSS
P-CHANNEL MOSFET
RDS(on) 0.050Ω 0.090Ω
Top View
Description
These HEXFET® Power MOSFET's in a Dual SO8 package utilize the lastest processing techniques
to achieve extremely low on-resistance per silicon
area. Additional features of these HEXFET Power
MOSFET's are a 150°C junction operating
temperature, fast switching speed and improved
repetitive avalanche rating. These benefits combine
to make this design an extremely efficient and
reliable device for use in a wide variety of
applications.
The efficient SO-8 package provides enhanced
thermal characteristics and dual MOSFET die
capability making it ideal in a variety of power
applications. This dual, surface mount SO-8 can
dramatically reduce board space and is also
available in Tape & Reel.
SO-8
Absolute Maximum Ratings
Parameter
I D @ TA = 25°C
ID @ TA = 25°C
I D @ TA = 70°C
IDM
P D @TA = 25°C
VGS
dv/dt
TJ, TSTG
10 Sec. Pulse Drain Current, VGS @ 4.5V
Continuous Drain Current, VGS @ 4.5V
Continuous Drain Current, VGS @ 4.5V
Pulsed Drain Current 
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Peak Diode Recovery dv/dt ‚
Junction and Storage Temperature Range
Max.
N-Channel
5.7
5.2
4.1
21
P-Channel
-4.7
-4.3
-3.4
-17
2.0
0.016
± 12
5.0
-5.0
-55 to + 150
Units
A
W
W/°C
V
V/ns
°C
Thermal Resistance Ratings
Parameter
RθJA
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Maximum Junction-to-Ambient„
Typ.
Max.
Units
–––
62.5
°C/W
1
08/02/10
IRF7307QPbF
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter
V (BR)DSS
Drain-to-Source Breakdown Voltage
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient
RDS(ON)
Static Drain-to-Source On-Resistance
V GS(th)
Gate Threshold Voltage
g fs
Forward Transconductance
I DSS
Drain-to-Source Leakage Current
IGSS
Gate-to-Source Forward Leakage
Qg
Total Gate Charge
Qgs
Gate-to-Source Charge
Qgd
Gate-to-Drain ("Miller") Charge
td(on)
Turn-On Delay Time
tr
Rise Time
td(off)
Turn-Off Delay Time
tf
Fall Time
LD
LS
Internal Drain Inductace
Internal Source Inductance
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
N-P
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
N-P
N-P
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
Min. Typ. Max.
20
—
—
-20 —
—
— 0.044 —
— -0.012 —
—
— 0.050
—
— 0.070
—
— 0.090
—
— 0.140
0.70 —
—
-0.70 —
—
8.30 —
—
4.00 —
—
—
— 1.0
—
— -1.0
—
—
25
—
— -25
––
— ±100
—
—
20
—
—
22
—
— 2.2
—
— 3.3
—
— 8.0
—
— 9.0
— 9.0 —
— 8.4 —
—
42
—
—
26
—
—
32
—
—
51
—
—
51
—
—
33
—
— 4.0 —
— 6.0 —
— 660 —
— 610 —
— 280 —
— 310 —
— 140 —
— 170 —
Units
V
V/°C
Ω
V
S
µA
nC
ns
nH
pF
Conditions
VGS = 0V, ID = 250µA
VGS = 0V, ID = -250µA
Reference to 25°C, ID = 1mA
Reference to 25°C, ID = -1mA
VGS = 4.5V, ID = 2.6A ƒ
VGS = 2.7V, ID = 2.2A ƒ
VGS = -4.5V, ID = -2.2A ƒ
VGS = -2.7V, ID = -1.8A ƒ
VDS = VGS, I D = 250µA
VDS = VGS, I D = -250µA
VDS = 15V, I D = 2.6A ƒ
VDS = -15V, I D = -2.2A ƒ
VDS = 16V, VGS = 0V
VDS = -16V, V GS = 0V,
VDS = 16V, VGS = 0V, TJ = 125°C
VDS = -16V, V GS = 0V, TJ = 125°C
VGS = ± 12V
N-Channel
I D = 2.6A, VDS = 16V, VGS = 4.5V
P-Channel
I D = -2.2A, VDS = -16V, VGS = -4.5V
N-Channel
VDD = 10V, ID = 2.6A, RG = 6.0Ω,
RD = 3.8Ω
P-Channel
VDD = -10V, ID = -2.2A, RG = 6.0Ω,
RD = 4.5Ω
ƒ
ƒ
Between lead tip
and center of die contact
N-Channel
VGS = 0V, VDS = 15V, ƒ = 1.0MHz
P-Channel
VGS = 0V, VDS = -15V, ƒ = 1.0MHz
ƒ
Source-Drain Ratings and Characteristics
Parameter
IS
Continuous Source Current (Body Diode)
I SM
Pulsed Source Current (Body Diode) 
VSD
Diode Forward Voltage
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
ton
Forward Turn-On Time
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
N-P
Min. Typ. Max. Units
Conditions
—
— 2.5
—
— -2.5
A
—
—
21
—
— -17
—
— 1.0
TJ = 25°C, IS = 1.8A, VGS = 0V ƒ
V
—
— -1.0
TJ = 25°C, IS = -1.8A, VGS = 0V ƒ
—
29
44
N-Channel
ns
—
56
84
TJ = 25°C, IF = 2.6A, di/dt = 100A/µs
—
22
33
P-Channel
ƒ
nC
TJ = 25°C, IF = -2.2A, di/dt = 100A/µs
—
71 110
Intrinsic turn-on time is neglegible (turn-on is dominated by LS+LD)
Notes:
 Repetitive rating; pulse width limited by
ƒ Pulse width ≤ 300µs; duty cycle ≤ 2%.
‚ N-Channel ISD ≤ 2.6A, di/dt ≤ 100A/µs, VDD ≤ V(BR)DSS, TJ ≤ 150°C
„ Surface mounted on FR-4 board, t ≤ 10sec.
max. junction temperature. ( See fig. 23 )
P-Channel ISD ≤ -2.2A, di/dt ≤ 50A/µs, VDD ≤ V(BR)DSS, TJ ≤ 150°C
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2
IRF7307QPbF
N-Channel
1000
1000
VGS
7.5V
5.0V
4.0V
3.5V
3.0V
2.5V
2.0V
BOTTOM 1.5V
I , Drain-to-Source Current (A)
D
I , Drain-to-Source Current (A)
D
VGS
7.5V
5.0V
4.0V
3.5V
3.0V
2.5V
2.0V
BOTTOM 1.5V
TOP
TOP
100
10
10
1.5V
20µs PULSE WIDTH
TJ = 25°C
A
1.5V
1
0.1
100
1
10
100
Fig 1. Typical Output Characteristics
2.0
R DS(on) , Drain-to-Source On Resistance
(Normalized)
I D , Drain-to-Source Current (A)
TJ = 25°C
TJ = 150°C
10
VDS = 15V
20µs PULSE WIDTH
2.0
2.5
3.0
3.5
4.0
4.5
1.5
1.0
0.5
0.0
-60 -40 -20
A
5.0
V GS , Gate-to-Source Voltage (V)
C, Capacitance (pF)
Ciss
Coss
Crss
300
0
1
10
V DS , Drain-to-Source Voltage (V)
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
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20
40
60
A
80 100 120 140 160
Fig 4. Normalized On-Resistance
Vs. Temperature
10
V GS = 0V,
f = 1MHz
C iss = Cgs + C gd , Cds SHORTED
C rss = C gd
C oss = C ds + C gd
600
VGS = 4.5V
0
TJ , Junction Temperature (°C)
Fig 3. Typical Transfer Characteristics
900
100
ID = 4.3A
VGS , Gate-to-Source Voltage (V)
1200
10
Fig 2. Typical Output Characteristics
100
1.5
1
VDS , Drain-to-Source Voltage (V)
VDS , Drain-to-Source Voltage (V)
1
20µs PULSE WIDTH
TJ = 150°C
A
1
0.1
100
A
I D = 2.6A
VDS = 16V
8
6
4
2
FOR TEST CIRCUIT
SEE FIGURE 11
0
0
5
10
15
20
25
A
Q G , Total Gate Charge (nC)
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
3
IRF7307QPbF
N-Channel
100
OPERATION IN THIS AREA LIMITED
BY RDS(on)
ID , Drain Current (A)
ISD , Reverse Drain Current (A)
100
10
TJ = 150°C
TJ = 25°C
1
0.0
0.5
1.0
1.5
2.0
10
1ms
TA = 25 °C
TJ = 150 °C
Single Pulse
VGS = 0V
0.1
100us
1
0.1
A
2.5
1
RD
VDS
VGS
5.0
I D , Drain Current (A)
100
Fig 8. Maximum Safe Operating Area
6.0
D.U.T.
RG
4.0
3.0
+
V
- DD
4.5V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
2.0
1.0
0.0
10
VDS , Drain-to-Source Voltage (V)
VSD , Source-to-Drain Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
10ms
Fig 10a. Switching Time Test Circuit
25
50
75
100
TC , Case Temperature
125
150
( °C)
VDS
90%
Fig 9. Maximum Drain Current Vs.
Ambient Temperature
Current Regulator
Same Type as D.U.T.
10%
VGS
td(on)
50KΩ
12V
t d(off)
tf
Fig 10b. Switching Time Waveforms
.2µF
.3µF
D.U.T.
+
V
- DS
QG
4.5V
VGS
QGS
3mA
QGD
VG
IG
ID
Current Sampling Resistors
Fig 11a. Gate Charge Test Circuit
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tr
Charge
Fig 11b. Basic Gate Charge Waveform
4
IRF7307QPbF
P-Channel
100
100
VGS
- 7.5V
- 5.0V
- 4.0V
- 3.5V
- 3.0V
- 2.5V
- 2.0V
BOTTOM - 1.5V
VGS
- 7.5V
- 5.0V
- 4.0V
- 3.5V
- 3.0V
- 2.5V
- 2.0V
BOTTOM - 1.5V
TOP
-ID , Drain-to-Source Current (A)
-ID , Drain-to-Source Current (A)
TOP
10
1
-1.5V
20µs PULSE WIDTH
TJ = 25°C
A
0.1
0.01
0.1
1
10
10
1
-1.5V
20µs PULSE WIDTH
TJ = 150°C
0.1
0.01
100
0.1
Fig 12. Typical Output Characteristics
R DS(on) , Drain-to-Source On Resistance
(Normalized)
-ID , Drain-to-Source Current (A)
TJ = 150°C
1
VDS = -15V
20µs PULSE WIDTH
0.1
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
A
I D = -3.6A
1.5
1.0
0.5
0.0
-60
-VGS , Gate-to-Source Voltage (V)
-VGS , Gate-to-Source Voltage (V)
C, Capacitance (pF)
Ciss
1000
C oss
Crss
500
0
10
100
A
-VDS , Drain-to-Source Voltage (V)
Fig 16. Typical Capacitance Vs.
Drain-to-Source Voltage
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-20
0
20
40
60
80
A
100 120 140 160
Fig 15. Normalized On-Resistance
Vs. Temperature
10
V GS = 0V,
f = 1MHz
C iss = Cgs + C gd , Cds SHORTED
C rss = C gd
C oss = C ds + C gd
1
VGS = -4.5V
-40
TJ , Junction Temperature (°C)
Fig 14. Typical Transfer Characteristics
1500
A
100
Fig 13. Typical Output Characteristics
2.0
100
TJ = 25°C
10
-VDS , Drain-to-Source Voltage (V)
-VDS , Drain-to-Source Voltage (V)
10
1
I D = -2.2A
VDS = -16V
8
6
4
2
FOR TEST CIRCUIT
SEE FIGURE 22
0
0
5
10
15
20
25
A
Q G , Total Gate Charge (nC)
Fig 17. Typical Gate Charge Vs.
Gate-to-Source Voltage
5
IRF7307QPbF
P-Channel
100
OPERATION IN THIS AREA LIMITED
BY RDS(on)
10
-IID , Drain Current (A)
-ISD , Reverse Drain Current (A)
100
TJ = 150°C
TJ = 25°C
1
VGS = 0V
0.1
0.3
0.6
0.9
1.2
10
1ms
1
A
1.5
TA = 25 °C
TJ = 150 °C
Single Pulse
1
10
100
-VDS , Drain-to-Source Voltage (V)
-VSD , Source-to-Drain Voltage (V)
Fig 18. Typical Source-Drain Diode
Forward Voltage
Fig 19. Maximum Safe Operating Area
RD
VDS
5.0
VGS
4.0
-ID , Drain Current (A)
10ms
D.U.T.
RG
-
+
3.0
VDD
-4.5V
2.0
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
1.0
0.0
Fig 21a. Switching Time Test Circuit
25
50
75
100
TC , Case Temperature
125
150
( °C)
VDS
90%
Fig 20. Maximum Drain Current Vs.
Ambient Temperature
Current Regulator
Same Type as D.U.T.
10%
VGS
td(on)
50KΩ
12V
t d(off)
tf
Fig 21b. Switching Time Waveforms
.2µF
.3µF
D.U.T.
+VDS
QG
-4.5V
VGS
QGS
-3mA
QGD
VG
IG
ID
Current Sampling Resistors
Fig 22a. Gate Charge Test Circuit
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tr
Charge
Fig 22b. Basic Gate Charge Waveform
6
IRF7307QPbF
N & P-Channel
Thermal Response (Z thJA )
100
D = 0.50
0.20
10
0.10
0.05
0.02
1
PDM
0.01
t1
SINGLE PULSE
(THERMAL RESPONSE)
t2
Notes:
1. Duty factor D = t 1 / t 2
2. Peak T J = P DM x Z thJA + TA
0.1
0.0001
0.001
0.01
0.1
1
10
100
t1, Rectangular Pulse Duration (sec)
Fig 23. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient
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IRF7307QPbF
Peak Diode Recovery dv/dt Test Circuit
+
D.U.T
ƒ
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
+
‚
-
-
„
+
**

RG
• dv/dt controlled by RG
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
VGS*
+
-
*
VDD
*
Reverse Polarity for P-Channel
** Use P-Channel Driver for P-Channel Measurements
Driver Gate Drive
P.W.
Period
D=
P.W.
Period
[VGS=10V ] ***
D.U.T. ISD Waveform
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
[VDD]
Forward Drop
Inductor Curent
Ripple ≤ 5%
[ISD ]
*** VGS = 5.0V for Logic Level and 3V Drive Devices
Fig 24. For N and P Channel HEXFETS
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8
IRF7307QPbF
SO-8 Package Outline
Dimensions are shown in millimeters (inches)
D
5
A
8
6
7
6
5
H
1
2
3
0.25 [.010]
4
A
MAX
MIN
.0532
.0688
1.35
1.75
A1 .0040
e
e1
8X b
0.25 [.010]
A
A1
MAX
0.25
.0098
0.10
b
.013
.020
0.33
0.51
c
.0075
.0098
0.19
0.25
D
.189
.1968
4.80
5.00
E
.1497
.1574
3.80
4.00
e
.050 BASIC
1.27 BASIC
.025 BASIC
0.635 BASIC
e1
6X
MILLIMETERS
MIN
A
E
INCHES
DIM
B
H
.2284
.2440
5.80
6.20
K
.0099
.0196
0.25
0.50
L
.016
.050
0.40
1.27
y
0°
8°
0°
8°
K x 45°
C
y
0.10 [.004]
8X L
8X c
7
C A B
F OOTPRINT
NOT ES :
1. DIMENS IONING & TOLERANCING PER ASME Y14.5M-1994.
8X 0.72 [.028]
2. CONT ROLLING DIMENS ION: MILLIMET ER
3. DIMENS IONS ARE SHOWN IN MILLIMETERS [INCHES].
4. OUTLINE CONFORMS TO JEDEC OUTLINE MS -012AA.
5 DIMENS ION DOES NOT INCLUDE MOLD PROT RUSIONS .
MOLD PROTRUS IONS NOT TO EXCEED 0.15 [.006].
6 DIMENS ION DOES NOT INCLUDE MOLD PROT RUSIONS .
MOLD PROTRUS IONS NOT TO EXCEED 0.25 [.010].
6.46 [.255]
7 DIMENS ION IS T HE LENGT H OF LEAD FOR SOLDERING TO
A S UBST RAT E.
3X 1.27 [.050]
8X 1.78 [.070]
SO-8 Part Marking
EXAMPLE: T HIS IS AN IRF7101 (MOSFET )
INTERNAT IONAL
RECT IFIER
LOGO
XXXX
F7101
DAT E CODE (YWW)
P = DESIGNAT ES LEAD-FREE
PRODUCT (OPT IONAL)
Y = LAST DIGIT OF T HE YEAR
WW = WEEK
A = ASS EMBLY SIT E CODE
LOT CODE
PART NUMBER
Notes:
1. For an Automotive Qualified version of this part please seehttp://www.irf.com/product-info/auto/
2. For the most current drawing please refer to IR website at http://www.irf.com/package/
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9
IRF7307QPbF
SO-8 Tape and Reel
Dimensions are shown in millimeters (inches)
TERMINAL NUMBER 1
12.3 ( .484 )
11.7 ( .461 )
8.1 ( .318 )
7.9 ( .312 )
FEED DIRECTION
NOTES:
1. CONTROLLING DIMENSION : MILLIMETER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS(INCHES).
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
330.00
(12.992)
MAX.
14.40 ( .566 )
12.40 ( .488 )
NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. OUTLINE CONFORMS TO EIA-481 & EIA-541.
Data and specifications subject to change without notice.
This product has been designed and qualified for the Industrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.08/2010
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