PHILIPS 74AHC1GU04

74AHC1GU04
Inverter
Rev. 05 — 10 July 2007
Product data sheet
1. General description
The 74AHC1GU04 is a high-speed Si-gate CMOS device. It provides an inverting single
stage function.
2. Features
n
n
n
n
n
Symmetrical output impedance
High noise immunity
Low power dissipation
Balanced propagation delays
ESD protection:
u HBM JESD22-A114E: exceeds 2000 V
u MM JESD22-A115-A: exceeds 200 V
u CDM JESD22-C101C: exceeds 1000 V
n Specified from −40 °C to +125 °C
3. Ordering information
Table 1.
Ordering information
Type number
Package
Temperature range
Name
Description
Version
74AHC1GU04GW
−40 °C to +125 °C
TSSOP5
plastic thin shrink small outline package;
5 leads; body width 1.25 mm
SOT353-1
74AHC1GU04GV
−40 °C to +125 °C
SC-74A
plastic surface-mounted package; 5 leads
SOT753
4. Marking
Table 2.
Marking codes
Type number
Marking
74AHC1GU04GW
AD
74AHC1GU04GV
AU4
74AHC1GU04
NXP Semiconductors
Inverter
5. Functional diagram
2
A
Y
4
1
2
mna044
mna043
Fig 1. Logic symbol
4
A
Y
mna045
Fig 2. IEC logic symbol
Fig 3. Logic diagram
6. Pinning information
6.1 Pinning
74AHC1GU04
n.c.
1
A
2
GND
3
5
VCC
4
Y
001aaf099
Fig 4. Pin configuration
6.2 Pin description
Table 3.
Pin description
Symbol
Pin
Description
n.c.
1
not connected
A
2
data input
GND
3
ground (0 V)
Y
4
data output
VCC
5
supply voltage
7. Functional description
Table 4.
Function table
H = HIGH voltage level; L = LOW voltage level
Input
Output
A
Y
L
H
H
L
74AHC1GU04_5
Product data sheet
© NXP B.V. 2007. All rights reserved.
Rev. 05 — 10 July 2007
2 of 12
74AHC1GU04
NXP Semiconductors
Inverter
8. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
VCC
supply voltage
IIK
input clamping current
VI
input voltage
IOK
output clamping current
IO
output current
VI < −0.5 V
Min
Max
Unit
−0.5
+7.0
V
−20
-
mA
−0.5
+7.0
V
VO < −0.5 V or VO > VCC + 0.5 V
-
±20
mA
−0.5 V < VO < VCC + 0.5 V
-
±25
mA
[1]
ICC
supply current
-
75
mA
IGND
ground current
−75
-
mA
Tstg
storage temperature
−65
+150
°C
-
250
mW
total power dissipation
Ptot
Tamb = −40 °C to +125 °C
[2]
[1]
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2]
For both TSSOP5 and SC-74A packages: above 87.5 °C the value of Ptot derates linearly with 4.0 mW/K.
9. Recommended operating conditions
Table 6.
Recommended operating conditions
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min
Typ
Max
Unit
2.0
5.0
5.5
V
VCC
supply voltage
VI
input voltage
0
-
5.5
V
VO
output voltage
0
-
VCC
V
Tamb
ambient temperature
−40
+25
+125
°C
∆t/∆V
input transition rise and fall rate
VCC = 3.3 V ± 0.3 V
-
-
100
ns/V
VCC = 5.0 V ± 0.5 V
-
-
20
ns/V
10. Static characteristics
Table 7.
Static characteristics
Voltages are referenced to GND (ground = 0 V).
Symbol
VIH
VIL
Parameter
HIGH-level
input voltage
LOW-level
input voltage
25 °C
Conditions
−40 °C to +85 °C −40 °C to +125 °C Unit
Min
Typ
Max
Min
Max
Min
Max
VCC = 2.0 V
1.7
-
-
1.7
-
1.7
-
V
VCC = 3.0 V
2.4
-
-
2.4
-
2.4
-
V
VCC = 5.5 V
4.4
-
-
4.4
-
4.4
-
V
VCC = 2.0V
-
-
0.3
-
0.3
-
0.3
V
VCC = 3.0 V
-
-
0.6
-
0.6
-
0.6
V
VCC = 5.5 V
-
-
1.1
-
1.1
-
1.1
V
74AHC1GU04_5
Product data sheet
© NXP B.V. 2007. All rights reserved.
Rev. 05 — 10 July 2007
3 of 12
74AHC1GU04
NXP Semiconductors
Inverter
Table 7.
Static characteristics …continued
Voltages are referenced to GND (ground = 0 V).
Symbol
VOH
VOL
Parameter
25 °C
Conditions
−40 °C to +85 °C −40 °C to +125 °C Unit
Min
Typ
Max
Min
Max
Min
Max
HIGH-level
VI = VIH or VIL
output voltage
IO = −50 µA; VCC = 2.0 V
1.9
2.0
-
1.9
-
1.9
-
V
IO = −50 µA; VCC = 3.0 V
2.9
3.0
-
2.9
-
2.9
-
V
IO = −50 µA; VCC = 4.5 V
4.4
4.5
-
4.4
-
4.4
-
V
IO = −4.0 mA; VCC = 3.0 V
2.58
-
-
2.48
-
2.40
-
V
IO = −8.0 mA; VCC = 4.5 V
3.94
-
-
3.8
-
3.70
-
V
LOW-level
VI = VIH or VIL
output voltage
IO = 50 µA; VCC = 2.0 V
-
0
0.1
-
0.1
-
0.1
V
IO = 50 µA; VCC = 3.0 V
-
0
0.1
-
0.1
-
0.1
V
IO = 50 µA; VCC = 4.5 V
-
0
0.1
-
0.1
-
0.1
V
IO = 4.0 mA; VCC = 3.0 V
-
-
0.36
-
0.44
-
0.55
V
IO = 8.0 mA; VCC = 4.5 V
-
-
0.36
-
0.44
-
0.55
V
-
-
0.1
-
1.0
-
2.0
µA
II
input leakage
current
VI = 5.5 V or GND;
VCC = 0 V to 5.5 V
ICC
supply current VI = VCC or GND; IO = 0 A;
VCC = 5.5 V
-
-
1.0
-
10
-
40
µA
CI
input
capacitance
-
1.5
10
-
10
-
10
pF
11. Dynamic characteristics
Table 8.
Dynamic characteristics
GND = 0 V; tr = tf = ≤ 3.0 ns. For test circuit see Figure 6.
Symbol
Parameter
propagation
delay
tpd
25 °C
Conditions
Min
Typ
Max
Min
Max
Min
Max
-
3.4
7.1
1.0
8.5
1.0
10.0
ns
-
4.9
10.6
1.0
12.0
1.0
13.5
ns
CL = 15 pF
-
2.6
5.5
1.0
6.0
1.0
7.0
ns
CL = 50 pF
-
3.6
7.0
1.0
8.0
1.0
9.0
ns
-
14
-
-
-
-
-
pF
A to Y; see Figure 5
VCC = 3.0 V to 3.6 V
[1]
[2]
CL = 15 pF
CL = 50 pF
VCC = 4.5 V to 5.5 V
power
dissipation
capacitance
CPD
[1]
−40 °C to +85 °C −40 °C to +125 °C Unit
per buffer;
VI = GND to VCC
[3]
[4]
tpd is the same as tPLH and tPHL.
[2]
Typical values are measured at VCC = 3.3 V.
[3]
Typical values are measured at VCC = 5.0 V.
[4]
CPD is used to determine the dynamic power dissipation PD (µW).
PD = CPD × VCC2 × fi + ∑ (CL × VCC2 × fo) where:
fi = input frequency in MHz;
74AHC1GU04_5
Product data sheet
© NXP B.V. 2007. All rights reserved.
Rev. 05 — 10 July 2007
4 of 12
74AHC1GU04
NXP Semiconductors
Inverter
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in Volts.
12. Waveforms
VM(1)
A input
VCC
tPHL
tPLH
PULSE
GENERATOR
VI
CL
50 pF
RT
VM(1)
Y output
VO
DUT
mna046
mna034
VM = 0.5 × VCC; VI = GND to VCC.
Test data is given in Table 8.
Definitions for test circuit:
CL = Load capacitance including jig and probe
capacitance.
RT = Termination resistance should be equal to
output impedance Zo of the pulse generator.
Fig 5. The input (A) to output (Y) propagation delay
times
Fig 6. Load circuitry for switching times
13. Typical transfer characteristics
mna397
2.0
VO
(V)
1.6
mna398
1.0
VO
ICC
(mA)
0.8
1.2
0.6
0.8
0.4
3.0
10
VO
ICC
(mA)
VO
(V)
8
6
1.5
4
ID (drain current)
0.4
ID (drain current)
0.2
0
0
0
0.4
0.8
1.2
1.6
2.0
2
0
0
0
1
VI (V)
Fig 7. VCC = 2.0 V; IO = 0 A
VI (V)
3
Fig 8. VCC = 3.0 V; IO = 0 A
74AHC1GU04_5
Product data sheet
2
© NXP B.V. 2007. All rights reserved.
Rev. 05 — 10 July 2007
5 of 12
74AHC1GU04
NXP Semiconductors
Inverter
mna399
6
50
VO
(V)
ICC
(mA)
40
VO
Rbias = 560 kΩ
VCC
30
3
0.47 µF
20
input
output
100 µF
VI
(f = 1 kHz)
ID (drain current)
10
A IO
GND
mna050
0
0
0
2
4
VI (V)
6
Fig 9. VCC = 5.5 V; IO = 0 A
Fig 10. Test set-up for measuring forward
transconductance gfs = ∆IO/∆VI at VO is
constant
mna400
40
gfs
(mA/V)
30
20
10
0
0
2
4
VCC (V)
6
Fig 11. Typical forward transconductance gfs as a function of the supply voltage at Tamb = 25 °C
14. Application information
Some applications are:
• Linear amplifier (see Figure 12)
• In crystal oscillator design (see Figure 13)
Remark: All values given are typical unless otherwise specified.
74AHC1GU04_5
Product data sheet
© NXP B.V. 2007. All rights reserved.
Rev. 05 — 10 July 2007
6 of 12
74AHC1GU04
NXP Semiconductors
Inverter
R2
R1
VCC
1 µF
R2
R1
U04
U04
C1
ZL
C2
out
mna052
mna053
Maximum Vo(p-p) = VCC − 1.5 V centered at
0.5 × VCC.
C1 = 47 pF (typ.)
G ol
G v = – --------------------------------------R1
1 + ------- ( 1 + G ol )
R2
R1 = 1 MΩ to 10 MΩ (typ.)
C2 = 22 pF (typ.)
R2 optimum value depends on the frequency and
required stability against changes in VCC or average
minimum ICC (ICC is typically 2 mA at VCC = 3 V and
f = 1 MHz).
Gol = open loop gain
Gv = voltage gain
R1 ≥ 3 kΩ, R2 ≤ 1 MΩ
ZL > 10 kΩ; Gol = 20 (typ.)
Typical unity gain bandwidth product is 5 MHz.
Fig 12. Used as a linear amplifier
Fig 13. Crystal oscillator configuration
Table 9.
External components for resonator (f < 1 MHz)
All values given are typical and must be used as an initial set-up.
Frequency
R1
R2
C1
C2
10 kHz to 15.9 kHz
22 MΩ
220 kΩ
56 pF
20 pF
16 kHz to 24.9 kHz
22 MΩ
220 kΩ
56 pF
10 pF
25 kHz to 54.9 kHz
22 MΩ
100 kΩ
56 pF
10 pF
55 kHz to 129.9 kHz
22 MΩ
100 kΩ
47 pF
5 pF
130 kHz to 199.9 kHz
22 MΩ
47 kΩ
47 pF
5 pF
200 kHz to 349.9 kHz
22 MΩ
47 kΩ
47 pF
5 pF
350 kHz to 600 kHz
22 MΩ
47 kΩ
47 pF
5 pF
Table 10.
Optimum value for R2
Frequency
R2
Optimum for
3 kHz
2.0 kΩ
minimum required ICC
8.0 kΩ
minimum influence due to change in VCC
1.0 kΩ
minimum required ICC
6 kHz
10 kHz
14 kHz
>14 kHz
4.7 kΩ
minimum influence by VCC
0.5 kΩ
minimum required ICC
2.0 kΩ
minimum influence by VCC
0.5 kΩ
minimum required ICC
1.0 kΩ
minimum influence by VCC
-
replace R2 by C3 with a typical value of 35 pF
74AHC1GU04_5
Product data sheet
© NXP B.V. 2007. All rights reserved.
Rev. 05 — 10 July 2007
7 of 12
74AHC1GU04
NXP Semiconductors
Inverter
15. Package outline
TSSOP5: plastic thin shrink small outline package; 5 leads; body width 1.25 mm
E
D
SOT353-1
A
X
c
y
HE
v M A
Z
5
4
A2
A
(A3)
A1
θ
1
Lp
3
L
e
w M
bp
detail X
e1
0
1.5
3 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
D(1)
E(1)
e
e1
HE
L
Lp
v
w
y
Z(1)
θ
mm
1.1
0.1
0
1.0
0.8
0.15
0.30
0.15
0.25
0.08
2.25
1.85
1.35
1.15
0.65
1.3
2.25
2.0
0.425
0.46
0.21
0.3
0.1
0.1
0.60
0.15
7°
0°
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
OUTLINE
VERSION
SOT353-1
REFERENCES
IEC
JEDEC
JEITA
MO-203
SC-88A
EUROPEAN
PROJECTION
ISSUE DATE
00-09-01
03-02-19
Fig 14. Package outline SOT353-1 (TSSOP5)
74AHC1GU04_5
Product data sheet
© NXP B.V. 2007. All rights reserved.
Rev. 05 — 10 July 2007
8 of 12
74AHC1GU04
NXP Semiconductors
Inverter
Plastic surface-mounted package; 5 leads
SOT753
D
E
B
y
A
X
HE
5
v M A
4
Q
A
A1
c
1
2
3
Lp
detail X
bp
e
w M B
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
A1
bp
c
D
E
e
HE
Lp
Q
v
w
y
mm
1.1
0.9
0.100
0.013
0.40
0.25
0.26
0.10
3.1
2.7
1.7
1.3
0.95
3.0
2.5
0.6
0.2
0.33
0.23
0.2
0.2
0.1
OUTLINE
VERSION
REFERENCES
IEC
JEDEC
SOT753
JEITA
SC-74A
EUROPEAN
PROJECTION
ISSUE DATE
02-04-16
06-03-16
Fig 15. Package outline SOT753 (SC-74A)
74AHC1GU04_5
Product data sheet
© NXP B.V. 2007. All rights reserved.
Rev. 05 — 10 July 2007
9 of 12
74AHC1GU04
NXP Semiconductors
Inverter
16. Abbreviations
Table 11.
Abbreviations
Acronym
Description
CDM
Charged Device Model
DUT
Device Under Test
ESD
ElectroStatic Discharge
HBM
Human Body Model
MM
Machine Model
17. Revision history
Table 12.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
74AHC1GU04_5
20070710
Product data sheet
-
74AHC1GU04_4
Modifications:
•
The format of this data sheet has been redesigned to comply with the new identity
guidelines of NXP Semiconductors.
•
•
•
Legal texts have been adapted to the new company name where appropriate.
Package SOT353 changed to SOT353-1 in Section 3 and Section 15.
Quick reference data and Soldering sections removed.
74AHC1GU04_4
20020528
Product specification
-
74AHC1GU04_3
74AHC1GU04_3
20020215
Product specification
-
74AHC1GU04_2
74AHC1GU04_2
20010427
Product specification
-
74AHC1GU04_1
74AHC1GU04_1
19990519
Product specification
-
-
74AHC1GU04_5
Product data sheet
© NXP B.V. 2007. All rights reserved.
Rev. 05 — 10 July 2007
10 of 12
74AHC1GU04
NXP Semiconductors
Inverter
18. Legal information
18.1 Data sheet status
Document status[1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
The term ‘short data sheet’ is explained in section “Definitions”.
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
18.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
18.3 Disclaimers
General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of a NXP Semiconductors product can reasonably be expected to
result in personal injury, death or severe property or environmental damage.
NXP Semiconductors accepts no liability for inclusion and/or use of NXP
Semiconductors products in such equipment or applications and therefore
such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Terms and conditions of sale — NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.nxp.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
18.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
19. Contact information
For additional information, please visit: http://www.nxp.com
For sales office addresses, send an email to: [email protected]
74AHC1GU04_5
Product data sheet
© NXP B.V. 2007. All rights reserved.
Rev. 05 — 10 July 2007
11 of 12
74AHC1GU04
NXP Semiconductors
Inverter
20. Contents
1
2
3
4
5
6
6.1
6.2
7
8
9
10
11
12
13
14
15
16
17
18
18.1
18.2
18.3
18.4
19
20
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Ordering information . . . . . . . . . . . . . . . . . . . . . 1
Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
Pinning information . . . . . . . . . . . . . . . . . . . . . . 2
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 2
Functional description . . . . . . . . . . . . . . . . . . . 2
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3
Recommended operating conditions. . . . . . . . 3
Static characteristics. . . . . . . . . . . . . . . . . . . . . 3
Dynamic characteristics . . . . . . . . . . . . . . . . . . 4
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Typical transfer characteristics . . . . . . . . . . . . 5
Application information. . . . . . . . . . . . . . . . . . . 6
Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 8
Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Revision history . . . . . . . . . . . . . . . . . . . . . . . . 10
Legal information. . . . . . . . . . . . . . . . . . . . . . . 11
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 11
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Contact information. . . . . . . . . . . . . . . . . . . . . 11
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2007.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: 10 July 2007
Document identifier: 74AHC1GU04_5