PHILIPS 74LV257

INTEGRATED CIRCUITS
74LV257
Quad 2-input multiplexer (3-State)
Product specification
Supersedes data of 1997 Jun 06
IC24 Data Handbook
1998 May 20
Philips Semiconductors
Product specification
Quad 2-input multiplexer (3-State)
74LV257
FEATURES
DESCRIPTION
• Optimized for low voltage applications: 1.0 to 3.6 V
• Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V
• Typical VOLP (output ground bounce) < 0.8 V at VCC = 3.3 V,
The 74LV257 is a low-voltage Si-gate CMOS device and is pin and
function compatible with 74HC/HCT257.
The 74LV257 is a quad 2-input multiplexer with 3-state outputs, which
select 4 bits of data from two sources and are controlled by a common
data select input (S). The data inputs from source 0 (1l0 to 4l0) are
selected when input S is LOW and the data inputs from source 1 (1l1
to 4l1) are selected when S in HIGH. Data appears at the outputs (1Y
to 4Y) in true (non-inverting) from the selected inputs. The 74LV257 is
the logic implementation of a 4-pole, 2-position switch, where the
position of the switch is determined by the logic levels applied to S.
The outputs are forced to a high impedance OFF-state when OE is
HIGH.
Tamb = 25°C
• Typical VOHV (output VOH undershoot) > 2 V at VCC = 3.3 V,
Tamb = 25°C
• Non-inverting data path
• Output capability: bus driver
• ICC category: MSI
The logic equations for the outputs are:
1Y = OE × (1l1 × S + 1l0 × S)
2Y = OE × (2l1 × S + 2l0 × S)
3Y = OE × (3l1 × S + 3l0 × S)
4Y = OE × (4l1 × S + 4l0 × S)
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25°C; tr = tf ≤ 2.5 ns
PARAMETER
SYMBOL
tPHL/tPLH
Propagation delay
nl0, nl1 to nY
S to nY
CI
Input capacitance
CPD
CONDITIONS
CL = 15 pF;
VCC = 3.3 V
Power dissipation capacitance per gate
VI = GND to VCC
1
TYPICAL
UNIT
10
14
ns
3.5
pF
30
pF
NOTE:
1. CPD is used to determine the dynamic power dissipation (PD in µW)
PD = CPD × VCC2 × fi (CL × VCC2 × fo) where:
fi = input frequency in MHz; CL = output load capacitance in pF;
fo = output frequency in MHz; VCC = supply voltage in V;
(CL × VCC2 × fo) = sum of the outputs.
ORDERING INFORMATION
TEMPERATURE RANGE
OUTSIDE NORTH AMERICA
NORTH AMERICA
PKG. DWG. #
16-Pin Plastic DIL
PACKAGES
–40°C to +125°C
74LV257 N
74LV257 N
SOT38-4
16-Pin Plastic SO
–40°C to +125°C
74LV257 D
74LV257 D
SOT109-1
16-Pin Plastic SSOP Type II
–40°C to +125°C
74LV257 DB
74LV257 DB
SOT338-1
16-Pin Plastic TSSOP Type I
–40°C to +125°C
74LV257 PW
74LV257PW DH
SOT403-1
PIN CONFIGURATION
PIN DESCRIPTION
S
1
16
VCC
1I0
2
15
OE
1I1
3
14
4l0
IY
4
13
4l1
2l0
5
12
4Y
2l1
6
11
3l0
2Y
7
10
3l1
GND
8
9
3Y
PIN
NUMBER
SYMBOL
FUNCTION
1
S
Common data select input
2, 5, 11, 14
1l0 to 4l0
Data inputs from source 0
3, 6, 10, 13
1l1 to 4l1
Data inputs from source 1
4, 7, 9, 12
1Y to 4Y
3-state multiplexer outputs
8
GND
Ground (0 V)
15
OE
3-State output enable input
(active LOW)
16
VCC
Positive supply voltage
SV00636
1998 May 20
2
853-1985 19420
Philips Semiconductors
Product specification
Quad 2-input multiplexer (3-State)
74LV257
LOGIC SYMBOL
FUNCTIONAL DIAGRAM
2
3
5
6
11
10 14
13
1I0 11I 2I0 2I1 3I0 3I1 4I0 4I1
2
1I0
3
1I1
1
S
5
2I0
15
OE
6
2I1
1Y 2Y 3Y 4Y
4
7
9
12
SV00637
11
3I0
10
3I1
14
4I0
13
4I1
1Y
4
2Y
7
3Y
9
4Y
12
3–STATE
MULTIPLEXER
OUTPUTS
SELECTOR
LOGIC SYMBOL (IEEE/IEC)
1
15
S
OE
1
15
G1
SV00639
EN
FUNCTION TABLE
2
1
INPUTS
MUX
4
3
1
5
7
6
11
9
10
12
13
SV00638
LOGIC DIAGRAM
1Y
1I0
2I1
2Y
2I0
3I1
3Y
3I0
4I1
4Y
4I0
OE
S
SV00640
1998 May 20
OE
S
nl0
nl1
nY
H
X
X
X
Z
L
L
L
L
H
H
L
L
X
X
L
H
L
H
X
X
L
H
L
H
NOTES:
H = HIGH voltage level
L = LOW voltage level
X = don’t care
Z = high impedance OFF-state
14
1I1
OUTPUTS
3
Philips Semiconductors
Product specification
Quad 2-input multiplexer (3-State)
74LV257
RECOMMENDED OPERATING CONDITIONS
SYMBOL
VCC
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNIT
See Note 1
1.0
3.3
3.6
V
DC supply voltage
VI
Input voltage
0
–
VCC
V
VO
Output voltage
0
–
VCC
V
+85
+125
°C
500
200
100
ns/V
Tamb
Operating ambient temperature range in free air
tr, tf
Input rise and fall times
See DC and AC
characteristics
–40
–40
VCC = 1.0V to 2.0V
VCC = 2.0V to 2.7V
VCC = 2.7V to 3.6V
–
–
–
–
–
–
NOTE:
1. The LV is guaranteed to function down to VCC = 1.0V (input levels GND or VCC); DC characteristics are guaranteed from VCC = 1.2V to VCC =3.6V.
ABSOLUTE MAXIMUM RATINGS1, 2
In accordance with the Absolute Maximum Rating System (IEC 134).
Voltages are referenced to GND (ground = 0 V).
SYMBOL
PARAMETER
CONDITIONS
RATING
UNIT
–0.5 to +4.6
V
VCC
DC supply voltage
IIK
DC input diode current
VI < –0.5 or VI > VCC + 0.5V
20
mA
IOK
DC output diode current
VO < –0.5 or VO > VCC + 0.5V
50
mA
IO
DC output source or sink current
– bus driver outputs
–0.5V < VO < VCC + 0.5V
35
mA
70
mA
–65 to +150
°C
IGND,
ICC
Tstg
PTOT
DC VCC or GND current for types with
– bus driver outputs
Storage temperature range
Power dissipation per package
– plastic DIL
– plastic mini-pack (SO)
– plastic shrink mini-pack (SSOP and TSSOP)
for temperature range: –40 to +125°C
above +70°C derate linearly with 12 mW/K
above +70°C derate linearly with 8 mW/K
above +60°C derate linearly with 5.5 mW/K
750
500
400
mW
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
1998 May 20
4
Philips Semiconductors
Product specification
Quad 2-input multiplexer (3-State)
74LV257
DC ELECTRICAL CHARACTERISTICS
Over recommended operating conditions. Voltages are referenced to GND (ground = 0 V).
LIMITS
SYMBOL
PARAMETER
-40°C to +85°C
TEST CONDITIONS
MIN
HIGH level
l
l Input
I
t
voltage
VIH
LOW level
l
l Input
I
t
voltage
VIL
TYP1
VOH
HIGH level output
voltage; BUS driver
outputs
MIN
0.9
0.9
VCC = 2.0 V
1.4
1.4
VCC = 2.7 to 3.6 V
2.0
UNIT
MAX
V
2.0
VCC = 1.2 V
0.3
0.3
VCC = 2.0 V
0.6
0.6
0.8
0.8
VCC = 1.2 V; VI = VIH or VIL; –IO = 100µA
HIGH level output
voltage; all outputs
MAX
VCC = 1.2 V
VCC = 2.7 to 3.6 V
VOH
O
-40°C to +125°C
V
1.2
VCC = 2.0 V; VI = VIH or VIL; –IO = 100µA
1.8
2.0
1.8
VCC = 2.7 V; VI = VIH or VIL; –IO = 100µA
2.5
2.7
2.5
VCC = 3.0 V; VI = VIH or VIL; –IO = 100µA
2.8
3.0
2.8
VCC = 3.0 V; VI = VIH or VIL; –IO = 8mA
2.40
2.82
2.20
V
V
VCC = 1.2 V; VI = VIH or VIL; IO = 100µA
0
VCC = 2.0 V; VI = VIH or VIL; IO = 100µA
0
0.2
0.2
VCC = 2.7 V; VI = VIH or VIL; IO = 100µA
0
0.2
0.2
VCC = 3.0 V; VI = VIH or VIL; IO = 100µA
0
0.2
0.2
0.20
0.40
0.50
V
1.0
1.0
µA
5
10
µA
VOL
O
LOW level output
voltage; all outputs
VOL
LOW level output
voltage; BUS driver
outputs
VCC = 3.0 V; VI = VIH or VIL; IO = 8mA
Input leakage
current
VCC = 3.6 V; VI = VCC or GND
IOZ
3-State output
OFF-state current
VCC = 3.6 V; VI = VIH or VIL;
VO = VCC or GND
ICC
Quiescent supply
current; MSI
VCC = 3.6 V; VI = VCC or GND; IO = 0
20.0
160
µA
∆ICC
Additional
quiescent supply
current per input
VCC = 2.7 V to 3.6 V; VI = VCC – 0.6 V
500
850
µA
II
NOTE:
1. All typical values are measured at Tamb = 25°C.
1998 May 20
5
V
Philips Semiconductors
Product specification
Quad 2-input multiplexer (3-State)
74LV257
AC CHARACTERISTICS
GND = 0V; tr = tf ≤ 2.5ns; CL = 50pF; RL = 1KΩ
SYMBOL
PARAMETER
WAVEFORM
LIMITS
CONDITION
–40 to +85 °C
VCC(V)
Propagation delay
nl0 to nY
nl1 to nY
tPHL//tPLH
Propagation
g
delay
y
S to nY
tPHL/tPLH
3-State output enable time
OE to nY
tPZH/tPZL
3-State output disable time
OE to nY
tPHZ//tPLZ
MIN
TYP1
–40 to +125 °C
MAX
MIN
MAX
1.2
65
2.0
22
43
51
2.7
16
31
38
3.0 to 3.6
122
25
30
1.2
85
2.0
29
56
66
2.7
21
41
49
3.0 to 3.6
162
33
39
1.2
60
2.0
20
39
46
2.7
15
29
34
3.0 to 3.6
112
23
27
1.2
65
2.0
24
40
49
2.7
18
32
37
3.0 to 3.6
142
26
30
Figure 1
Figure 1
Figure 2
Figure 2
UNIT
ns
ns
ns
ns
NOTES:
1. Unless otherwise stated, all typical values are measured at Tamb = 25°C
2. Typical values are measured at VCC = 3.3 V.
AC WAVEFORMS
VM = 0.5 × VCC at VCC < 2.7 V
VM = 1.5 V at VCC ≥ 2.7 V
VX = VOL + 0.3 V at VCC ≥ 2.7 V
VX = VOL + 0.1 × VCC at VCC < 2.7 V
VY = VOH – 0.3 V at VCC ≥ 2.7V
VY = VOH – 0.1 × VCC at VCC < 2.7 V
VOL and VOH are the typical output voltage drop that occur with the
output load.
VI
OE INPUT
OUTPUT
LOW-to-OFF
OFF-to-LOW
VOL
VOH
tPHL
tPLH
VM
outputs
enabled
VM
outputs
disabled
outputs
enabled
SV00642
SV00641
Figure 2. 3-State enable and disable times.
Figure 1. Input (S, nl0, nl1) to output (nY) propagation delays.
1998 May 20
tPZH
VY
OUTPUT
HIGH-to-OFF
OFF-to-HIGH
GND
VOH
VOL
VM
VX
tPHZ
VM
GND
nY OUTPUT
tPZL
tPLZ
VCC
VCC
S, nI0, nI1
INPUTS
VM
GND
6
Philips Semiconductors
Product specification
Quad 2-input multiplexer (3-State)
74LV257
TEST CIRCUIT
VCC
VO
VI
PULSE
GENERATOR
D.U.T.
50pF
RT
CL
RL= 1KΩ
Test Circuit for switching times
DEFINITIONS
RT = Termination resistance should be equal to ZOUT of pulse generators.
RL = Load resistor
CL = Load capacitance includes jig and probe capacitance
TEST
tPLH/tPHL
VCC
VI
< 2.7V
VCC
2.7–3.6V
2.7V
SV00776
Figure 3. Load circuitry for switching times.
1998 May 20
7
Philips Semiconductors
Product specification
Quad 2-input multiplexer (3-State)
74LV257
DIP14: plastic dual in-line package; 14 leads (300 mil)
1998 May 20
8
SOT27-1
Philips Semiconductors
Product specification
Quad 2-input multiplexer (3-State)
74LV257
SO14: plastic small outline package; 14 leads; body width 3.9 mm
1998 May 20
9
SOT108-1
Philips Semiconductors
Product specification
Quad 2-input multiplexer (3-State)
74LV257
SSOP14: plastic shrink small outline package; 14 leads; body width 5.3 mm
1998 May 20
10
SOT337-1
Philips Semiconductors
Product specification
Quad 2-input multiplexer (3-State)
74LV257
TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm
1998 May 20
11
SOT402-1
Philips Semiconductors
Product specification
Quad 2-input multiplexer (3-State)
74LV257
DEFINITIONS
Data Sheet Identification
Product Status
Definition
Objective Specification
Formative or in Design
This data sheet contains the design target or goal specifications for product development. Specifications
may change in any manner without notice.
Preliminary Specification
Preproduction Product
This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips
Semiconductors reserves the right to make changes at any time without notice in order to improve design
and supply the best possible product.
Product Specification
Full Production
This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes
at any time without notice, in order to improve design and supply the best possible product.
Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products,
including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright,
or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes
only. Philips Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing
or modification.
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Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices,
or systems where malfunction of a Philips Semiconductors and Philips Electronics North America Corporation Product can reasonably be expected
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 Copyright Philips Electronics North America Corporation 1998
All rights reserved. Printed in U.S.A.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Sunnyvale, California 94088–3409
Telephone 800-234-7381
print code
Document order number:
1998 May 20
12
Date of release: 05-96
9397-750-04441