QSG ADC1x13D+ECP3 DB Quick Start Guide ADC1x13D + ECP3 demo board Rev. 1.2 — January 2011 Quick Start Guide Document information Info Content Keywords ADC1413D, ECP3 FPGA Abstract NXP has designed a USB powered demo board, to demonstrate the interoperability of Lattice ECP3 FPGAs with NXP ADC over the JESD204A serial interface. This document describes the basic steps to operate this board driven by a Personal Computer. QSG ADC1x13D+ECP3 DB NXP Semiconductors Quick Start Guide ADC1x13D + ECP3 demo board Revision history Rev Date Description 1.2 20110111 Update with new software release 1.1 20100616 Minor modifications (on SW especially) 1.0 20100419 Draft version Contact information For additional information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] <DOC_ID> Quick Start Guide All information provided in this document is subject to legal disclaimers. Rev. 1.2 — January 2011 © NXP B.V. 2011. All rights reserved. 2 of 17 QSG ADC1x13D+ECP3 DB NXP Semiconductors Quick Start Guide ADC1x13D + ECP3 demo board 1. Introduction 1.1 Demoboard overview: Fig 1. DemoBoard top view NXP has designed a USB powered demo board to demonstrate the interoperability of Lattice ECP3 FPGAs with NXP ADC over the JESD204A serial interface. A single USB cable will allow to supply the board and to communicate with the FPGA & the ADC thanks to dedicated software running on a PC. It is then possible to load the data from the ADC through the FPGA and have an overview of the ADC features and performance, in the frequency range of [0; 30]MHz. By default an on-board oscillator is used to generate the sampling frequency, but it is optionally possible to use an external clock to have more flexibility and a better jitter performance. See Chapter 0 “5.Using an external clock reference”. <DOC_ID> Quick Start Guide All information provided in this document is subject to legal disclaimers. Rev. 1.2 — January 2011 © NXP B.V. 2011. All rights reserved. 3 of 17 QSG ADC1x13D+ECP3 DB NXP Semiconductors Quick Start Guide ADC1x13D + ECP3 demo board 1.2 Typical demonstration set-up Fig 2. Picture of a typical demo set-up The list of equipment needed is as follows: A PC A USB cable A low jitter sine wave generator A band-pass filter in case the sine wave is not pure enough 2 SMA-SMA cables if a filter is used, 1 cable if no filter The NXP demo board In addition, dedicated software is necessary to drive the FPGA & the ADC from the PC. This software has been developed thanks to LabView, which means that at least the LabView Runtime needs to be installed on the Laptop PC or the LabView environment itself (v8.5). These software tools are delivered by NXP either on a CD-ROM or through an internetbased remote server. !! Warning!! Please read carefully the following instructions before you start plugging the demo board to the PC. It is especially necessary that you have the CD-ROM ready to install the USB driver when you first plug the demo board to the PC. <DOC_ID> Quick Start Guide All information provided in this document is subject to legal disclaimers. Rev. 1.2 — January 2011 © NXP B.V. 2011. All rights reserved. 4 of 17 QSG ADC1x13D+ECP3 DB NXP Semiconductors Quick Start Guide ADC1x13D + ECP3 demo board 2. Installing the software tools 2.1 LabView 8.6.1 Run-time environment: Use the NXP CD-ROM to access the “LVRTE861STD.exe” file: open the folder named “LabView_Runtime_v8.6” and double click on the .exe file in order to install the LabView Runtime program. 2.2 USB drivers: 2.2.1 Step 1: Connect the device to a USB port on your PC. Windows ‘Found New Hardware Wizard’ will be launched. Select ‘No, not this time’ from the options available and then click ‘Next’ to proceed with the installation. Fig 3. New Hardware Wizard starting page 2.2.2 Step 2: Select ‘Install from a list or specific location (Advanced)’ as shown below and then click ‘Next’. <DOC_ID> Quick Start Guide All information provided in this document is subject to legal disclaimers. Rev. 1.2 — January 2011 © NXP B.V. 2011. All rights reserved. 5 of 17 QSG ADC1x13D+ECP3 DB NXP Semiconductors Quick Start Guide ADC1x13D + ECP3 demo board Fig 4. New Hardware Wizard: configure 2.2.3 Step 3: Select ‘Search for the best driver in these locations’ and enter the file path of the folder : \USB Driver \driver_d2xx’ in the combo-box or browse to it by clicking the browse button. Once the file path has been entered in the box, click ‘next’ to proceed. D:\ USB_Driver\driver_d2xx Fig 5. New Hardware Wizard: select driver location <DOC_ID> Quick Start Guide All information provided in this document is subject to legal disclaimers. Rev. 1.2 — January 2011 © NXP B.V. 2011. All rights reserved. 6 of 17 QSG ADC1x13D+ECP3 DB NXP Semiconductors Quick Start Guide ADC1x13D + ECP3 demo board 2.2.4 Step 4: Windows should then display a message indicating that the installation was successful. Click ‘Finish’ to complete the installation for the first port of the device. Fig 6. New Hardware Wizard: completion 2.3 NXP ADC: Run application Using again the CD-ROM delivered by NXP, open now the folder “NXP_ADC_ECP3_v1.0”, then run “NXP_ADC_ECP3_v1.0.exe”. <DOC_ID> Quick Start Guide All information provided in this document is subject to legal disclaimers. Rev. 1.2 — January 2011 © NXP B.V. 2011. All rights reserved. 7 of 17 QSG ADC1x13D+ECP3 DB NXP Semiconductors Quick Start Guide ADC1x13D + ECP3 demo board 3. Demo set-up connection 3.1 Connection diagram: You are now ready to complete the demo set up connection. Please follow the connections diagram as defined below: Fig 7. Demo set-up connection diagram Looking at the demo board, the LED status should be as follow: Fig 8. LEDs status at power-up <DOC_ID> Quick Start Guide All information provided in this document is subject to legal disclaimers. Rev. 1.2 — January 2011 © NXP B.V. 2011. All rights reserved. 8 of 17 QSG ADC1x13D+ECP3 DB NXP Semiconductors Quick Start Guide ADC1x13D + ECP3 demo board 4. ADC application user guide 4.1 Front panel: First, launch the NXP_ADC_ECP3_v1.0.exe file from a file explorer (see §2.3). You now get the following front panel: Fig 9. ADC_Run front panel Looking at the demo board, the LED status should now indicate that the JESD204A link is alive and aligned: Fig 10. LEDs status: JESD04A link aligned <DOC_ID> Quick Start Guide All information provided in this document is subject to legal disclaimers. Rev. 1.2 — January 2011 © NXP B.V. 2011. All rights reserved. 9 of 17 NXP Semiconductors QSG ADC1x13D+ECP3 DB Quick Start Guide ADC1x13D + ECP3 demo board If you did not achieve this LED status, please start again from chapter 3, after you unplugged/plugged the USB cable. If you successfully reached this LED status, from now on it will remain the same, whatever the data acquisition/analysis you perform. 4.2 Data acquisition/analysis: Assuming that the demo board receives an input signal, you are now ready to acquire data and analyze them to experience the ADC performance. We kindly remind you that the first focus of this demo board is to demonstrate the interoperability between the Lattice FPGA & the NXP ADC1x13D high speed converter. It has not been optimized to demonstrate the full range of capabilities of the ADC. It is in particular limited to the 1rst Nyquist band, so for input frequencies between 0Hz and half the sampling frequency (FS). On this demo board, the sampling frequency is by default defined by an on-board oscillator, which generates FS = 60Mhz. So you can input a sine wave between 0Hz and 30MHz. Although the ADC1x13D080 datasheet mentions 65Mhz as the minimum frequency, we have decided to use a 60Mhz oscillator since the Abracon ASE oscillator has a very good jitter compared to other oscillators but it is unfortunately not easily available for an output frequency higher than 60Mhz. It is then possible to demonstrate good SNR performance (in the range of 72dB) over the [0;30]MHz band. <DOC_ID> Quick Start Guide All information provided in this document is subject to legal disclaimers. Rev. 1.2 — January 2011 © NXP B.V. 2011. All rights reserved. 10 of 17 QSG ADC1x13D+ECP3 DB NXP Semiconductors Quick Start Guide ADC1x13D + ECP3 demo board 4.2.1 Software features: The following figure shows the ADC tab features: Display update rate Autoscale display Select windowing function Fig 11. FFT <DOC_ID> Quick Start Guide All information provided in this document is subject to legal disclaimers. Rev. 1.2 — January 2011 © NXP B.V. 2011. All rights reserved. 11 of 17 NXP Semiconductors QSG ADC1x13D+ECP3 DB Quick Start Guide ADC1x13D + ECP3 demo board Display update rate Autoscale display Fig 12. Time domain <DOC_ID> Quick Start Guide All information provided in this document is subject to legal disclaimers. Rev. 1.2 — January 2011 © NXP B.V. 2011. All rights reserved. 12 of 17 QSG ADC1x13D+ECP3 DB NXP Semiconductors Quick Start Guide ADC1x13D + ECP3 demo board 5. Using an external clock reference 5.1 Configuring the board: On the back side of the PCB, a shunt resistor needs to be moved before you can supply an external clock source to the board. See the next picture: Fig 13. Demo Board configuration for an external clock Once the resistor is placed on the right foot print, you can plug your clock generator to the demonstration board. 5.2 New demo set-up: In addition to the already used sine wave generator, you now also need to use a low-jitter generator (below 1ps RMS) to supply the clock to the demo board. According to the ADC1x13D080 datasheet, the clock range is: 65Mhz up to 80Mhz. In order to assess the SFDR performance, it is necessary to apply an input signal and a clock signal which are synchronized and which have an appropriate ratio so that you get an integer number of periods of the input signal over the 8192 samples captured inside the FPGA SRAM. So, you also need to synchronize the 2 generators so that they use the same time base. Please refer to the generators user manuals. So, we now end up with the following demo set-up: <DOC_ID> Quick Start Guide All information provided in this document is subject to legal disclaimers. Rev. 1.2 — January 2011 © NXP B.V. 2011. All rights reserved. 13 of 17 QSG ADC1x13D+ECP3 DB NXP Semiconductors Quick Start Guide ADC1x13D + ECP3 demo board Fig 14. Demo set-up using an external clock <DOC_ID> Quick Start Guide All information provided in this document is subject to legal disclaimers. Rev. 1.2 — January 2011 © NXP B.V. 2011. All rights reserved. 14 of 17 QSG ADC1x13D+ECP3 DB NXP Semiconductors Quick Start Guide ADC1x13D + ECP3 demo board 6. Legal information NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. 6.1 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. 6.2 Disclaimers Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of a NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of <DOC_ID> Quick Start Guide Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on a weakness or default in the customer application/use or the application/use of customer’s third party customer(s) (hereinafter both referred to as “Application”). It is customer’s sole responsibility to check whether the NXP Semiconductors product is suitable and fit for the Application planned. Customer has to do all necessary testing for the Application in order to avoid a default of the Application and the product. NXP Semiconductors does not accept any liability in this respect. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. 6.3 Licenses Purchase of NXP <xxx> components <License statement text> 6.4 Patents Notice is herewith given that the subject device uses one or more of the following patents and that each of these patents may have corresponding patents in other jurisdictions. <Patent ID> — owned by <Company name> 6.5 Trademarks Notice: All referenced brands, product names, service names and trademarks are property of their respective owners. <Name> — is a trademark of NXP B.V. All information provided in this document is subject to legal disclaimers. Rev. 1.2 — January 2011 © NXP B.V. 2011. All rights reserved. 15 of 17 QSG ADC1x13D+ECP3 DB NXP Semiconductors Quick Start Guide ADC1x13D + ECP3 demo board 7. List of figures Fig 1. Fig 2. Fig 3. Fig 4. Fig 5. Fig 6. Fig 7. Fig 8. Fig 9. Fig 10. Fig 11. Fig 12. Fig 13. Fig 14. DemoBoard top view......................................... 3 Picture of a typical demo set-up ........................ 4 New Hardware Wizard starting page ................ 5 New Hardware Wizard: configure ..................... 6 New Hardware Wizard: select driver location.... 6 New Hardware Wizard: completion ................... 7 Demo set-up connection diagram ..................... 8 LEDs status at power-up ................................... 8 ADC_Run front panel ........................................ 9 LEDs status: JESD04A link aligned .................. 9 FFT ................................................................. 11 Time domain ................................................... 12 Demo Board configuration for an external clock ........................................................................ 13 Demo set-up using an external clock .............. 14 <DOC_ID> Quick Start Guide All information provided in this document is subject to legal disclaimers. Rev. 1.2 — January 2011 © NXP B.V. 2011. All rights reserved. 16 of 17 NXP Semiconductors QSG ADC1x13D+ECP3 DB Quick Start Guide ADC1x13D + ECP3 demo board 8. Contents 1. 1.1 1.2 2. 2.1 2.2 2.2.1 2.2.2 2.2.3 2.2.4 2.3 3. 3.1 4. 4.1 4.2 4.2.1 5. 5.1 5.2 6. 6.1 6.2 6.3 6.4 6.5 7. 8. Introduction ......................................................... 3 Demoboard overview: ........................................ 3 Typical demonstration set-up ............................. 4 Installing the software tools ............................... 5 LabView 8.6.1 Run-time environment: ............... 5 USB drivers: ....................................................... 5 Step 1:................................................................ 5 Step 2:................................................................ 5 Step 3:................................................................ 6 Step 4:................................................................ 7 NXP ADC: Run application................................. 7 Demo set-up connection..................................... 8 Connection diagram: .......................................... 8 ADC application user guide................................ 9 Front panel: ........................................................ 9 Data acquisition/analysis: ................................. 10 Software features: ............................................ 11 Using an external clock reference ................... 13 Configuring the board:...................................... 13 New demo set-up: ............................................ 13 Legal information .............................................. 15 Definitions ........................................................ 15 Disclaimers....................................................... 15 Licenses ........................................................... 15 Patents ............................................................. 15 Trademarks ...................................................... 15 List of figures..................................................... 16 Contents ............................................................. 17 Please be aware that important notices concerning this document and the product(s) described herein, have been included in the section 'Legal information'. © NXP B.V. 2011. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: January 2011 Document identifier: <DOC_ID>