PHE13005X Silicon diffused power transistor Rev. 02 — 20 November 2009 Product data sheet 1. Product profile 1.1 General description High-voltage, high-speed planar-passivated, NPN power switching transistor in a full pack plastic package for use in high frequency electronic lighting ballast applications 1.2 Features and benefits Fast switching Isolated package High voltage capability of 700 V Low thermal resistance 1.3 Applications Electronic lighting ballasts 1.4 Quick reference data Table 1. Quick reference Conditions Min Typ Max Unit IC Symbol Parameter collector current DC; see Figure 3, 1 and 2 - - 4 A Ptot total power dissipation Th ≤ 25 °C; see Figure 4 - - 26 W VCESM collector-emitter peak voltage VBE = 0 V - - 700 V IC = 1 A; VCE = 5 V; Th = 25 °C; see Figure 11 12 20 40 VCE = 5 V; IC = 2 A; Th = 25 °C; see Figure 11 10 17 28 Static characteristics hFE DC current gain PHE13005X NXP Semiconductors Silicon diffused power transistor 2. Pinning information Table 2. Pinning information Pin Symbol Description 1 B base 2 C collector 3 E emitter mb n.c. isolated Simplified outline Graphic symbol mb C B E sym123 1 2 3 SOT186A (TO-220F) 3. Ordering information Table 3. Ordering information Type number PHE13005X Package Name Description Version TO-220F plastic single-ended package; isolated heatsink mounted; 1 mounting hole; 3-lead TO-220 "full pack" SOT186A PHE13005X_2 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 02 — 20 November 2009 2 of 13 PHE13005X NXP Semiconductors Silicon diffused power transistor 4. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit VCESM collector-emitter peak voltage VBE = 0 V - 700 V VCBO collector-base voltage IE = 0 A - 700 V VCEO collector-emitter voltage IB = 0 A - 400 V IC collector current DC; see Figure 3, 1 and 2 - 4 A ICM peak collector current - 8 A IB base current - 2 A IBM peak base current - 4 A Th ≤ 25 °C; see Figure 4 Ptot total power dissipation - 26 W Tstg storage temperature -65 150 °C Tj junction temperature - 150 °C 001aaf009 8 IC (A) 6 VCC LC VBE = −5V VCL(CE) probe point 4 IBon VBB 2 LB DUT 001aab999 0 0 Fig 1. 200 400 600 800 VCL(CE) (V) Reverse bias safe operating area Fig 2. Test circuit for reverse bias safe operating area PHE13005X_2 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 02 — 20 November 2009 3 of 13 PHE13005X NXP Semiconductors Silicon diffused power transistor 001aai071 102 IC (A) duty cycle = 0.01 10 ICM(max) IC(max) (4) (1) 1 (2) 10−1 tp = 20 μs 50 μs 100 μs 200 μs 500 μs DC (3) 10−2 (5) 10−3 1 102 10 103 VCL(CE) (V) Fig 3. Forward bias safe operating area 03aa13 120 Pder (%) 80 40 0 0 50 100 150 200 Th (°C) Fig 4. Normalized total power dissipation as a function of heatsink temperature PHE13005X_2 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 02 — 20 November 2009 4 of 13 PHE13005X NXP Semiconductors Silicon diffused power transistor 5. Thermal characteristics Table 5. Thermal characteristics Symbol Parameter Rth(j-h) Rth(j-a) Conditions Min Typ Max Unit thermal resistance from with heatsink compound; see Figure 5 junction to heatsink - - 4.8 K/W thermal resistance from junction to ambient - 55 - K/W 001aag169 10 Zth(j-h) (K/W) 1 10−1 10−2 δ = 0.5 0.2 0.1 0.05 0.02 δ= P 0 t tp 10−3 10−6 10−5 10−4 10−3 10−2 10−1 Fig 5. tp 1/f 1/f 1 10 102 tp (s) Transient thermal impedance from junction to heatsink as a function of pulse duration PHE13005X_2 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 02 — 20 November 2009 5 of 13 PHE13005X NXP Semiconductors Silicon diffused power transistor 6. Characteristics Table 6. Symbol Characteristics Parameter Conditions Min Typ Max Unit Static characteristics ICES collector-emitter cut-off VBE = 0 V; VCE = 700 V; Tj = 25 °C current VBE = 0 V; VCE = 700 V; Tj = 100 °C - - 1 mA - - 5 mA ICBO collector-base cut-off current VCB = 700 V; IE = 0 A; Th = 25 °C - - 1 mA ICEO collector-emitter cut-off VCE = 400 V; IB = 0 A; Th = 25 °C current - - 0.1 mA IEBO emitter-base cut-off current VEB = 9 V; IC = 0 A; Th = 25 °C - - 1 mA VCEOsus collector-emitter sustaining voltage IB = 0 A; IC = 10 mA; LC = 25 mH; Th = 25 °C; see Figure 6 and 7 400 - - V VCEsat collector-emitter saturation voltage IC = 1 A; IB = 0.2 A; Th = 25 °C; see Figure 8 and 9 - 0.1 0.5 V IC = 2 A; IB = 0.5 A; Th = 25 °C; see Figure 8 and 9 - 0.2 0.6 V IC = 4 A; IB = 1 A; Th = 25 °C; see Figure 8 and 9 - 0.3 1 V base-emitter saturation IC = 1 A; IB = 0.2 A; Th = 25 °C; voltage see Figure 10 - 0.85 1.2 V IC = 2 A; IB = 0.5 A; Th = 25 °C; see Figure 10 - 0.92 1.6 V IC = 1 A; VCE = 5 V; Th = 25 °C; see Figure 11 12 20 40 IC = 2 A; VCE = 5 V; Th = 25 °C; see Figure 11 10 17 28 IC = 2 A; IBon = 0.4 A; IBoff = -0.4 A; RL = 75 Ω; Th = 25 °C; resistive load; see Figure 12 and 13 - 2.7 4 µs IC = 2 A; IBon = 0.4 A; VBB = -5 V; LB = 1 µH; Th = 25 °C; inductive load; see Figure 14 and 15 - 1.2 2 µs IC = 2 A; IBon = 0.4 A; VBB = -5 V; LB = 1 µH; Th = 100 °C; inductive load; see Figure 14 and 15 - 1.4 4 µs IC = 2 A; IBon = 0.4 A; IBoff = -0.4 A; RL = 75 Ω; Th = 25 °C; resistive load; see Figure 13 and 12 - 0.3 0.9 µs IC = 2 A; IBon = 0.4 A; VBB = -5 V; LB = 1 µH; Th = 25 °C; inductive load; see Figure 14 and 15 - 0.1 0.5 µs IC = 2 A; IBon = 0.4 A; VBB = -5 V; LB = 1 µH; Th = 100 °C; inductive load; see Figure 14 and 15 - 0.16 0.9 µs VBEsat hFE DC current gain Dynamic characteristics ts tf storage time fall time PHE13005X_2 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 02 — 20 November 2009 6 of 13 PHE13005X NXP Semiconductors Silicon diffused power transistor IC (mA) 50 V 100 Ω to 200 Ω 250 horizontal oscilloscope vertical 100 6V 300 Ω 1Ω 30 Hz to 60 Hz 001aab987 10 0 min VCE (V) VCEOsus 001aab988 Fig 6. Test circuit for collector-emitter sustaining voltage Oscilloscope display for collector-emitter sustaining voltage test waveform 003aad542 003aad540 2.0 VCEsat (V) Fig 7. VCEsat (V) 1.0 IC = 1 A 2A 3A 4A 1.6 0.8 1.2 0.6 0.8 0.4 0.4 0 10−2 0.2 10−1 1 0 10−1 10 IB (A) Fig 8. 10 IC (A) Collector-emitter saturation voltage; typical values Fig 9. Collector-emitter saturation voltage as a function of collector current; typical values PHE13005X_2 Product data sheet 1 © NXP B.V. 2009. All rights reserved. Rev. 02 — 20 November 2009 7 of 13 PHE13005X NXP Semiconductors Silicon diffused power transistor 003aad541 1.4 VBEsat (V) 1.2 003aad539 102 hFE VCE = 5 V 1.0 0.8 1V 10 0.6 0.4 0.2 0 10−1 1 1 10−2 10 10−1 1 IC (A) 10 IC (A) Fig 10. Base-emitter saturation voltage; typical values Fig 11. DC current gain as a function of collector current; typical values IC ICon 90 % 90 % VCC RL 10 % VIM 0 t tf ts IB ton RB DUT tp toff T 001aab989 IBon 10 % t tr ≤ 30 ns −IBoff 001aab990 Fig 12. Switching times waveforms for resistive load Fig 13. Test circuit for resistive load switching PHE13005X_2 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 02 — 20 November 2009 8 of 13 PHE13005X NXP Semiconductors Silicon diffused power transistor IC ICon 90 % VCC LC 10 % tf LB IBon VBB t DUT ts toff IB 001aab991 IBon t −IBoff 001aab992 Fig 14. Switching times waveforms for inductive load Fig 15. Test circuit for inductive load switching 7. Isolation characteristics Table 7. Isolation characteristics Symbol Parameter Conditions Min Typ Max Unit Visol(RMS) RMS isolation voltage 50 Hz ≤ f ≤ 60 Hz; RH ≤ 65 %; Th = 25 °C; from all terminals to external heatsink; clean and dust free - - 2500 V Cisol isolation capacitance from collector to external heatsink; f = 1 MHz; Th = 25 °C - 10 - pF PHE13005X_2 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 02 — 20 November 2009 9 of 13 PHE13005X NXP Semiconductors Silicon diffused power transistor 8. Package outline Plastic single-ended package; isolated heatsink mounted; 1 mounting hole; 3-lead TO-220 'full pack' SOT186A E A A1 P q D1 mounting base T D j L2 L1 K Q b1 L b2 1 2 3 b c w M e e1 0 5 10 mm scale DIMENSIONS (mm are the original dimensions) (1) UNIT A A1 b b1 b2 c D D1 E e e1 j K mm 4.6 4.0 2.9 2.5 0.9 0.7 1.1 0.9 1.4 1.0 0.7 0.4 15.8 15.2 6.5 6.3 10.3 9.7 2.54 5.08 2.7 1.7 0.6 0.4 L L1 14.4 3.30 13.5 2.79 L2 max. P Q q 3 3.2 3.0 2.6 2.3 3.0 2.6 T (2) 2.5 w 0.4 Notes 1. Terminal dimensions within this zone are uncontrolled. 2. Both recesses are ∅ 2.5 × 0.8 max. depth OUTLINE VERSION SOT186A REFERENCES IEC JEDEC JEITA 3-lead TO-220F EUROPEAN PROJECTION ISSUE DATE 02-04-09 06-02-14 Fig 16. Package outline SOT186A (TO-220F) PHE13005X_2 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 02 — 20 November 2009 10 of 13 PHE13005X NXP Semiconductors Silicon diffused power transistor 9. Revision history Table 8. Revision history Document ID Release date Data sheet status Change notice Supersedes PHE13005X_2 20091120 Product data sheet - PHE13005X_1 - - Modifications: PHE13005X_1 • Various changes to content. 20080515 Product data sheet PHE13005X_2 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 02 — 20 November 2009 11 of 13 PHE13005X NXP Semiconductors Silicon diffused power transistor 10. Legal information 10.1 Data sheet status Document status [1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term 'short data sheet' is explained in section "Definitions". [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 10.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. 10.3 Disclaimers General — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. 10.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 11. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] PHE13005X_2 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 02 — 20 November 2009 12 of 13 PHE13005X NXP Semiconductors Silicon diffused power transistor 12. Contents 1 1.1 1.2 1.3 1.4 2 3 4 5 6 7 8 9 10 10.1 10.2 10.3 10.4 11 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . .1 General description . . . . . . . . . . . . . . . . . . . . . .1 Features and benefits . . . . . . . . . . . . . . . . . . . . .1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 Quick reference data . . . . . . . . . . . . . . . . . . . . .1 Pinning information . . . . . . . . . . . . . . . . . . . . . . .2 Ordering information . . . . . . . . . . . . . . . . . . . . . .2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . .3 Thermal characteristics . . . . . . . . . . . . . . . . . . .5 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . .6 Isolation characteristics . . . . . . . . . . . . . . . . . . .9 Package outline . . . . . . . . . . . . . . . . . . . . . . . . .10 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . 11 Legal information. . . . . . . . . . . . . . . . . . . . . . . .12 Data sheet status . . . . . . . . . . . . . . . . . . . . . . .12 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . .12 Contact information. . . . . . . . . . . . . . . . . . . . . .12 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2009. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 20 November 2009 Document identifier: PHE13005X_2