NSC LM2463

LM2463
Monolithic Triple 4 ns CRT Driver
General Description
Features
The LM2463 is an integrated high voltage CRT driver circuit
designed for use in color monitor applications. The IC contains three high input impedance, wide band amplifiers
which directly drive the RGB cathodes of a CRT. Each
channel has its gain internally set to −20 and can drive CRT
capacitive loads as well as resistive loads present in other
applications, limited only by the package’s power dissipation.
The IC is packaged in an industry standard 11-lead TO-220
molded plastic power package. See Thermal Considerations
section.
n Higher gain to match LM126X CMOS preamplifiers
n 0V to 3.75V input range
n Stable with 0–20 pF capacitive loads and inductive
peaking networks
n Convenient TO-220 staggered lead package style
n Maintains standard LM240X Family pinout which is
designed for easy PCB layout
Applications
n 1600 x 1200 displays up to 70Hz refresh
n Pixel clock frequencies up to 180 MHz
n Monitors using video blanking
Schematic and Connection Diagrams
DS200128-2
Note: Tab is at GND
Top View
Order Number LM2463TA
DS200128-1
FIGURE 1. Simplified Schematic Diagram
(One Channel)
© 2001 National Semiconductor Corporation
DS200128
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LM2463 Monolithic Triple 4 ns CRT Driver
February 2001
LM2463
Absolute Maximum Ratings (Notes 1, 3)
Lead Temperature
(Soldering, < 10 sec.)
ESD Tolerance, Human Body Model
Machine Model
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltage (VCC)
Bias Voltage (VBB)
Input Voltage (VIN)
Storage Temperature Range (TSTG)
+90V
+16V
0V to 4.5V
−65˚C to +150˚C
300˚C
2kV
250V
Operating Ranges (Note 2)
VCC
+60V to +85V
+8V to +15V
VBB
+0V to +3.75V
VIN
+15V to +75V
VOUT
Case Temperature
−20˚C to +100˚C
Do not operate the part without a heat sink.
Electrical Characteristics
(See Figure 2 for Test Circuit)
Unless otherwise noted: VCC = +80V, VBB = +12V, CL = 8 pF, TC = 50˚C
DC Tests: VIN = 2.25VDC
AC Tests: Output = 40VPP(25V - 65V) at 1MHz
Symbol
Parameter
Conditions
ICC
Supply Current
All Three Channels, No Input Signal,
No Output Load
LM2463
Min
Typical
Max
50
mA
IBB
Bias Current
All Three Channels
VOUT
DC Output Voltage
No AC Input Signal, VIN = 1.25V
62
65
68
AV
DC Voltage Gain
No AC Input Signal
−18
−20
−22
∆AV
Gain Matching
(Note 4), No AC Input Signal
LE
Linearity Error
(Notes 4, 5), No AC Input Signal
tR
Rise Time
tF
OS
25
1.0
Units
mA
VDC
dB
5
%
(Note 6), 10% to 90%
3.8
ns
Fall Time
(Note 6), 90% to 10%
3.9
ns
Overshoot
(Note 6)
5
%
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur.
Note 2: Operating ratings indicate conditions for which the device is functional, but do not guarantee specific performance limits. For guaranteed specifications and
test conditions, see the Electrical Characteristics. Datasheet min/max specification limits are guaranteed by design, test, or statistical analysis. The guaranteed
specifications apply only for the test conditions listed. Some performance characteristics may change when the device is not operated under the listed test
conditions.
Note 3: All voltages are measured with respect to GND, unless otherwise specified.
Note 4: Calculated value from Voltage Gain test on each channel.
Note 5: Linearity Error is the variation in dc gain from VIN = 1.0V to VIN = 3.5V.
Note 6: Input from signal generator: tr, tf < 1 ns.
Note 7: Datasheet min/max specification limits are guaranteed by design, test, or statistical analysis.
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LM2463
AC Test Circuit
DS200128-3
Note: 8 pF load includes parasitic capacitance.
FIGURE 2. Test Circuit (One Channel)
Figure 2 shows a typical test circuit for evaluation of the LM2463. This circuit is designed to allow testing of the LM2463 in a 50Ω
environment without the use of an expensive FET probe. The two 2490Ω resistors form a 200:1 divider with the 50Ω resistor and
the oscilloscope. A test point is included for easy use of an oscilloscope probe.The compensation capacitor is used to
compensate the stray capacitance of the two 2490Ω resistors to achieve flat frequency response.
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LM2463
Typical Performance Characteristics
(VCC = +80 VDC, VBB = +12 VDC, CL = 8 pF, VOUT = 40 VPP
(25V−65V), Test Circuit - Figure 2 unless otherwise specified)
DS200128-4
DS200128-7
FIGURE 3. VOUT vs VIN
FIGURE 6. Power Dissipation vs Frequency
DS200128-5
DS200128-8
FIGURE 4. Speed vs Temp.
FIGURE 7. Speed vs Offset
DS200128-6
FIGURE 5. LM2463 Pulse Response
DS200128-9
FIGURE 8. Speed vs Load Capacitance
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The LM2463 is a high voltage monolithic three channel CRT
driver suitable for high resolution display applications. The
LM2463 operates with 80V and 12V power supplies. The
part is housed in the industry standard 11-lead TO-220
molded plastic power package.
The circuit diagram of the LM2463 is shown in Figure 1. The
PNP emitter follower, Q5, provides input buffering. Q1 and
Q2 form a fixed gain cascode amplifier with resistors R1 and
R2 setting the gain at −20. Emitter followers Q3 and Q4
isolate the high output impedance of the cascode stage from
the capacitance of the CRT cathode which decreases the
sensitivity of the device to load capacitance. Q6 provides
biasing to the output emitter follower stage to reduce crossover distortion at low signal levels.
Figure 2 shows a typical test circuit for evaluation of the
LM2463. This circuit is designed to allow testing of the
LM2463 in a 50Ω environment without the use of an expensive FET probe. In this test circuit, the two 2.49kΩ resistors
form a 200:1 wideband, low capacitance probe when connected to a 50Ω coaxial cable and a 50Ω load (such as a
50Ω oscilloscope input). The input signal from the generator
is ac coupled to the base of Q5.
Application Hints
INTRODUCTION
National Semiconductor (NSC) is committed to provide application information that assists our customers in obtaining
the best performance possible from our products. The following information is provided in order to support this commitment. The reader should be aware that the optimization of
performance was done using a specific printed circuit board
designed at NSC. Variations in performance can be realized
due to physical changes in the printed circuit board and the
application. Therefore, the designer should know that component value changes may be required in order to optimize
performance in a given application. The values shown in this
document can be used as a starting point for evaluation
purposes. When working with high bandwidth circuits, good
layout practices are also critical to achieving maximum performance.
IMPORTANT INFORMATION
The LM2463 performance is targeted for the VGA (640 x
480) to UXGA (1600 x 1200, 70Hz) resolution market. The
application circuits shown in this document to optimize performance and to protect against damage from CRT arcover
are designed specifically for the LM2463. If another member
of the LM246X family is used, please refer to its datasheet.
POWER SUPPLY BYPASS
Since the LM2463 is a wide bandwidth amplifier, proper
power supply bypassing is critical for optimum performance.
Improper power supply bypassing can result in large overshoot, ringing or oscillation. 0.1 µF capacitors should be
connected from the supply pins, VCC and VBB, to ground, as
close to the LM2463 as is practical. Additionally, a 47 µF or
larger electrolytic capacitor should be connected from both
supply pins to ground reasonably close to the LM2463.
ARC PROTECTION
During normal CRT operation, internal arcing may occasionally occur. Spark gaps, in the range of 200V, connected from
the CRT cathodes to CRT ground will limit the maximum
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LM2463
voltage, but to a value that is much higher than allowable on
the LM2463. This fast, high voltage, high energy pulse can
damage the LM2463 output stage. The application circuit
shown in Figure 9 is designed to help clamp the voltage at
the output of the LM2463 to a safe level. The clamp diodes,
D1 and D2, should have a fast transient response, high peak
current rating, low series impedance and low shunt capacitance. FDH400 or equivalent diodes are recommended. Do
not use 1N4148 diodes for the clamp diodes. D1 and D2
should have short, low impedance connections to VCC and
ground respectively. The cathode of D1 should be located
very close to a separately decoupled bypass capacitor (C3 in
Figure 9). The ground connection of D2 and the decoupling
capacitor should be very close to the LM2463 ground. This
will significantly reduce the high frequency voltage transients
that the LM2463 would be subjected to during an arcover
condition. Resistor R2 limits the arcover current that is seen
by the diodes while R1 limits the current into the LM2463 as
well as the voltage stress at the outputs of the device. R2
should be a 1⁄2W solid carbon type resistor. R1 can be a 1⁄4W
metal or carbon film type resistor. Having large value resistors for R1 and R2 would be desirable, but this has the effect
of increasing rise and fall times. Inductor L1 is critical to
reduce the initial high frequency voltage levels that the
LM2463 would be subjected to. The inductor will not only
help protect the device but it will also help minimize rise and
fall times as well as minimize EMI. For proper arc protection,
it is important to not omit any of the arc protection components shown in Figure 9.
Theory of Operation
LM2463
Application Hints
(Continued)
DS200128-10
FIGURE 9. One Channel of the LM2463 with the Recommended Arc Protection Circuit
OPTIMIZING TRANSIENT RESPONSE
Referring to Figure 9, there are three components (R1, R2
and L1) that can be adjusted to optimize the transient response of the application circuit. Increasing the values of R1
and R2 will slow the circuit down while decreasing overshoot. Increasing the value of L1 will speed up the circuit as
well as increase overshoot. It is very important to use inductors with very high self-resonant frequencies, preferably
above 300 MHz. Ferrite core inductors from J.W. Miller
Magnetics (part # 78FR--k) were used for optimizing the
performance of the device in the NSC application board. The
values shown in Figure 10 and Figure 11 can be used as a
good starting point for the evaluation of the LM2463. Using a
variable resistor for R1 will simplify finding the value needed
for optimum performance in a given application. Once the
optimum value is determined, the variable resistor can be
replaced with a fixed value.
The LM2463 case temperature must be maintained below
100˚C. If the maximum expected ambient temperature is
70˚C and the maximum power dissipation is 11.9W (from
Figure 6, 180 MHz bandwidth) then a maximum heat sink
thermal resistance can be calculated:
This example assumes a capacitive load of 8 pF and no
resistive load.
TYPICAL APPLICATION
A typical application of the LM2463 is shown in Figure 10
and Figure 11. Used in conjunction with an LM1263, a complete video channel from monitor input to CRT cathode can
be achieved. Performance is ideal for 1600 x 1200 resolution
displays with pixel clock frequencies up to 180 MHz. Figure
10 and Figure 11 are the schematic for the NSC demonstration board that can be used to evaluate the LM126X/2463
combination in a monitor.
EFFECT OF LOAD CAPACITANCE
Figure 8 shows the effect of increased load capacitance on
the speed of the device. This demonstrates the importance
of knowing the load capacitance in the application.
PC BOARD LAYOUT CONSIDERATIONS
For optimum performance, an adequate ground plane, isolation between channels, good supply bypassing and minimizing unwanted feedback are necessary. Also, the length of
the signal traces from the preamplifier to the LM2463 and
from the LM2463 to the CRT cathode should be as short as
possible. The following references are recommended:
Ott, Henry W., “Noise Reduction Techniques in Electronic
Systems”, John Wiley & Sons, New York, 1976.
“Video Amplifier Design for Computer Monitors”, National
Semiconductor Application Note 1013.
Pease, Robert A., “Troubleshooting Analog Circuits”,
Butterworth-Heinemann, 1991.
Because of its high small signal bandwidth, the part may
oscillate in a monitor if feedback occurs around the video
channel through the chassis wiring. To prevent this, leads to
the video amplifier input circuit should be shielded, and input
circuit wiring should be spaced as far as possible from output
circuit wiring.
EFFECT OF OFFSET
Figure 7 shows the variation in rise and fall times when the
output offset of the device is varied from 40 to 50 VDC. The
rise time shows a maximum variation relative to the center
data point (45 VDC) of 4%. The fall time shows a variation of
less than 6% relative to the center data point.
THERMAL CONSIDERATIONS
Figure 4 shows the performance of the LM2463 in the test
circuit shown in Figure 2 as a function of case temperature.
The figure shows that the rise and fall times of the LM2463
increase by approximately 10% as the case temperature
increases from 50˚C to 100˚C. This corresponds to a speed
degradation of 2% for every 10˚C rise in case temperature.
Figure 6 shows the maximum power dissipation of the
LM2463 vs. Frequency when all three channels of the device
are driving an 8 pF load with a 40 Vp-p alternating one pixel
on, one pixel off signal. The graph assumes a 72% active
time (device operating at the specified frequency) which is
typical in a monitor application. The other 28% of the time
the device is assumed to be sitting at the black level (65V in
this case). This graph gives the designer the information
needed to determine the heat sink requirement for his application. The designer should note that if the load capacitance
is increased the AC component of the total power dissipation
will also increase.
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NSC DEMONSTRATION BOARD
Figure 12 shows the routing and component placement on
the NSC LM126X/2463 demonstration board. The schematic
of the board is shown in Figure 10 and Figure 11. This board
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LM2463
Application Hints
(Continued)
provides a good example of a layout that can be used as a
guide for future layouts. Note the location of the following
components:
•
C19 — VCC bypass capacitor, located very close to pin 4
and ground pins
•
C20 — VBB bypass capacitors, located close to pin 8 and
ground
•
C46, C47, C48 — VCC bypass capacitors, near LM2463
and VCC clamp diodes. Very important for arc protection.
The routing of the LM2463 outputs to the CRT is very critical
to achieving optimum performance. Figure 13 shows the
routing and component placement from pin 1 of the LM2463
to the blue cathode. Note that the components are placed so
that they almost line up from the output pin of the LM2463 to
the blue cathode pin of the CRT connector. This is done to
minimize the length of the video path between these two
components. Note also that D8, D9, R24 and D6 are placed
to minimize the size of the video nodes that they are attached to. This minimizes parasitic capacitance in the video
path and also enhances the effectiveness of the protection
diodes. The anode of protection diode D8 is connected
directly to a section of the the ground plane that has a short
and direct path to the LM2463 ground pins. The cathode of
D9 is connected to VCC very close to decoupling capacitor
C48 (see Figure 13) which is connected to the same section
of the ground plane as D8. The diode placement and routing
is very important for minimizing the voltage stress on the
LM2463 during an arcover event. Lastly, notice that S3 is
placed very close to the blue cathode and is tied directly to
CRT ground.
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LM2463
Application Hints
(Continued)
DS200128-11
FIGURE 10. LM126X/LM246X Demonstration Board Schematic
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LM2463
Application Hints
(Continued)
DS200128-15
FIGURE 11. LM126X/LM246X Demonstration Board Schematic (continued)
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LM2463
Application Hints
(Continued)
DS200128-13
FIGURE 12. LM126X/LM246X Demo Board Layout
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LM2463
Application Hints
(Continued)
DS200128-14
FIGURE 13. Trace Routing and Component Placement for Blue Channel Output
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LM2463 Monolithic Triple 4 ns CRT Driver
Physical Dimensions
inches (millimeters) unless otherwise noted
CONTROLLING DIMENSION IS INCH
VALUES IN [ ] ARE MILLIMETERS
NS Package Number TA11B
Order Number LM2463TA
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