INTEGRATED CIRCUITS DATA SHEET OM5193H Disk drive spindle and VCM with servo controller Product specification File under Integrated Circuits, IC11 1998 Nov 02 Philips Semiconductors Product specification Disk drive spindle and VCM with servo controller OM5193H CONTENTS 1 FEATURES 1.1 1.2 1.2.1 1.2.2 1.3 Servo control Motor control Spindle motor driver Voice coil motor driver Miscellaneous items 2 APPLICATIONS 3 GENERAL DESCRIPTION 3.1 3.2 3.3 3.4 Overview Servo controller Spindle and voice coil motor Safety functions 4 QUICK REFERENCE DATA 5 ORDERING INFORMATION 6 BLOCK DIAGRAMS 7 PINNING 8 FUNCTIONAL DESCRIPTION 8.1 8.2 8.3 8.3.1 8.3.2 8.4 8.4.1 8.4.2 8.4.3 8.4.4 8.4.5 8.5 8.6 8.7 8.8 8.9 8.10 8.11 8.12 8.13 8.14 8.15 8.16 8.17 8.17.1 8.17.2 8.18 Serial interface Commutation and sleep mode Commutation control Blanks, Watchdog and Start-up delays Comdelim delay 10-bit ADC with 7 analog inputs Input channels Input ranges Conversion modes Programming register#0 Converter clock frequency values 10-bit VCM DAC Reference voltage Stand-alone op-amps Analog switch Charge pump voltage Spindle driver VCM driver Park the VCM Precharge the VCM Brake the motor Power-on reset Thermal monitor and shutdown Power supply isolation External isolation diode External power FET Thermal behaviour 1998 Nov 02 2 9 LIMITING VALUES 10 HANDLING 11 THERMAL CHARACTERISTICS 12 CHARACTERISTICS 13 APPLICATION INFORMATION 14 PACKAGE OUTLINE 15 SOLDERING 15.1 15.2 15.3 15.4 Introduction Reflow soldering Wave soldering Repairing soldered joints 16 DEFINITIONS 17 LIFE SUPPORT APPLICATIONS Philips Semiconductors Product specification Disk drive spindle and VCM with servo controller 1 OM5193H 1.3 FEATURES 1.1 Miscellaneous items • Precision low voltage 5 and 12 V power monitor with hysteresis Servo control • 10-bit VCM Digital-to-Analog Converter (DAC) • Precision internal voltage reference for servo and power control circuits • 7-channel 10-bit Analog-to-Digital Converter (ADC) • Programmable spindle commutation control logic • 3-wire serial interface • Thermal sense circuit with over-temperature shutdown sensor • Two stand-alone operational amplifiers (op-amps) with outputs connected to the ADC • Internal charge pump voltage generator • Automatic brake-after-park at power-down, thermal shutdown or sleep mode • Analog multiplexer with two inputs used to select VCM seek mode or track-following mode. 1.2 1.2.1 • Sleep mode: low power consumption mode. Motor control 2 SPINDLE MOTOR DRIVER • 12 V hard disk drive products. • 3-phase output motor driver • 1.9 A maximum available start-up current 3 • Total Rds(on) = 0.6 Ω (typical) at 25 °C 3.1 • Back ElectroMotive Force (BEMF) processing for sensorless motor commutation GENERAL DESCRIPTION Overview The OM5193H is a combination of a voice coil motor and a spindle motor driver with embedded servo controller designed for use in disk drives. Configuration and control registers are set via a 3-wire serial port running up to 30 MHz to interface commonly to a microcontroller or a digital signal processor. • Linear current control • External current sense resistor • External current control loop compensation • Adjustable slew rate control • Short-circuit brake The device operates at 5 and 12 V power supplies and integrates safety functions such as power stages overvoltage protection, power and temperature monitor, over-temperature shutdown and dynamic brake-after-park. • Adjustable brake-after-park delay time. 1.2.2 APPLICATIONS VOICE COIL MOTOR DRIVER • 1.5 A maximum current capability The device is contained in a QFP80 package with 18 pins connected to the leadframe thus providing low thermal resistance. • Total Rds(on) = 0.8 Ω (typical) at 25 °C • Linear class AB output with low cross-over distortion delay • Precision current control loop with external current sense resistor 3.2 Servo controller The servo controller includes the following circuits: • Programmable seek and track-following mode with adjustable current loop gain • 3-wire serial interface • Spindle commutation logic • External current control loop compensation • A 10-bit ADC with 7 inputs selected by an internal multiplexer • Precharge during brake mode • 20 kHz current control loop bandwidth • Parking function • A 10-bit VCM DAC with 1.5, 2.5 and 3.5 V voltage references • Adjustable park voltage with limiter. • Two low-offset stand-alone op-amps • Analog multiplexer with 2 inputs. 1998 Nov 02 3 Philips Semiconductors Product specification Disk drive spindle and VCM with servo controller OM5193H The serial interface is used: 3.4 • To adjust the timing parameters for proper spindle commutation sequence The OM5193H is protected against transient voltage spikes that are generated by the inductive loads of spindle and VCM. • To accurately adjust head positioning via the 10-bit VCM DAC Power supplies and temperature are monitored in order to guarantee data reliability and self-protection of the device in case of power loss or temperatures beyond maximum rating. • To set VCM seek or track-following mode via the low-impedance switch • To select and process analog signals via a 7-channel multiplexer connected to the 10-bit ADC. Park and brake functions secure heads and disk media in case of power-down or high temperature failure. This function is also activated by the sleep mode. The spindle commutation logic circuit ensures proper spindle start-up (no reverse rotation) and commutation sequence for the spindle driver by processing BEMF sensing circuit output signals. An internal temperature monitor is available to monitor the chip temperature and thus prevents over-temperature shutdown. Internally connected to the ADC channel 4, it can be used by the microcontroller as an early ‘temperature-too-high’ warning during a long VCM seek sequence. The two stand-alone op-amps, with the inputs connected to the read channel IC, provide servo track signals processed by the microcontroller to perform accurate track-following mode. 3.3 Spindle and voice coil motor The OM5193H drives a 3-phase brushless, sensorless DC spindle motor and a voice coil motor. Spindle and voice coil motor power stages with low Rds(on) and high current capability are suitable for mid-end and low-end 12 V disk drives. Power stages are designed in such a way that external Schottky diodes are not needed. Spindle current is sensed by an external resistor and monitored by the external signal SPCC (SPindle Current Control). Spindle speed is regulated by the microcontroller via the ZCROSS signal (Zero CROSSing detection frequency output). BEMF comparators provide the digital zero crossing signals. These are processed by the commutation logic circuit to properly switch-on and switch-off spindle power drivers thus ensuring the rotation of the motor. The control of the heads positioning is accomplished by the internal 10-bit VCM DAC. Seek and track-following VCM current loop gain is set by external resistors. VCM zero current is referenced to the 2.5 V internal voltage reference. An internal precharge of the actuator (magnetic latch) during brake mode guarantees total control of the current when VCM starts running without current spikes. 1998 Nov 02 Safety functions 4 Philips Semiconductors Product specification Disk drive spindle and VCM with servo controller 4 OM5193H QUICK REFERENCE DATA SYMBOL PARAMETER MIN. TYP. MAX. UNIT Supply voltage VDDA1 5 V analog supply voltage 4.5 5.0 5.5 V VDDD 5 V digital supply voltage 4.5 5.0 5.5 V VDDA2 12 V analog supply voltage 10.8 12.0 13.2 V ISPOUT spindle start-up current − − 1.9 A IVCMRUN VCM current − − 1.5 A Drivers 5 ORDERING INFORMATION TYPE NUMBER OM5193H 1998 Nov 02 PACKAGE NAME QFP80 DESCRIPTION plastic quad flat package; 80 leads (lead length 1.95 mm); body 14 × 20 × 2.8 mm 5 VERSION SOT318-2 Philips Semiconductors Product specification Disk drive spindle and VCM with servo controller 6 OM5193H BLOCK DIAGRAMS Figures 1, 2, 3 and 4 provide block diagrams of the OM5193H servo and motor control (top level diagram, servo controller, spindle motor driver and voice coil motor driver). BRAKEDELAY handbook, full pagewidth CLAMP CLAMP1 CLAMP2 CLAMP3 SLEW SPCCOUT SPCC MOTSENSE3 MOTSENSE2 MOTSENSE1/ SPSENSEH GNDS/SPSENSEL CT MOTA MOTB 72 74 CLOCK SCLOCK SDATA SCANTEST VDDA1 VDDA2 AGND INTINN INTIN ADC[0]/INTOUT PESAMPN PESAMP ADC[1]/DIFOUT 48 50 49 51 1, 4 to 7, 58 to 61, 64 to 67, 70, 75, 78 to 80 POWER STAGE 55 56 18 12 20 14 13 PARK AND BRAKE 27 73 SPINDLE CONTROL 76 8 2 11 16 THERMAL SHUTDOWN 9 17 CHARGE PUMP 18 ACROSS BCROSS CCROSS COMMUTATION LOGIC VDDD DGND SWITCHGATE BSTCP1 BSTCP2 CAPY 46 OM5193H POWER-ON RESET 47 45 CHK5 CHK12 CPOR 24 19 23 POR SERIAL INTERFACE 57 22 77 PWRBIAS1 PWRBIAS2 26 44 15 39 0 7-CHANNEL 10-BIT ADC 1 2 3 4 5 38 69 10-BIT VCM DAC 71 6 68 37 VCM POWER CONTROL STAGE BANDGAP 0.5VDDA1 A2 35 36 63 54 28 THERMAL MONITOR A1 62 VCM SWITCH 29 30 31 32 33 34 40 42 41 43 53 52 CLAMP MGM972 ADC[2]/SOUT ADC[5] ADC[3] ADC[4]/TEMP DACOUT SEEKSELECT VCMIN REF2V5 TRACKFWSELECT Fig.1 Block diagram, top level. 1998 Nov 02 HEATSINK 25 21 SDEN 3 PARKVOLT BRAKEADJH 10 COMA COMB COMC ZCROSS BRAKEPOWER MOTC 6 VCMSENSEH VCMSENSEL NIVCM GNDVCM1 GNDVCM2 GNDVCM3 GNDV IVCM Philips Semiconductors Product specification Disk drive spindle and VCM with servo controller OM5193H handbook, full pagewidth 19 POR ZCROSS CLOCK SCANTEST POWER-ON RESET 25 24 26 COMA COMB COMC 21 SDEN SDATA SCLOCK 22 SERIAL INTERFACE 23 COMMUTATION LOGIC 10-BIT ADC ACROSS BCROSS CCROSS 34 10-BIT VCM DAC RANGE ADAPTER DACOUT OM5193H Vref3V5 INPUT MULTIPLEXER INTINN INTIN PESAMPN PESAMP Vref1V5 VCM switch 43 A2 35 36 2.5 V BANDGAP VDDA1 37 38 Vref2V5 Vref2V5 A1 28 29 30 31 32 33 ADC[0]/INTOUT ADC[1]/DIFOUT 40 ADC[5] ADC[4]/TEMP for VCM 39 44 VDDA1 REF2V5 AGND 20 27 VDDD 41 42 SEEKSELECT DGND ADC[2]/SOUT ADC[3] TRACKFWSELECT MGM973 Fig.2 Block diagram, servo controller. 1998 Nov 02 VCMIN 7 Philips Semiconductors Product specification Disk drive spindle and VCM with servo controller CCPOR handbook, full pagewidth OM5193H CCAPX CCAPY VDDA1 VDDA2 44 15 CPOR BSTCP1 BSTCP2 CAPY PWRBIAS1 PWRBIAS2 45 16 57 17 18 CHK5 46 CHK12 47 CCHK5 POR 19 VDDA2POWER 77 8 POWER-ON RESET CHARGE PUMP SWITCH GATE OM5193H 10 CLAMP1 55 CLAMP2 CCHK12 THERMAL MONITOR 56 CLAMP3 ADC[4]/TEMP 32 72 MOTA PREDRIVER THERMAL SHUTDOWN COMA from commu- COMB DECODER tation logic COMC 74 MOTB PREDRIVER Vref (from VCM) SPINDLE SWITCH VCAPY SPCCOUT 14 3 MOTC PREDRIVER SPCC 13 CSPCCOUT CONTROL AMPLIFIER Ibrake (from VCM) SENSE AMPLIFIER SLOPE CURRENT CONTROL 9 CT BEMF COMPARATOR 76 MOTSENSE2 ACROSS CCROSS BCROSS 11 GNDS/SPSENSEL to commutation logic 12 SLEW 73 MOTSENSE3 2 MOTSENSE1/ SPSENSEH RSLEW RSPSENSE MGM974 Fig.3 Block diagram, spindle motor driver. 1998 Nov 02 8 This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in _white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here inThis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader. white to force landscape pages to be ... 55 CLAMP2 VCAPY 56 CLAMP3 PARK RPARKVOLT 8 SWITCHGATE PRECHARGE RVCMCOMPRC REF2V5 40 VCMIN 43 master CVCMCOMPRC 62 IVCM PRE DRIVER ERROR 71 GNDVCM1 RFEEDBACK 12 V 68 GNDVCM2 9 OM5193H CBRAKEP BRAKEPOWER 48 BRAKEADJH 49 BRAKEDELAY 63 GNDVCM3 M BRAKE AFTER PARK 50 slave SWITCH GND RBRAKED Ibrake (to spindle) 69 NIVCM PRE DRIVER ERROR CBRAKED Philips Semiconductors POWER-DOWN 51 Disk drive spindle and VCM with servo controller andbook, full pagewidth 1998 Nov 02 PARKVOLT 10 CLAMP1 Vref (to spindle) TRACKFWSELECT 42 53 VCMSENSEL SEEKSELECT 41 VCM switch RVCMSEEK DACOUT 34 VCM DAC 52 VCMSENSEH MGM975 54 ADC[2]/SOUT GNDV Fig.4 Block diagram, voice coil motor driver. OM5193H 30 Product specification RVCMTRACKFW RVCMSENSE SENSE BANDGAP Philips Semiconductors Product specification Disk drive spindle and VCM with servo controller 7 OM5193H PINNING SYMBOL PIN I/O DESCRIPTION HEATSINK 1 − dissipation pin; internally connected to the leadframe MOTSENSE1/SPSENSEH 2 analog I/O sense line of the spindle/spindle sense amplifier input MOTC 3 HEATSINK 4 − dissipation pin; internally connected to the leadframe HEATSINK 5 − dissipation pin; internally connected to the leadframe HEATSINK 6 − dissipation pin; internally connected to the leadframe HEATSINK 7 − dissipation pin; internally connected to the leadframe analog output spindle motor power output SWITCHGATE 8 CT 9 analog output isolation FET driver analog input CLAMP1 10 supply centre tap of the spindle power stage supply voltage GNDS/SPSENSEL 11 ground SLEW 12 analog input spindle motor slope control spindle ground connection/spindle sense amplifier ground SPCC 13 analog input spindle current control SPCCOUT 14 analog input VDDA2 15 supply BSTCP1 16 analog I/O booster capacitor 1 BSTCP2 17 analog I/O booster capacitor 2 CAPY 18 POR 19 VDDD 20 supply SDEN 21 digital input SDATA 22 digital I/O serial interface data line SCLOCK 23 digital input serial interface clock line CLOCK 24 digital input clock input ZCROSS 25 digital output SCANTEST 26 digital input compensation point of the spindle current control loop 12 V analog supply voltage analog output DC-to-DC converter output (19 V) digital I/O power-on reset signal; active LOW 5 V digital supply voltage serial interface data enable; active LOW zero crossing detection signal scantest mode control; at LOW-level in normal conditions DGND 27 ground ADC[0]/INTOUT 28 analog I/O ADC channel 0 input/output of the A2 amplifier ADC[1]/DIFOUT 29 analog I/O ADC channel 1 input/output of the A1 amplifier ADC[2]/SOUT 30 analog I/O ADC[3] 31 analog input ADC[4]/TEMP 32 analog I/O ADC[5] 33 DACOUT 34 PESAMPN 35 analog input inverting input of the A1 amplifier. PESAMP 36 analog input non-inverting input of the A1 amplifier INTINN 37 analog input inverting input of the A2 amplifier INTIN 38 analog input non-inverting input of the A2 amplifier AGND 39 ground REF2V5 40 1998 Nov 02 analog input servo digital ground ADC channel 2 input/VCM sense amplifier output ADC channel 3 input ADC channel 4 input/temperature monitor, thermal shutdown ADC channel 5 input analog output 10-bit VCM DAC output servo analog ground analog output 2.5 V bandgap reference voltage 10 Philips Semiconductors Product specification Disk drive spindle and VCM with servo controller SYMBOL SEEKSELECT PIN I/O 41 analog input OM5193H DESCRIPTION input for the seek mode TRACKFWSELECT 42 analog input input for the track-following mode VCMIN 43 analog input VCM control input VDDA1 44 supply CPOR 45 CHK5 46 analog output set the VDDA1 POR threshold CHK12 47 analog output set the VDDA2 POR threshold BRAKEPOWER 48 analog input brake power capacitor BRAKEADJH 49 analog input adjust current consumption during park mode BRAKEDELAY 50 analog input set the brake-after-park delay time PARKVOLT 51 analog input set the park voltage VCMSENSEH 52 analog input positive input of the VCM sense amplifier VCMSENSEL 53 analog input negative input of the VCM sense amplifier GNDV 54 ground VCM ground connection CLAMP2 55 supply power stage supply voltage CLAMP3 56 supply power stage supply voltage PWRBIAS1 57 analog input analog input 5 V analog supply voltage set the POR delay time power stages isolation bias; externally connected to the clamp HEATSINK 58 − dissipation pin; internally connected to the leadframe HEATSINK 59 − dissipation pin; internally connected to the leadframe HEATSINK 60 − dissipation pin; internally connected to the leadframe HEATSINK 61 − dissipation pin; internally connected to the leadframe IVCM 62 GNDVCM3 63 ground HEATSINK 64 − dissipation pin; internally connected to the leadframe HEATSINK 65 − dissipation pin; internally connected to the leadframe HEATSINK 66 − dissipation pin; internally connected to the leadframe HEATSINK 67 − dissipation pin; internally connected to the leadframe GNDVCM2 68 NIVCM 69 HEATSINK 70 GNDVCM1 71 MOTA 72 analog output spindle motor power output MOTSENSE3 73 analog output sense line of the spindle MOTB 74 analog output spindle motor power output HEATSINK 75 MOTSENSE2 76 PWRBIAS2 77 analog input HEATSINK 78 − dissipation pin; internally connected to the leadframe HEATSINK 79 − dissipation pin; internally connected to the leadframe HEATSINK 80 − dissipation pin; internally connected to the leadframe 1998 Nov 02 analog output inverted output of the VCM (master stage) ground VCM power stage ground VCM power stage ground analog output non-inverted VCM output (slave stage) − ground − dissipation pin; internally connected to the leadframe VCM power stage ground dissipation pin; internally connected to the leadframe analog output sense line of the spindle power stages isolation bias; externally connected to the clamp 11 Philips Semiconductors Product specification 65 HEATSINK 66 HEATSINK 67 HEATSINK 68 GNDVCM2 69 NIVCM 70 HEATSINK 71 GNDVCM1 72 MOTA 73 MOTSENSE3 OM5193H 74 MOTB 75 HEATSINK 76 MOTSENSE2 78 HEATSINK 79 HEATSINK 80 HEATSINK handbook, full pagewidth 77 PWRBIAS2 Disk drive spindle and VCM with servo controller HEATSINK 1 64 HEATSINK MOTSENSE1/ SPSENSEH 2 63 GNDVCM3 MOTC 3 62 IVCM HEATSINK 4 61 HEATSINK HEATSINK 5 60 HEATSINK HEATSINK 6 59 HEATSINK HEATSINK 7 58 HEATSINK SWITCHGATE 8 57 PWRBIAS1 CT 9 56 CLAMP3 CLAMP1 10 55 CLAMP2 GNDS/SPSENSEL 11 54 GNDV SLEW 12 53 VCMSENSEL OM5193H SPCC 13 52 VCMSENSEH SPCCOUT 14 51 PARKVOLT VDDA2 15 50 BRAKEDELAY BSTCP1 16 49 BRAKEADJH BSTCP2 17 48 BRAKEPOWER CAPY 18 47 CHK12 POR 19 46 CHK5 VDDD 20 45 CPOR SDEN 21 44 VDDA1 SDATA 22 43 VCMIN SCLOCK 23 42 TRACKFWSELECT CLOCK 24 Fig.5 Pin configuration. 1998 Nov 02 12 REF2V5 40 AGND 39 INTIN 38 INTINN 37 PESAMP 36 PESAMPN 35 DACOUT 34 ADC[5] 33 ADC[4]/TEMP 32 ADC[3] 31 ADC[2]/SOUT 30 ADC[1]/DIFOUT 29 ADC[0]/INTOUT 28 DGND 27 SCANTEST 26 ZCROSS 25 41 SEEKSELECT MGM976 Philips Semiconductors Product specification Disk drive spindle and VCM with servo controller 8 8.1 OM5193H determines if the transfer is a read (logic 1) or a write (logic 0). FUNCTIONAL DESCRIPTION Serial interface The remaining 3 bits determine the internal register to be accessed. The other 12 bits contain the programming data. In the read mode (R/W = 1), the OM5193H outputs the register contents of the selected address. In the write mode (R/W = 0), the OM5193H loads the selected register with the data presented on the SDATA pin. During sleep mode, the serial port remains active and register programmed data is retained. The serial interface is a 3-wire bidirectional port for writing and reading data to and from the internal registers of the OM5193H. Each read or write will be composed of 16 bits. For data transfer SDEN is brought LOW, serial data is presented at the SDATA pin, and a serial clock is applied to the SCLOCK pin. After the SDEN pin goes LOW, the first 16 pulses applied to the SCLOCK pin shift the data presented at the SDATA pin into an internal shift register on the rising edge of each clock pulse. An internal counter prevents more than 16 bits from being shifted into the register. The data in the shift register is latched when SDEN goes HIGH. If less than 16 clock pulses are provided before SDEN goes HIGH, the data transfer is aborted. SCLOCK is driven by the microcontroller. When the microcontroller drives the SDATA line, the data is valid on the rising edge of SCLOCK. When the OM5193H is driving the SDATA line (in read mode after the R/W bit and 3 bits) the data is valid on the falling edge of SCLOCK. SDEN marks the end of the serial transfer. When the SDEN pin goes HIGH, the shift register data is latched into the addressed register of the OM5193H. All transfers are shifted into the serial port with the MSB first. The first 4 bits of the transfer contain address and instruction information. The MSB is the R/W bit which handbook, full pagewidth SDEN send/receive data address direction 1 2 3 4 5 tst 6 7 8 9 10 tren 11 12 13 14 tsu 15 16 tex thd SCLOCK SDATA R/W A2 A1 A0 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Write to the OM5193H write registers SDATA R/W A2 A1 read back data A0 D11 D10 D9 D8 D7 D6 D5 D3 D2 D1 D0 MGM977 Write to, then read from the OM5193H Fig.6 Serial port timing information. 1998 Nov 02 D4 13 Philips Semiconductors Product specification Disk drive spindle and VCM with servo controller Table 1 OM5193H Timing information for the serial interface SYMBOL PARAMETER MIN. clock frequency − tst chip select to first active clock edge 1⁄ tsu data to clock set-up time thd trd MAX. UNIT 30 MHz − ns 12 − ns clock to data hold time 12 − ns time data line is driven after 5th negative clock − 5 ns tren time from positive clock for data line to be driven 0 − ns trhd receive data hold time 0 − ns trsu receive data set-up time 12 − ns texW last active clock to chip select; inactive on write 0 − ns texR last active clock to chip select; inactive on read 10 − ns Tbpa time between successive serial port accesses 5 − clock cycles fclk Table 2 2Tclk Writeable registers of the serial interface BITS REG 11 0 1 2 10 8 opamp increm. Select_N Channel not used reverse break 9 not used seek/ trackfw DAC (9) not used 7 6 5 auto Conv. select range Select test Mode_N sleep_N spindiv manual run/ stop comC comB comA DAC (6) DAC (5) DAC (4) DAC (3) DAC (2) not used DAC (8) DAC (7) 3 not used 4 not used 5 6 3 2 not used Watchdog 1 0 ADC MUX address DAC (1) DAC (0) Blank 1 high Clock_N Comdelim 7 Table 3 4 Start-up Blank 2 Readable registers of the serial interface BITS REG 11 0 10 9 8 7 6 5 4 3 2 1 0 ADC status ADC (9) ADC (8) ADC (7) ADC (6) ADC (5) ADC (4) ADC (3) ADC (2) ADC (1) ADC (0) 1 1998 Nov 02 Ccross Bcross Across 14 Philips Semiconductors Product specification Disk drive spindle and VCM with servo controller Table 4 8.2 OM5193H Address of registers R/W A2 A1 A0 REG. DESCRIPTION 0 0 0 0 0 ADC channel and programmable options 1 0 0 0 0 ADC status and value 0 0 0 1 1 commutation, sleep, and VCM switch controls 1 0 0 1 1 commutation state in manual mode 0 0 1 0 2 10-bit DAC 0 0 1 1 3 not used 0 1 0 0 4 not used 0 1 0 1 5 Blank 1 and Watchdog delays 0 1 1 0 6 commutation delay limit (11 bits), internal clock divider factor 0 1 1 1 7 Start-up and Blank 2 delays • Register#1 (5) is the spindiv bit. This bit together with register#6 (11) enables the selection of a divider factor for both converter clock and spindle clock. Clock configurations are described in Section “Commutation control” (see also Table 6). Commutation and sleep mode Spindle control and sleep mode are controlled by writing or reading on register#1. • Register#1 (0, 1 and 2) control the spindle commutations in manual mode when run/stop, manual and sleep bits are correctly set. The commutation sequence is described in Section “Spindle driver” (see also Table 16 and Fig.12). • Register#1 (6) is the sleep mode bit. When it is set to logic 0, the OM5193H will enter the low power mode. Then the commutation control generates (101) output codes on commutation signals to set spindle and VCM head into sleep mode. This causes the OM5193H to go into the brake-after-park mode. The only operating circuits are the power monitor, the voltage reference generator, the VCM precharge circuit and the serial interface. The OM5193H is in sleep mode when POR is LOW. • Register#1 (3) is the run/stop bit. After the power is turned on and POR is HIGH, the motor will not start spinning until register#1 (3) has been set to logic 1. The motor stops spinning when this bit is set to logic 0. • Register#1 (4) is the manual commutation mode bit. When this bit is set to logic 1 and register#1 (3) set to logic 1, the commutation logic in the OM5193H will be disabled so that the spindle will not automatically go to the next commutation. When the power is first turned on, the POR signal goes HIGH after the POR delay. The OM5193H is then automatically set in sleep mode and thus in low power consumption mode. The VCM DAC output is in high-impedance mode, the spindle is in the brake mode and the VCM is in the precharge mode. Only after POR is HIGH and register#1 (6) is set to logic 1, OM5193H is ready to be functional. When register#1 (6) goes HIGH, the VCM DAC outputs the 2.5 V reference voltage. When register#1 (3 and 4) are set to logic 1, the microcontroller is expected to generate the different commutation states for the motor. The OM5193H will still provide the coil status which will be available by reading register#1. The different waveforms are shown in Section “Spindle driver” (see also Fig.12). Note that depending on the coil status acquisition moment, transient states (due to the flyback pulses) can be read. • Register#1 (11) is dedicated to brake the spindle motor without going in ‘brake-after-park’ mode. The commutation sequence is shifted in order to efficiently brake the motor. This brake, called reverse brake, is activated when register#1 (11) bit is set to logic 1. Note that there is no action on the VCM input signal when the reverse brake is used. When this bit is set to logic 0, the spindle motor starts again with normal spindle commutations. When register#1 (4) is set to logic 0, the manual mode is disabled and the OM5193H will automatically commutate the motor each time a zero crossing is detected. The time between the zero crossing and the next commutation is half the time between the two preceding zero crossings. This is explained in the detailed description in Section “Commutation control”. 1998 Nov 02 15 Philips Semiconductors Product specification Disk drive spindle and VCM with servo controller OM5193H Reading register#1 will read the state of the 3 coils coming from the spindle control block (ACROSS, BCROSS and CCROSS). The 3 input lines will be in bits 0, 1, and 2. The different waveforms are shown in Section “Spindle Table 5 driver” (see also Fig.12). Note that depending on the coil status acquisition moment, transient states (due to the flyback pulses) can be read. Writing register#1 BIT DEFAULT VALUE 0 0 comA drives COMA when in manual commutation 1 0 comB drives COMB when in manual commutation 2 0 comC drives COMC when in manual commutation 3 0 run/stop 0 = motor to brake-after-park mode NAME DESCRIPTION 1 = motor spinning; VCM active 4 0 manual 0 = automatic commutation mode with run/stop = 1 1 = manual commutation mode with run/stop = 1 5 0 spindiv 0 = the internal spindle clock frequency is controlled by register#6 (11) (bit highClock_N) 6 0 sleep_N 0 = sleep mode: low power mode, serial interface active, power stages in brake-after-park mode 1 = an additional divider by 4 is added on the internal spindle clock 1 = fully functional mode: sleep_N has higher priority than run/stop if both are active 7 0 − not used 8 0 − not used 9 1 seek/trackfw 0 = VCMIN connected to SEEKSELECT 10 1 − 11 0 reverse break 1 = active brake control 1 = VCMIN connected to TRACKFWSELECT not used 0 = normal commutations as defined by bits above 8.3 The commutation logic keeps the motor spinning by commutating the motor after each detected zero crossing. It measures the time between two successive BEMF zero crossings and then determines the next commutation. The delay (commutation delay) between a zero crossing and the next commutation is half the time between the two preceding zero crossings. The commutation delay (Comdelim) can be limited to guarantee a faster lock after the motor has gone out of lock. A maximum commutation delay can be set via the serial port. The time is a function of both the external clock frequency, the individual register prescalers and the time programmed into the registers. Figure 7 shows a typical motor commutation timing diagram. Commutation control The commutation logic block generates the six different states to rotate the spindle motor. The spindle driver block provides the BEMF zero crossing information. The commutation block interprets the zero crossing information and determines the commutation delay time and the next coil state. The commutation block must take into account the following situations: • Start-up • No start • Reverse rotating • Run • Manual commutation. 1998 Nov 02 16 Philips Semiconductors Product specification Disk drive spindle and VCM with servo controller handbook, full pagewidth Blank 1 OM5193H Watchdog Blank 2 Start-up Commutation delay centre tap commutation false zero crossings Zc1 Zc2 Zc3 flyback pulse commutation true zero crossing MGM978 Fig.7 A typical motor commutation diagram. • Blank 1 After a commutation occurs, the leading edge of the flyback pulse has a zero crossing (Zc1). Blank 1 timer is used to ignore this zero crossing by masking it while the timer initialized at Blank 1 value is counting. The state associated to Blank 1 down-counter will end when the counter reaches the zero value. The state associated to the Watchdog timer will start when the one associated to Blank 1 timer is finished and will end when Zc2 occurs or when the Watchdog counter expires. • Start-up If the motor is not spinning, the BEMF zero crossings will not occur. The Start-up timer detects this if it expires before the true zero crossing (Zc3) has occurred. It will advance the commutation by one step if this happens. The state associated to Start-up timer will start when the one associated to Blank 2 timer is finished and will end when Zc3 occurs or when Start-up expires. • Blank 2 The Blank 2 timer starts counting as soon as the second zero crossing occurs (Zc2). After the second flyback pulse zero crossing, all extra zero crossings are ignored during the Blank 2 time. This allows the ringing of the coil voltage without causing a commutation advance. The state associated to Blank 2 down-counter will end when the counter reaches the zero value. • Comdelim The timer associated to Comdelim value allows to control the maximum commutation delay (between zero crossing and next commutation). When the true zero crossing is detected (Zc3), the timer will count until it expires and then will commutate the motor to the next step. This commutation delay time is equal to half the measured value between 2 zero crossings. The Comdelim value should be set to the maximum allowable delay value. If ∆Zcmeas is lower than the programmed Comdelim value, the next timer value will be ∆Zcmeas divided by 2. If ∆Zcmeas is higher than the programmed Comdelim value, the next timer value will be the programmed Comdelim value divided by 2. • Watchdog The Watchdog timer makes sure the motor is running in forward direction. If the motor is rotating in reverse direction, the BEMF voltage is inverted and the second crossing of the flyback pulse (Zc2) will not occur until the true BEMF zero crossing is detected. Therefore, if the Watchdog timer expires before a zero crossing occurs, the motor is assumed to be rotating backwards. The commutation is advanced by one step to correct this condition. The Watchdog time must be set to a value that is greater than the flyback pulse duration, measured when the spindle motor stands still. 1998 Nov 02 17 Philips Semiconductors Product specification Disk drive spindle and VCM with servo controller OM5193H The clock used in the commutation logic block is obtained by dividing the master clock of the chip (fCLOCK) by a clock divider (Prescaler). This internal clock will be named internalSpindleClock. Internal spindle clock configurations are described in Table 6. Table 6 8.3.1 All the delays described above (Blank 1, Watchdog, Blank 2, Start-up and Comdelim) are generated by one down-counter (called TIMER 1), see Fig.8 and one up-counter (called TIMER 2), see Fig.9. Each of them uses internalSpindleClock signal. Spindle clock configurations spindiv REGISTER#1 (5) highClock_N REGISTER#6 (11) 0 0 1⁄ 16fCLOCK 0 1 1⁄ 32fCLOCK 1 0 1⁄ 1 1 internalSpindleClock 64fCLOCK 1⁄ 128fCLOCK BLANKS, WATCHDOG AND START-UP DELAYS An internal down-counter called TIMER 1 is used to generate Blank 1, Blank 2, Watchdog and Start-up delays. It loads one of these programmed values and counts down till it reaches zero. handbook, full pagewidth 19 18 17 16 15 14 13 12 11 10 9 8 7 6 Start-up 5 4 3 2 1 0 Blank 1 MGL481 Blank 2 Watchdog Fig.8 Down-counter TIMER 1. The actual delay time will be: Delay = value × step ( MSB + 1 ) LSB 2 – 1 – 2 – 1 maxValue = --------------------------------------------------------------------------internalSpindleClock (1) ( MSB + 1 ) Value is the decimal representation of the binary code programmed in one of the 6 bit registers. 1998 Nov 02 LSB –2 2 = -----------------------------------------------------internalSpindleClock We have to subtract (2LSB − 1) to obtain maxValue because all the bits from 0 to (LSB − 1) are set internally to zero by design. LSB 2 Step = --------------------------------------------------------------internalSpindleClock (3) (2) 18 Philips Semiconductors Product specification Disk drive spindle and VCM with servo controller Table 7 OM5193H Delays used for TIMER 1 DELAY LSB MSB BITS Blank 1 2 7 6 Blank 2 5 10 6 Watchdog 7 12 6 Start-up 14 19 6 Table 8 Numerical application with fCLOCK = 30 MHz internalSpindleClock 1⁄ DELAYS 16fCLOCK STEP Blank 1; note 1 1⁄ 2.13 µs MAX. 134 µs 1⁄ 32fCLOCK STEP MAX. 4.27 µs 269 µs 1⁄ 64fCLOCK STEP MAX. 8.53 µs 538 ms 128fCLOCK STEP MAX. 17.1 µs 1.08 ms Blank 2; note 2 17.1 µs 1.08 ms 34.1 µs 2.15 ms 68.3 µs 4.30 ms 137 µs 8.60 ms Watchdog; note 3 68.3 µs 4.30 ms 137 µs 8.60 ms 273 µs 17.2 ms 546 µs 34.4 ms Start-up; note 4 8.74 ms 550 ms 17.5 ms 1.101 s 35 ms 2.202 s 70 ms 4.404 s Notes 1. The first zero crossing of the flyback should occur within this time. 2. The real zero crossing should not come within this time after the second zero crossing of the flyback pulse. 3. The time should be larger than the duration of the flyback pulse measured when the motor stands still. 4. The actual zero crossing should occur within this time after the Blank 2 time has expired. 8.3.2 COMDELIM DELAY An internal up-counter called TIMER 2 is used to measure the time between two zero crossings and also to set the maximum commutation delay through Comdelim delay. handbook, full pagewidth 12 11 10 9 8 7 6 5 4 3 2 1 0 Comdelim MGL482 Fig.9 Up-counter TIMER 2. 1998 Nov 02 19 Philips Semiconductors Product specification Disk drive spindle and VCM with servo controller OM5193H Comdelim is the maximum value that can be reached by TIMER 2. So, this is the maximum time between 2 zero crossings (∆Zc). The maximum commutation delay (Comdelim delay) is then half this value. The actual delay will be: ∆Zc = value × step + Offset (4) ∆Zc ComdelimDelay = ----------2 (5) Value is the decimal representation of the binary code programmed in the 11-bit register. LSB 2 Step = --------------------------------------------------------------internalSpindleClock (6) 3 Offset = --------------------------------------------------------------internalSpindleClock (7) (we have to add this offset because bits 0 and 1 are set internally to logic 1 by design). ( MSB + 1 ) –1 2 maximum∆Zc = --------------------------------------------------------------internalSpindleClock (8) ( MSB ) 1 2 – --2 maximumComdelimDelay = --------------------------------------------------------------internalSpindleClock Table 9 (9) Delay used for TIMER 2 DELAY LSB MSB BITS Comdelim 2 12 11 Table 10 Numerical application with fCLOCK = 30 MHz CLOCKOUT/PRESCALER 1⁄ DELAYS 1⁄ 16fCLOCK 1⁄ 32fCLOCK 1⁄ 64fCLOCK 128fCLOCK STEP OFFSET MAX. STEP OFFSET MAX. STEP OFFSET MAX. STEP OFFSET MAX. (µs) (µs) (ms) (µs) (µs) (ms) (µs) (µs) (ms) (µs) (µs) (ms) ∆Zc 2.13 1.6 4.37 4.27 3.2 8.74 8.53 6.4 17.48 17.1 12.8 35 Comdelim 1.07 delay 0.8 2.18 2.13 1.6 4.37 4.27 3.2 8.74 6.4 17.48 8.53 The commutation delay counter, which starts counting at a zero crossing, has two operating modes: • In the adaptive mode, the next zero crossing is detected before the commutation delay counter has reached its programmed value. In this mode, the next commutation will occur at the measured tZcross divided by 2 after the last zero crossing. • In the forced mode, the next zero crossing is detected after the commutation delay counter reaches its programmed value. In this mode, the counter is stopped and the commutation logic block waits until the next zero crossing occurs. After it occurs, the next commutation will be forced at the programmed commutation delay divided by 2. 1998 Nov 02 20 Philips Semiconductors Product specification Disk drive spindle and VCM with servo controller 8.4 OM5193H Channels 0 and 1 can be used as external inputs by deactivating the 2 stand-alone op-amps A1 and A2 (op-amps are put in sleep mode), that means by putting register#0 (9) at logic 1. 10-bit ADC with 7 analog inputs The ADC is a signed 10-bit converter which uses the successive approximation conversion technique. The overall accuracy is 2% absolute error not including contribution of the reference voltage and guaranteed monotonicity. 8.4.1 The ADC does not include input filtering. If this is required in the application then it must be implemented externally. 8.4.2 INPUT CHANNELS INPUT RANGES Two analog input ranges are possible: either between 1.5 and 3.5 V or between 0 and 5 V. The input range is selected with register#0 (6): 7 analog input channels can be sampled and converted: • Channel 0: conversion of the op-amp A2 output • Channel 1: conversion of the op-amp A1 output • Register#0 (6) = 0: means input analog value between 1.5 and 3.5 V • Channel 2: conversion of the VCM sense amplifier output • Register#0 (6) = 1: means input analog value between 0 and 5 V. • Channel 3: conversion of an analog external signal • Channel 4: conversion of the temperature monitor + temperature shutdown signal • Channel 5: conversion of an analog external signal • Channel 6: conversion of an internal signal, controlling analog supply voltage over two ranges. Table 11 Input analog voltage and corresponding output code BIT MIN. OUTPUT = 200H MIDDLE OUTPUT = 000H MAX. OUTPUT = 1FFH register#0 (6) = 0 minimum input value = 1.5 V middle input value = 2.5 V maximum input value = 3.5 V register#0 (6) = 1 minimum input value = 0 V middle input value = 2.5 V maximum input value = 5 V 8.4.3 • Auto conversion on the same channel. CONVERSION MODES This input channel automatic incrementation option can be deactivated by setting register#0 (8) to logic 0 with register#0 (7) at logic 1. So the behaviour of the ADC is the same as explained above, except that all the conversions are made on the channel specified by the last write access on register#0. Three different conversion modes are possible depending on the states of register#0 (7) and register#0 (8): • Auto conversion and input channel auto incrementation mode. This mode is obtained with register#0 (7) = 1 and register#0 (8) = 1. The conversion sequence works as follows: the first A/D conversion is started by writing to serial port register#0. The address of the channel is decoded from the three LSBs in register#0 [2 to 0]. Then the OM5193H selects the addressed analog channel, samples and holds the analog input and starts the analog to digital conversion. The conversion result is obtained by reading the serial port register#0. Register#0 (10) provides the status of the conversion: it is set to 0 as long as the conversion is running and indicates that the low 10 bits of register#0 are invalid. Register#0 (10) going HIGH means the conversion is complete and guarantees the validity of the data in register#0 [9 to 0]. 1998 Nov 02 • Single conversion mode. The automatic conversion mode can also be deactivated by setting register#0 (7) to logic 0. In this mode, a write access on register#0 will start a conversion on the specified channel and a read access will not launch any other conversion. 21 Philips Semiconductors Product specification Disk drive spindle and VCM with servo controller 8.4.4 OM5193H PROGRAMMING REGISTER#0 Table 12 Writing register#0 BIT DEFAULT VALUES NAME DESCRIPTION 0 ADC MUX address; note 1 ADC MUX address 0 1 ADC MUX address 1 2 ADC MUX address 2 3 not used 4 not used should be at logic 0 under normal operating conditions 5 0 testMode_N dedicated for test purposes of the DAC in ADC or DAC mode; should be at logic 0 under normal operating conditions 6 0 rangeSelect selects the analog input range of the ADC: 0 = range 1.5 to 3.5 V 1 = range 0 to 5 V 7 0 autoConvSelect selects the automatic conversion option; see details in Table 13 8 0 incrementChannel selects the automatic channel increment option; see details in Table 13 9 0 opampSelect_N selects the stand-alone op-amps: 0 = op-amps activated 1 = op-amps deactivated 10 not used 11 not used Note 1. Possible addresses: a) ADC MUX address = 000: channel 0 selected; b) ADC MUX address = 001: channel 1 selected; c) ADC MUX address = 010: channel 2 selected; d) ADC MUX address = 011: channel 3 selected; e) ADC MUX address = 100: channel 4 selected; f) ADC MUX address = 101: channel 5 selected; g) ADC MUX address = 110: channel 6 selected; h) ADC MUX address = 111 is an illegal address. No analog input will be selected if a conversion is asked in this channel and the ADC will convert a random analog value. For a correct initialization of the converter just after power up, when POR is HIGH (before using the ADC or the DAC), the register#0 has to be programmed as follows: write 020H and then write 000H. A read of register#0 between the 2 write accesses is not necessary. 1998 Nov 02 22 Philips Semiconductors Product specification Disk drive spindle and VCM with servo controller OM5193H Table 13 Truth table for bits 7 and 8 on register#0 in write mode; conversion mode options; note 1 autoConvSelect REGISTER#0 (7) incrementChannel REGISTER#0 (8) 0 0 Default state: no auto channel incrementation, no A/D conversion started automatically after each read of the result. 1 0 Starts automatically an A/D conversion on the same channel (no channel incrementation) after each read of the result. 1 1 Starts automatically an A/D conversion on the next channel (increment the channel by 1) after each read of the result. 0 1 No auto channel incrementation, no A/D conversion started automatically after each read of the result (similar to the default state ‘00’). DESCRIPTION Note 1. The autoConvSelect bit has priority over the incrementChannel bit. 8.4.5 CONVERTER CLOCK FREQUENCY VALUES The ADC internal clock named converterClock can have two different frequency values by programming register#6 (11) (bit highClock_N): Register#6 (11) = 1: means converterClock = Master clock (fCLOCK) divided by 8 (clockDivider = 8) Register#6 (11) = 0: means converterClock = Master clock (fCLOCK) divided by 4 (clockDivider = 4) 13 × clockDivider conversionTime = --------------------------------------------f CLOCK (10) Table 14 Numerical application MASTER CLOCK = 10 MHz MASTER CLOCK = 20 MHz MASTER CLOCK = 30 MHz TIME DIVISION BY 8 DIVISION BY 4 DIVISION BY 8 DIVISION BY 4 DIVISION BY 8 DIVISION BY 4 Conversion time 10.4 µs 5.2 µs 5.2 µs 2.6 µs 3.4 µs 1.7 µs 8.5 10-bit VCM DAC The VCM DAC is a signed 10-bit digital-to-analog convertor. It will start the conversion when register#2 is written. The lowest 10 bits contain the value to be converted. Table 15 Input code and corresponding output analog voltage INPUT CODE OUTPUT VOLTAGE 200H 1.5 V 000H 2.5 V 1FFH 3.5 V The overall accuracy is 2% absolute error not including the contribution of the reference voltage and guaranteed monotonicity. 1998 Nov 02 23 Philips Semiconductors Product specification Disk drive spindle and VCM with servo controller 8.6 OM5193H It is controlled by writing to serial port register#1 (9); bit seek/trackfw: Reference voltage Vref2V5 is a 2.5 V bandgap reference used as the reference voltage for the VCM circuit. Stable voltages of 1.5 and 3.5 V are generated from the 2.5 V reference and used as reference voltages for the VCM DAC and for the ADC. The 1.5 and 3.5 V voltages are only available inside the IC and are not connected to external pins. Register#1 (9) = 0: means input SEEKSELECT is selected and connected to VCMIN Register#1 (9) = 1: means input TRACKFWSELECT is selected and connected to VCMIN. 8.9 8.7 Stand-alone op-amps The charge pump voltage circuit (voltage doubler) generates a power supply voltage higher than VDDA2 (12 V) power supply. This voltage is used to: This block is composed of two low-offset stand-alone op-amps (A1 and A2) with outputs connected to the ADC channels 0 and 1. • Drive the upper N-channel FETs of the power stages • Drive an optional external FET (see Section 8.18) The stand-alone op-amps can be deactivated if they are not used in the application. When deactivated, they are put in sleep mode and outputs are in high-impedance. In that case, ADC channels 0 and 1 can be used as input signals. The op-amps are controlled by writing to the serial port on register#0 (9); bit opampSelect_N: • Set a voltage independent of the power supply and temperature for the functions BRAKEPOWER and BRAKEDELAY. Two external capacitors are used to generate the higher voltage on pin CAPY. The capacitor between BSTCP1 and BSTCP2 is charged and discharged with a frequency, which is a function of the charge pump output current and an internal oscillator frequency. The voltage on pin CAPY is typically 19.2 V. Figure 10 illustrates the charge pump block diagram. Register#0 (9) = 0: means the op-amps are selected and put in normal mode Register#0 (9) = 1: means the op-amps are not selected and put in sleep mode. 8.8 Charge pump voltage Analog switch This block is composed of a 2 input analog multiplexer used to select the seek mode or the track-following mode. handbook, full pagewidth VDDA2 CAPY BSTCP2 CCAPX COMPARATOR OSCILLATOR 200 kHz BSTCP1 CCAPY GNDS reference MGM979 Fig.10 Charge pump voltage generator. 1998 Nov 02 24 Philips Semiconductors Product specification Disk drive spindle and VCM with servo controller 8.10 OM5193H RSLEW is in Ω and SR in V/s. Without a resistor, SR is typical 0.15 V/µs and with a resistor of 90 kΩ, the typical value is 0.5 V/µs. The maximum slew rate depends on the limit for stability of the spindle loop. Spindle driver The spindle block contains both the low-side and high-side drivers configured as a H-bridge for a 3-phase DC brushless, sensorless motor. In each of the six possible states, two outputs are active, one sourcing current and one sinking current. The third output presents a high impedance to the motor which enables measurement of the BEMF in the corresponding motor coil. The BEMF zero crossing comparator outputs (xCROSS) are processed by the commutation logic circuit to calculate the correct moment for the next commutation, so the change to the next output state. The commutation logic circuit provides proper commutation commands for the spindle drivers thus ensuring the rotation of the motor. The commutation logic circuit also controls the spindle motor driver during start-up (no reverse rotation). The spindle current ISPRUN is sensed by an external resistor RSPSENSE connected to a sense amplifier providing the internal signal SPOUT. The gain Gv of the sense amplifier is typical 10. V SPOUT = G v × R SPSENSE × I SPRUN The transconductance gain of the spindle loop is given by the following equation: V SPSENSEH I SPRUN 1 (13) g s = -------------------- = --------------------------- × ------------------------------V SPOUT R SPSENSE V SPOUT 1 = ----------------------------------------R SPSENSE × G v The spindle should be set in the high-impedance mode (see Table 16) between the sleep mode (brake-after-park mode) and the normal running mode. Register#1 should be programmed as follows: The control amplifier differentiates the control signal on pin SPCC from the signal SPOUT. A 0.25 V offset is subtracted from the input voltage on pin SPCC to ensure that the current command includes the zero current. With the spindle loop closed, the voltage SPOUT is given by the following equation: V SPOUT = V SPCC – V OFFSET (14) • Write 00x001x11010 to activate the manual mode during typically less than 1 ms (time discharge of low-side power FETs) • Write 00x001x01xxx to activate the automatic running mode. The ‘x’ states concern the seek or track-following mode register#1 (9) and the spindle prescaler value used on the application register#1 (5). Their states are specific to the application needs. The control signal VCONTROL provided by the control amplifier is then applied to the spindle drivers. The spindle drivers control the voltage on the gate of the low-side power drivers. One of the three high-side drivers is fully on. The charge pump voltage is applied to the gate. One of the three low-side drivers is controlled by the control amplifier. Purpose is to adjust the voltage on the gate to adjust the total output resistance Rds(on) at the specified running current. The ZCROSS signal is a combination of the xCROSS signals. It can be used by the microcontroller as a tacho information for the spindle speed control loop. The external SPCC signal is used to control the spindle current. The external SPCCOUT capacitor is connected to the spindle current control amplifier to ensure the stability of the spindle current control loop. The current in the spindle loop is given by the following formula: (15) I SPRUN = g s × ( V SPCC – V OFFSET ) The short-circuit brake mode is entered if power-down, thermal shutdown or sleep mode occurs. With RSPSENSE = 0.25 Ω: I SPRUN = 0.4 × ( V SPCC – 0.25 ) A Miller network is used to obtain soft switching on the low-side and high-side drivers. The slew rate of the driver stage that is switched-off can be controlled by means of a resistor connected to the pins SLEW and GND. The slew rate is calculated using the following equation: 2.55 3 µA + ------------------------------------------------------4 × ( 1 kΩ + R SLEW ) SR = --------------------------------------------------------------------------(11) 20 pF 1998 Nov 02 (12) = G ×V v SPSENSEH The maximum start-up current is ISPRUN = 1.9 A with SPCC signal at 5 V. Figure 11 illustrates the spindle current control loop. 25 (16) Philips Semiconductors Product specification Disk drive spindle and VCM with servo controller handbook, full pagewidth OM5193H CLAMP VDDA2POWER external diode VUPPER MOTx VCONTROL PREDRIVER VLOWER MOTSENSE/ SPSENSEH RSPSENSE ISPRUN SENSE AMPLIFIER GNDS/ SPSENSEL SPOUT CONTROL AMPLIFIER 0.25 V OFFSET SPCC SPCCOUT MGM980 CSPCCOUT Fig.11 Spindle transconductance loop schematic. Table 16 and Fig.12 illustrate the relationship between the commutation signals and the associated output drivers and output comparators. Table 16 Input commutations to output drivers COMA COMB COMC MOTA MOTB MOTC STATE 0 0 0 LOW HIGH float 1 1 0 0 LOW float HIGH 2 1 1 0 float LOW HIGH 3 1 1 1 HIGH LOW float 4 0 1 1 HIGH float LOW 5 0 0 1 float HIGH LOW 6 F_L(1) F_L(1) SLEEP float float Spindle high-impedance 1 0 1 F_L(1) 0 1 0 float Note 1. F_L is for float-and-then-LOW (brake-after-park mode). 1998 Nov 02 26 Philips Semiconductors Product specification Disk drive spindle and VCM with servo controller OM5193H handbook, full pagewidth COMA 0 1 1 1 0 0 COMB 0 0 1 1 1 0 COMC 0 0 0 1 1 1 MOTA L L H H MOTB H MOTC L F F F H L H F F F L H L ACROSS BCROSS CCROSS ZCROSS MGM981 L = LOW. H = HIGH. F = Floating. Fig.12 Input commutations to output drivers. 8.11 VCM driver The VCM driver is a linear, class AB amplifier with both low-side and high-side drivers configured as an H-bridge. The zero-current reference voltage for the VCM loop is internally set at 2.5 V. The sense resistor RVCMSENSE enables the VCM current (IVCMRUN) to be measured through the sense amplifier. The gain Gv of the sense amplifier is typically 4. The output voltage (Vsout) on pin ADC[2]/SOUT is given by the following equation: V sout = G v × R VCMSENSE × I VCMRUN + V ref2V5 (17) = G v × ( V VCMSENSEH – V VCMSENSEL ) + V ref2V5 Figure 13 presents the VCM sense amplifier. 1998 Nov 02 27 Philips Semiconductors Product specification Disk drive spindle and VCM with servo controller OM5193H REF2V5 handbook, full pagewidth IVCMRUN 4R R VCMSENSEH ADC[2]/SOUT RVCMSENSE R VCMSENSEL NIVCM 4R MGM982 Fig.13 VCM sense amplifier. The error amplifier (see Fig.14) compares the DACOUT input command and the output signal Vsout of the sense amplifier to generate the control voltage of the power drivers. V sout – V ref2V5 G v × R VCMSENSE × I VCMRUN V ref2V5 – V DACOUT -------------------------------------------------- = --------------------------------------- = --------------------------------------------------------------------------Ri Ro Ro handbook, full pagewidth (18) REF2V5 IVCMRUN VCMSENSEH SENSE AMPLIFIER Ga RVCMSENSE ERROR AMPLIFIER to power drivers VCMSENSEL NIVCM VCMIN ADC[2]/SOUT Ro DACOUT MGM983 Ri Fig.14 VCM transconductance gain schematic. Finally, the transconductance gain of the VCM loop is given by the following equation: Ro I VCMRUN 1 g v = ------------------------------------------------- = ------- × --------------------------------------------R i G v × R VCMSENSE V ref2V5 – V DACOUT 1998 Nov 02 (19) 28 Philips Semiconductors Product specification Disk drive spindle and VCM with servo controller OM5193H The VCM loop gain is set through external resistors. The seek (high gain) or the track-following (low gain) mode is controlled with the serial bus. Purpose is to set the appropriate gain by selecting the Ri resistor through the low impedance analog 2 input switch. Ro handbook, full pagewidth VCMIN ADC[2]/SOUT (1) SEEKSELECT TRACKFWSELECT to VCM drivers (2) Ri(SEEK) Ri(TRACKFW) VCM switch DACOUT VCM DAC MGM984 (1) High gain. (2) Low gain. Fig.15 VCM selectable loop gain. 8.12 An RC network is connected to pin BRAKEDELAY. During the normal functioning, the voltage on the BRAKEDELAY pin is typically VBDC = 12.55 V. This value is independent of the power supply and the temperature. During park mode, the RC network discharges with a time constant τ. Park the VCM A VCM park sequence is initiated any time a power-down, a thermal shutdown and/or a sleep mode situation occurs. The fault signal (FAULT) initiates the VCM park sequence. This secure function is accomplished even in case of power loss. In this case, the energy provided by the rectified BEMF of the spindle motor coils is used to supply the park circuit and park the heads above a landing area. Otherwise, the energy is provided by the VDDA2 power supply through an external diode or power FET. The park mode is activated as long as the voltage on the BRAKEDELAY pin is greater than the internal brake delay threshold voltage VBDT of typically 2.2 V. The tBDT park time duration (or brake delay time duration) is set by the following equation: V BDC t BDT = τ × In ------------- (21) V BDT To accomplish this function, the spindle power stage is automatically set in a high-impedance mode. The NIVCM low-side power driver is fully on while the remaining power drivers of the VCM power stage are off. where τ The current flowing in the PARKVOLT resistor sets the voltage on the PARKVOLT pin. The voltage across the VCM load is internally regulated by the voltage on the PARKVOLT pin. An internal circuit clamps the voltage on PARKVOLT at 3VBE. Without resistor, the voltage on PARKVOLT is 3VBE. The park current Icoilpark is applied to the VCM coil. The Icoilpark park current is given by the following equation: V PARKVOLT I coilpark = -----------------------------------------------------------------------------------------(20) R VCMSENSE + R coil + R ds ( on ) ( sin k ) 1998 Nov 02 = C BRAKED × R BRAKED (22) CBRAKED and RBRAKED are respectively the capacitor and the resistor connected to the BRAKEDELAY pin. Typically, with CBRAKED = 330 nF and RBRAKED = 650 kΩ, tBDT = 400 ms. Figure 16 shows the equivalent park circuit. 29 Philips Semiconductors Product specification Disk drive spindle and VCM with servo controller handbook, full pagewidth OM5193H CLAMP VDDA2POWER external diode Icoilpark CCLAMP FAULT PARKVOLT GNDV RPARKVOLT IVCM ACTUATOR RCOIL NIVCM GNDVCM RVCMSENSE MGM985 Fig.16 Park circuit. 8.13 This function precharges the external RC compensation network. Precharge the VCM When the voltage on the BRAKEDELAY pin goes below the brake delay threshold voltage VBDT, the BRAKEDELAY pin is short-circuited to ground. While the brake mode is activated, the VCM outputs are precharged to VDDA1 − VBE while pin VCMIN is short-circuited to ground. 1998 Nov 02 The NIVCM low-side power driver is set off during VCM precharge. This is convenient for actuators with a magnetic latch. The park circuit is powered off during VCM precharge with the actuator latched. 30 Philips Semiconductors Product specification Disk drive spindle and VCM with servo controller OM5193H external diode handbook, full pagewidth VDDA2POWER VDDA1 CLAMP GND GND VCMIN GND BRAKEDELAY IVCM NIVCM GNDVCM GNDV ACTUATOR RVCMSENSE MGM986 Fig.17 Precharge circuit. 8.14 During normal operation, the voltage VBDC on the BRAKEPOWER pin is typically VBDC = 12.55 V. This value is independent of the power supply and the temperature. During the park sequence, the discharge of the BRAKEPOWER capacitor is set by an internal resistor, with or without an optional external resistor between BRAKEPOWER and BRAKEADJUST. The typical value of the internal resistor is 4 MΩ. Brake the motor A spindle brake sequence is initiated any time a power-down, a thermal shutdown and/or a sleep mode situation occurs. The fault signal activates the brake-after-park sequence. When the heads are parked, the motor has to be braked in order to guarantee heads reliability. During the brake sequence, the heads land on a dedicated area of the disk. The brake sequence is started when the voltage on BRAKEDELAY goes below the brake delay threshold voltage VBDT of 2.2 V. The gates of the three spindle low-side power drivers are charged by the energy stored in the BRAKEPOWER capacitor and thus braking the motor. The OM5193H integrates a highly efficient, low cost brake circuit. It is guaranteed to be functional in case of power loss and thermal shutdown with a short time brake duration thus minimizing friction of the heads on the landing zone. The OM5193H will stay in the brake-after-park mode until register#1 (3) bit run/stop is set to logic 1. The energy stored by an external capacitor connected to the BRAKEPOWER pin supplies the brake circuit during the brake-after-park sequence. The brake of the motor is accomplished by turning on the spindle low-side power components while high-side power drivers are off. This causes a short-circuit of the spindle motor coils and thus reversing the current and torque of the motor. 1998 Nov 02 31 Philips Semiconductors Product specification Disk drive spindle and VCM with servo controller handbook, full pagewidth OM5193H VDDA2POWER external diode BRAKEPOWER power-down CLAMP BRAKEADJH RBRAKEP (optional) GND MOTx CBRAKEP BRAKEDELAY MOTSENSE/ SPSENSEH CBRAKED RSPSENSE GNDS/SPSENSEL RBRAKED GNDV MGM987 Fig.18 Brake circuit. The typical value for the BRAKEPOWER capacitor is 1 µF. An optional resistance could be added between the BRAKEPOWER and BRAKEADJUST pins. The values of the capacitor and the resistor are depending on the application. This POR output remains HIGH until either the 5 or 12 V supplies drop below their voltage threshold, at which point the POR output becomes LOW. The CCPOR capacitor is charged with a typically 2.7 µA current. The voltage on CPOR is compared to the POR circuit voltage reference of 2.55 V. The tC time is set by the following equation: C CPOR × V PORREF t C = -----------------------------------------------(23) I CPOR Without resistor, the BRAKEADJH pin must be connected to the BRAKEPOWER pin. 8.15 Power-on reset The Power-On Reset (POR) circuit monitors the voltage level of both 5 and 12 V supply voltages as shown in Fig.19. where VPORREF = 2.55 V and ICPOR = 2.5 µA typically. The value of the tC time is set by the CCPOR capacitor value. The POR active LOW logic line is set HIGH following the 5 and 12 V supply voltage rise above a specified voltage threshold plus a hysteresis, and delayed by a time tC that is determined by the external CPOR capacitor. 1998 Nov 02 32 Philips Semiconductors Product specification Disk drive spindle and VCM with servo controller handbook, full pagewidth OM5193H MGM988 VDD Vhys threshold 0.8 V t POR tC tC t Fig.19 Power-on reset timing. The values of the 5 and 12 V supply threshold voltages can be adjusted by adding external bridge resistors respectively on the CHK5 and CHK12 pins. Internally, the CHK5 and CHK12 pins are designed as described in Fig.20. VDDA1 handbook, halfpage VDDA2 RH12 RH5 CHK5 CHK12 POWER-ON RESET RL12 RL5 GNDS MGM989 Fig.20 CHK5 and CHK12 pins. A glitch monitor prevents premature POR signals due to voltage spikes on power supplies. An external capacitor has to be connected to the CHK5 and CHK12 pins to filter the noise on CHK5 and CHK12 pins caused by spikes on the power supplies; see Fig.21. 1998 Nov 02 33 Philips Semiconductors Product specification Disk drive spindle and VCM with servo controller OM5193H handbook, full pagewidth VDD t CHK signal (with capacitor) ∆V Vref t minimum pulse time = 10 µs POR tC MGM990 t Fig.21 Glitch detector timing. During a power-down situation, the POR circuit must not only generate an output POR signal, but must also activate the brake-after-park sequence. In doing so, the VCM driver draws power from the BEMF of the motor coils through the clamp line during spin-down, and uses this power to bias the VCM against one of the hard stops of the actuator. This prevents the heads from landing on data zones. POR is considered as an asynchronous signal for the digital part and default values are loaded when POR goes HIGH. Default values for register#0 and register#1 are shown in Section “Commutation and sleep mode” (see also Table 5) and in Section “10-bit ADC with 7 analog inputs” (see also Table 12). If default values have to be loaded when POR is LOW, at least one clock pulse is needed to load the registers with default values. POR also controls the digital part of the chip. When POR is LOW, the chip is automatically set in the brake-after-park mode. When POR goes HIGH, the digital section is initialized forcing the brake-after-park sequence until a normal start is asked (by writing on register#1). 1998 Nov 02 34 Philips Semiconductors Product specification Disk drive spindle and VCM with servo controller handbook, full pagewidth OM5193H commutation logic controls the brake-after-park mode until a spindle start is asked. POR circuit controls the brake-after-park mode POR default values are automatically loaded when POR goes HIGH if there is no CLOCK during LOW state. CLOCK If there is a CLOCK signal when POR signal is LOW, default register values will be loaded on the rising edge. MGM991 Fig.22 Initialization of the registers when POR is LOW. 8.16 During the normal operation, the signal Vtemp provides a voltage as a function of the chip temperature. The equation of the voltage versus the temperature is the following: Thermal monitor and shutdown The OM5193H is provided with both a temperature monitor and a thermal shutdown circuit. The device is protected against over-temperature by the thermal shutdown circuit. When the temperature of the chip exceeds 150 °C, the device is automatically set to the brake-after-park mode. Furthermore, the voltage Vtemp on pin ADC[4]/TEMP goes HIGH. It remains in this mode until the temperature goes below the thermal shutdown temperature minus typically 10 °C. handbook, full pagewidth V temp = 7.05 × 10 –3 × T j ( °C ) + 1.995 Figure 23 presents the voltage Vtemp on pin ADC[4]/TEMP during normal operation and the voltage on thermal shutdown with hysteresis. MGM992 Vtemp (V) VDDA1 3.052 2.982 1.995 0 140 150 Fig.23 Vtemp behaviour versus temperature. 1998 Nov 02 (24) 35 Tj (°C) Philips Semiconductors Product specification Disk drive spindle and VCM with servo controller OM5193H The pin ADC[4]/TEMP is internally connected to channel 4 of the ADC. The data can be read and processed by the microcontroller to control the temperature of the device during the spindle start-up sequence and normal operation and to create an early high-temperature warning. 8.17 The gate is connected to the SWITCHGATE pin. During normal operation, the voltage on the SWITCHGATE pin is about 19 V and the isolation transistor is conducting. When the brake-after-park sequence is activated, the gate is short-circuited to ground. The recirculation diode is used to isolate the power supply from the power stages. Power supply isolation 8.18 In case of power-down, the brake-after-park sequence must be supplied from the motor BEMF and the energy stored in the CLAMP capacitor. When the supply voltage for the spindle and the VCM is directly connected to the VDDA2, the energy from the motor BEMF and the CLAMP capacitor will be lost in the V supply system instead that it is used for brake-after-park sequence. Therefore, the motor and VCM supply must be isolated from the VDDA2. This can be done by means of a diode or a power FET between VDDA2 and the power supply line for the spindle and the VCM. 8.17.1 The OM5193H uses a dedicated leadframe to effectively drain the heat from the chip. Therefore 18 pins are connected to the leadframe and called HEATSINK. These pins must be short-circuited together and connected to a large dissipating copper area on the printed-circuit board. The copper area has to be as thick as possible. The thermal resistance can also be decreased by placing the device close to a mounting screw used to fasten the printed-circuit board to the bare casting assembly. Paths used to connect the power stages to the external components, ground and VDDA2 must be as large as possible to guarantee a minimal extra thermal resistance and a higher current capability. EXTERNAL ISOLATION DIODE A diode can be used when the motor current and the VCM current are low and the voltage drop over the diode does not limit the supply voltage range of the motor and the VCM. The diode can be either a normal diode or a Schottky diode. The type and electrical properties of the diode are determined by the load characteristics. 8.17.2 EXTERNAL POWER FET For higher current applications, the diode can be replaced by a N-channel FET. The OM5193H contains an output to drive this N-channel FET. To prevent the brake and park currents from flowing back to VDDA2, the source of the FET must be connected to VDDA2 and the drain to the CLAMP line. In this case, the back-gate diode of the FET is reverse biased. 1998 Nov 02 Thermal behaviour 36 Philips Semiconductors Product specification Disk drive spindle and VCM with servo controller OM5193H 9 LIMITING VALUES In accordance with the Absolute Maximum System (IEC 134); note 1 SYMBOL PARAMETER MIN. MAX. UNIT VDDA1 5 V analog supply voltage −0.3 +6 V VDDD 5 V digital supply voltage −0.3 +6 V VDDA2 12 V analog supply voltage −0.3 +13.5 V output voltage −0.3 +18 V output voltage −0.7 +18 V VUB voltage on pins BSTCP1, BSTCP2, CAPY and SWITCHGATE −0.3 +20.5 V Ves ESD Human Body Model VDDA2POWER VMOTA VMOTB VMOTC VNIVCM VIVCM − 2000 V except for BRAKEDELAY − 500 V except for BRAKEPOWER − 1500 V ESD Machine Model − 200 V Tamb operating ambient temperature 0 70 °C Tstg storage temperature −55 +125 °C Tj junction temperature − 150 °C Note 1. Stressing beyond these levels may cause permanent damage to the device. This is a stress rating only and functional operation of the device under this condition is not implied. a) OVS: one pin stressed by sample; square pulse time duration = 1 s, maximum current = 1 A. b) ESD Human Body Model: JEDEC specification EIA/JESD22-A114 February 1996. c) ESD Machine Model: JEDEC specification JC-14.1 July 07 1995. 10 HANDLING Inputs and outputs are protected against electrostatic discharge in normal handling. However, to be totally safe, it is desirable to take normal precautions appropriate to handling MOS devices. 11 THERMAL CHARACTERISTICS SYMBOL Rth(j-a) PARAMETER CONDITIONS thermal resistance from junction to ambient note 1 VALUE UNIT 26 K/W Note 1. This is obtained with a thermally enhanced printed-circuit board tied to the bare casting assembly. 1998 Nov 02 37 Philips Semiconductors Product specification Disk drive spindle and VCM with servo controller OM5193H 12 CHARACTERISTICS SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Supply; note 1 VDDA1 5 V analog supply voltage 4.5 5.0 5.5 V VDDD 5 V digital supply voltage 4.5 5.0 5.5 V VDDA2 12 V analog supply voltage 10.8 12.0 13.2 V VDDA2POWER 12 V analog supply voltage 10.8 12.0 13.2 V IDDD 5 V supply current normal mode − 40 70 mA stand-alone op-amps deactivated − 25 55 mA sleep mode − 1 3 mA normal mode − 15 25 mA sleep mode − 1.5 5 mA VPWRBIAS = 20.5 V − − 200 nA − 10 − bits register#6 (11) = 0 − − 104 clock cycles register#6 (11) = 1 − − 52 clock cycles register#0 (6) = 0; Vref2V5 = 2.5 V 1.5 − 3.5 V register#0 (6) = 1; Vref2V5 = 2.5 V 0 − 5 V 1.5 to 3.5 V range −5 − +5 LSB 0 to 5 V range −7 − +7 LSB 1.5 to 3.5 V range −40 − +40 mV 0 to 5 V range −80 − +80 mV −40 − +40 mV −80 − +80 mV IDDA2 12 V supply current POWER BIAS VOLTAGE IL(PWRBIAS) power bias leakage current Servo control; note 2 7 CHANNEL 10-BIT ADC RESADC resolution note 3 tCONV conversion time including the sample and hold time; relative to CLOCK signal VI OFFMID Ei(max) Ei(min) input voltage offsets for middle code input error for maximum code analog input at Vref2V5 relative to 1.4VI at 00H input error for minimum relative to 0.6VI at 00H code 1.5 to 3.5 V range 0 to 5 V range 1998 Nov 02 38 Philips Semiconductors Product specification Disk drive spindle and VCM with servo controller SYMBOL INL PARAMETER end-point integral nonlinearity OM5193H CONDITIONS MIN. TYP. MAX. UNIT note 4 1.5 to 3.5 V range −4 − +4 LSB 0 to 5 V range −8 − +8 LSB −1 − +1 LSB − +190 LSB DNL differential non-linearity monotonic; no missing codes; for both ranges; note 4 CODEC6 code value on channel 6 1⁄ EC6 code error on channel 6 represents the difference between an external 1⁄2VDDA1 conversion result and a conversion made in channel 6 −30 − 0 LSB Etot absolute error includes integral non-linearity, offset and gain error − − 2 % Ri input resistance 0 to 5 V range; notes 5 and 6 40 50 60 kΩ Ci input capacitance 1.5 to 3.5 V range; note 6 − 20 25 pF TC temperature coefficient combined temperature coefficient of gain error, integral non-linearity and offset T > 25 °C 0 − 0.05 LSB/°C T < 25 °C −0.05 − 0 LSB/°C 2VDDA1 (internal analog −190 value) is sampled and converted in this channel CCMATCH channel-to-channel matching the same analog voltage is applied in each channel; note 6 − − 1 LSB αct crosstalk attenuation fi = 1 MHz; note 7 66 − − dB PSRR power supply rejection ratio note 6 50 − − dB − 10 − bits − − 2.0 µs 0.6Vref 2.5 (±1.0) 1.4Vref V 10-BIT VCM DAC RESDAC resolution tst settling time DRDAC dynamic range VOO(MID) offsets for middle code measured at code 00H: relative to Vref2V5 −10 − +10 mV Eo(max) maximum output error relative to 1.4VO at code 00H −40 − +40 mV Eo(min) minimum output error relative to 0.6VO at code 00H −40 − +40 mV 1998 Nov 02 to within 0.5 LSB 39 Philips Semiconductors Product specification Disk drive spindle and VCM with servo controller SYMBOL PARAMETER OM5193H CONDITIONS MIN. TYP. MAX. UNIT VOO(max) maximum output offset voltage relative to Vref3V5(meas); only tested on wafer −10 − +10 mV VOO(min) minimum output offset voltage relative to Vref1V5(meas); only tested on wafer −10 − +10 mV INL end-point integral non-linearity note 4 −2 − +2 LSB DNL differential non-linearity guaranteed monotonic; note 4 −1 − +1 LSB Etot absolute error includes integral non-linearity, offset and gain error − − 2 % TC temperature coefficient combined temperature coefficient of gain error, integral non-linearity and offset T > 25 °C 0 − 100 mV/°C T < 25 °C −100 − 0 mV/°C note 6 50 − − dB PSRR power supply rejection ratio REFERENCE VOLTAGES Vref1V5 1.5 V reference output voltage 0.6Vref2V5(meas); only tested on wafer 1.414 1.504 1.596 V Vref2V5 2.5 V reference output voltage −1 mA ≤ Iref ≤ 5 mA 2.397 2.507 2.617 V Vref3V5 3.5 V reference output voltage 1.4Vref2V5(meas); only tested on wafer 3.332 3.510 3.690 V G1V5 value of the gain used to generate Vref1V5 Vref1V5(meas) divided by Vref2V5(meas); only tested on wafer 0.59 0.6 0.61 − G3V5 value of the gain used to generate Vref3V5 Vref3V5(meas) divided by Vref2V5(meas); only tested on wafer 1.39 1.4 1.41 − TC temperature coefficient note 6 − − 200 µV/°C PSRR power supply rejection ratio note 6 − − 50 dB CL load capacitance note 6 0.01 − 0.1 nF ANALOG SWITCH tsw switching time note 6 − − 0.5 µs Rds(on) total output resistance (source + sink + isolation) switch closed; value at 25 °C and nominal supply voltages − − 100 Ω TC temperature coefficient T > 25 °C − − 0.3 %/°C T < 25 °C − − −0.3 %/°C IL off leakage current − − 100 nA 1998 Nov 02 40 Philips Semiconductors Product specification Disk drive spindle and VCM with servo controller SYMBOL PARAMETER OM5193H CONDITIONS MIN. TYP. MAX. UNIT STAND-ALONE OP-AMPS VI input voltage 1.4 − VDDA1 − 0.5 V Ii(bias) input bias current − − 1 µA VIO input offset voltage relative to Vref2V5 value −10 − +10 mV IIO input offset current note 6 − − 100 nA VO output voltage RL = 10 kΩ to Vref2V5 level 0.9 − VDDA1 − 0.5 V SR slew rate RL = 10 kΩ; CL = 20 pF 5 − − V/µs GB gain bandwidth product 0.75 1.0 − MHz Gv(ol) open-loop voltage gain f = 1 kHz; RL = 10 kΩ; note 6 50 60 − dB SVRR supply voltage ripple rejection f = 100 kHz; RL = 10 kΩ; CL < 20pF; note 6 60 70 − dB tON power-on time after sleep mode − − 1 µs CMRR common mode rejection ratio note 6 60 70 − dB bidirectional pins capacitance CMOS level, high-drive, output stage, 8 mA 3-state − 6 − pF DIGITAL PINS CBIPIN input capacitance maximum output load − − 100 pF CINPIN input pins capacitance CMOS level, high-drive, protection to VDDD and DGND − 5 − pF COUTPIN output pins capacitance 2 mA push-pull − − 25 pF VIH HIGH-level input voltage 3 − − V VIL LOW-level input voltage − − 0.8 V VOH HIGH-level output voltage IO = 2 mA VDDA1 − 0.5 − − V VOL LOW-level output voltage IO = 2 mA − 0.5 V − Motor control; note 1 GENERAL Thermal protection: thermal shutdown Tsw(off) switch-off temperature note 8 143 150 157 °C hysT thermal hysteresis note 6 − 10 15 °C 1998 Nov 02 41 Philips Semiconductors Product specification Disk drive spindle and VCM with servo controller SYMBOL PARAMETER OM5193H CONDITIONS MIN. TYP. MAX. UNIT Thermal monitor VO(LT) output voltage at low temperature Tj = 25 °C − 2.171 − V VO(HT) output voltage at high temperature Tj = 150 °C − 3.052 − V GT temperature monitor thermal gain note 6 6.8 7.05 7.30 mV/°C Charge pump generator: CAPY, BSTCP1 and BSTCP2 VCP charge pump voltage running mode 18.2 19.2 20.2 V VSWITCHGATE switchgate voltage running mode 17.6 19 20 V 9.05 9.40 9.75 V 80 115 150 mV POWER-ON RESET Power monitor comparators: CHK12 and CHK5 Vth(12) 12 V threshold voltage Vhys(12) hysteresis on VDDA2 Vth(5) 5 V threshold voltage Vhys(5) hysteresis on VDDD RL12 low internal bridge resistor on CHK12 RH12 CHK12 open-circuit CHK5 open-circuit 4.2 4.3 4.4 V 35 50 70 mV CHK12 short-circuited to 2.55 V 20 27.5 35 kΩ high internal bridge resistor on CHK12 CHK12 short-circuited to ground 60 80 100 kΩ RL5 low internal bridge resistor on CHK5 CHK5 short-circuited to VDDA1 37 46 55 kΩ RH5 high internal bridge resistor on CHK5 CHK5 short-circuited to ground 24 32 40 kΩ Power-on reset generator: CPOR and POR VOL LOW-level output voltage IOL = 1 mA − − 0.5 V Rpu pull-up resistor POR short-circuited to ground 10 15 20 kΩ ICPOR(source) source current for CPOR −3.5 −2.5 −1.5 µA Vth(CPOR) CPOR threshold voltage − 2.55 − V functional test SPINDLE DRIVER BEMF comparators: ACROSS, BCROSS and CCROSS VI(CM) common mode input voltage running mode −0.7 − VDDA2 + 0.7 V II(bias) input bias current note 6 −10 − 0 1998 Nov 02 42 µA Philips Semiconductors Product specification Disk drive spindle and VCM with servo controller SYMBOL PARAMETER OM5193H CONDITIONS MIN. TYP. MAX. UNIT Vsw(comp) comparator switching level only tested on wafer −20 − +20 mV Vsw(tol) tolerance on the comparator switching level only tested on wafer −3 − +3 mV ∆Vsw variation in comparator note 6 switching levels for one IC −4.2 − +4.2 mV Vi(hys) input voltage hysteresis note 6 − 0.5 − mV VOL LOW-level output voltage sink current = −40 µA; only tested on wafer − − 0.45 V VOH HIGH-level output voltage source current = 40 µA; only tested on wafer VDDA1 − 0.5 − − V IO = 1.0 A at Tamb = 25 °C − 0.36 0.45 Ω IO = 1.0 A at Tamb = 125 °C − 0.56 0.65 Ω IO = 1.0 A at Tamb = 25 °C − 0.24 0.35 Ω IO = 1.0 A at Tamb = 125 °C − 0.44 0.55 Ω Output drivers: MOTA, MOTB and MOTC Rds(on)(source) Rds(on)(sink) high-side driver output resistance low-side driver output resistance VSLEW slew rate voltage ISLEW = 20 µA − 2.55 − V SR slew rate open-loop; note 9 0.09 − 0.23 V/µs ISLEW = 30 µA; note 9 0.32 − 0.87 V/µs ISPRUN spindle current control VSPCC = 1.25 V; RSENSE = 0.25 Ω 380 400 420 mA VCLP overvoltage protection circuit ISVDMOS > 10 mA − 15.8 − V IL(SP) spindle power stage leakage current − − 1 mA Sense amplifier: SPSENSEL and SPSENSEH II input current on MOTSENSE only tested on wafer 10 − 10 µA VIO input offset voltage note 6 − 3 − mV Gv sense amplifier gain only tested on wafer 9.8 10 10.2 V/V TC temperature coefficient of sense amplifier gain note 6 − 200 − ppm/°C only tested on wafer; Tamb = 25 °C 230 250 270 mV Control amplifier: SPCC and SPCCOUT VSPCC0 1998 Nov 02 spindle zero-current reference 43 Philips Semiconductors Product specification Disk drive spindle and VCM with servo controller SYMBOL fcut(ol) PARAMETER open-loop cut-off frequency at 0 dB OM5193H CONDITIONS MIN. CSPCCOUT minimum − value = 10 nF for stability when closed loop; note 10 TYP. MAX. UNIT − 3 kHz − +1 µA Logic decoder: COMA, COMB and COMC ILI input leakage current VI = 0 to VDD; only tested −1 on wafer VOICE COIL MOTOR DRIVER VCM preamplifiers: VCMIN and REF2V5 II input current on VCMIN − 0 µA VIO input offset voltage relative to Vref2V5 for zero −10 output current − +10 mV fG unity gain frequency note 6 2 3.5 − MHz 1 VCM driver amplifiers tCOD cross-over distortion delay note 6 − 3 5 µs SRVCM VCM slew rate CL = 10 pF; note 6 − 1 − V/µs note 6 MHz fG unity gain frequency Gv(SD) slave driver voltage gain Rds(on)(source) high-side driver output resistance Rds(on)(sink) low-side driver output resistance VCLP overvoltage protection circuit ILI(VCM) VCM power stage leakage current 1.5 − − 1.05 1.15 1.25 IO = 1.0 A at Tamb = 25 °C − 0.45 0.55 Ω IO = 1.0 A at Tamb = 125 °C − 0.65 0.75 Ω IO = 1.0 A at Tamb = 25 °C − 0.35 0.45 Ω IO = 1.0 A at Tamb = 125 °C − 0.55 0.65 Ω ISVDMOS > 10 mA − 15.1 − V − − 1 mA −0.7 − VDDA2 + 0.7 V −100 − +250 VCM sense amplifier: VCMSENSEL and VCMSENSEH VI input voltage II input current Vref2V5 = 2.5 V Gv sense amplifier gain under all conditions 3.8 4.0 4.2 IO(sink) output sink current Tj = 0 to 140 °C; note 11 600 − − µA IO(source) output source current Tj = 0 to 140 °C; note 12 − − −500 µA VOO output offset voltage VVCMSENSEH = VVCMSENSEL = 6 V −15 10 +35 mV GB gain-bandwidth product note 6 5 8 − MHz 1998 Nov 02 44 µA Philips Semiconductors Product specification Disk drive spindle and VCM with servo controller SYMBOL SR PARAMETER slew rate OM5193H CONDITIONS RL = 10 kΩ; CL = 60 pF; note 6 MIN. 1.7 TYP. MAX. UNIT − 5.3 V/µs Gv(ol) open-loop voltage gain note 6 75 80 − dB SVRR supply voltage ripple rejection f = 100 Hz; RL = 10 kΩ; CL < 60 pF; note 6 90 100 − dB CMRR common mode rejection ratio note 6 90 − − dB BRAKE-AFTER-PARK DELAY MODE Park and brake power VNMBP normal mode voltage on brake power 12.0 12.55 12.9 V VNMBD normal mode voltage on brake delay 12.0 12.55 12.9 V IBPR brake power park current VBRAKEPOWER = 12 V; VBRAKEDELAY > VBDT 1 3 5 µA IBPB brake power brake current VBRAKEPOWER = 12 V; VBRAKEDELAY = 0 − − 1 µA VSWITCHGATE voltage on SWITCHGATE during brake-after-park brake-after-park mode − − 0.1 V Ibrake park voltage current source VBRAKEPOWER = 12 V; VCLAMP = 8 V; VBRAKEDELAY > VBDT −12 −9 −6 µA VIVCM(max) maximum park voltage pin PARKVOLT open-circuit; VCLAMP = 8 V; VBRAKEDELAY > VBDT; Tamb = 25 °C; note 13 − 1.95 − V VIVCM(park) voltage on IVCM during VPARKVOLT = 1 V; park VBRAKEPOWER = 12 V; VCLAMP = 8 V; VBRAKEDELAY > VBDT 0.9 1 1.1 V VNIVCM(park) voltage on NIVCM during park VPARKVOLT = 1 V; VBRAKEPOWER = 12 V; VCLAMP = 8 V; VBRAKEDELAY > VBDT − 15 50 mV VMOTx(park) voltage on MOTx during park (high impedance state) VBRAKEDELAY > VBDT; note 14 3 6 9 V Rds(on)(park) switch park resistor RL = 20.2 Ω; Tamb = 25 °C − 0.35 2 Ω TCRds(on)(park) temperature coefficient note 15 − 2 − mΩ/°C Park 1998 Nov 02 45 Philips Semiconductors Product specification Disk drive spindle and VCM with servo controller SYMBOL PARAMETER OM5193H CONDITIONS MIN. TYP. MAX. UNIT Brake VBDT brake delay time threshold voltage ILI brake delay leakage current Rds(on)(brake) lower DMOS resistor during a brake VBRAKEPOWER = 12 V IMOTx = 200 mA; Tamb = 25 °C TCRds(on)(brake) temperature coefficient note 16 1.1 2.1 3.1 V −500 − +500 nA − 0.24 0.5 Ω − 2 − mΩ/°C Precharge VIVCM voltage on pin IVCM VBRAKEPOWER = 12 V; VBRAKEDELAY = 0; note 17 − VDDD − VBE − V VNIVCM voltage on pin NIVCM VBRAKEPOWER = 12 V; VBRAKEDELAY = 0; note 17 − VDDD − VBE − V VVCMIN voltage on pin VCMIN VBRAKEPOWER = 12 V; VBRAKEDELAY = 0 − − V 0.2 Notes 1. VDDD = 5 V ±10%; VDDA2 = VDDA2POWER = 12 V ±10%; Tamb = 0 to 70 °C; unless otherwise specified. 2. VDDD = VDDA1 = 5 V ±10%; Tamb = 0 to 70 °C. 3. LSB on the 1.5 to 3.5 V range is equal to 1⁄512 V; LSB on the 0 to 5 V range is equal to 2.5⁄512 V. 4. Integral non-linearity means the deviation of a code from a straight line passing through an actual end-point and the actual centre. INL and DNL are calculated by dividing the output transfer function in 2 parts: minimum value to centre value and centre value to maximum value. 5. The temperature dependency of the resistance is expressed as follows: R sh (T) = R sh ( T ref ) × ( 1 + 1.1e – 3 × ( T – T ref ) + 1.1e – 6 × ( T – T ref ) 2 where Rsh (T) = resistance at desired temperature; Rsh (Tref) = resistance at reference temperature; T = desired temperature and Tref = 27 °C. 6. Guaranteed by design. 7. Channel-to-channel crosstalk is measured while driving one input and measuring the other open inputs. 8. In any case, it allows to go beyond the rated 150 °C limit. 9. The description of the spindle driver circuit is given in Section 8.10. 10. RSENSE = 0.25 Ω. Model for a motor phase: RLC network in parallel (LP = 1.5 mH, CP = 100 pF, RP = 4.6 kΩ) in series with a resistor RS = 3.2 Ω. Guaranteed by design. 11. VVCMSENSEL = 0.4 V, VVCMSENSEH = 0 V, measured Vsout = VO, force Vsout = VO + 10 mV. 12. VVCMSENSEL = 0 V, VVCMSENSEH = 0.4 V, measured Vsout = VO, force Vsout = VO − 10 mV. 13. VPARKVOLT(max) = 3 × VBE, VPARKVOLT = 3 × 0.70 − 3 × 2e − 3 × (T − 25) without resistor. 14. Brake-after-park mode when in sleep, POR or over-temperature mode. 15. Rds(on)T(park) = Rds(on)(park) + TRds(on)(park) × (T − 25). 16. Rds(on)T(break) = Rds(on)(break) + TRds(on)(break) × (T − 25). 17. VBE = 0.65 + 2e − 3 × (T − 25). 1998 Nov 02 46 Philips Semiconductors Product specification Disk drive spindle and VCM with servo controller OM5193H 13 APPLICATION INFORMATION SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Power supplies monitor CCPOR POR time capacitor (time tC) note 1 − 100 − nF CCHK5 analog 5 V filter between CHK5 and ground − 1 − nF CCHK12 analog 12 V filter between CHK12 and ground − 1 − nF CSPCCOUT spindle current control loop capacitor function of the motor characteristics − 10 − nF RSLEW slew up and down resistor note 2 − 200 − kΩ RSPSENSE spindle sense resistor − 0.25 − Ω Spindle driver VCM driver RVCMCOMPRC resistor of compensation RC network function of the VCM characteristics − 130 − kΩ CVCMCOMPRC capacitor of compensation RC network function of the VCM characteristics − 1 − nF RVCMSENSE VCM sense resistor − 0.33 − Ω RFEEDBACK feedback resistor function of the VCM characteristics − 2.67 − kΩ RVCMSEEK seek mode resistor function of the VCM characteristics − 2.43 − kΩ RVCMTRACKFW track-following mode resistor function of the VCM characteristics − 10 − kΩ VI input voltage controlling the current 1.5 − 3.5 V Vref2V5 2.5 V reference voltage − 2.5 − V clamp capacitor between CLAMP line and ground − 1 − µF Clamp line CCLAMP Charge pump generator CCAPX pump capacitor between pins BSTCP1 and BSTCP2 − 10 − nF CCAPY storage capacitor between pin CAPY and ground − 22 − nF Park and brake functions CBRAKEP BRAKEPOWER capacitor brake time = 10 s; speed = 5400 RPM; Rcoil = 5 Ω; BEMF = 8.2 V − 1 − µF RBRAKEP resistor between BRAKEADJH and BRAKEPOWER brake time = 10 s; speed = 5400 RPM; Rcoil = 5 Ω; BEMF = 8.2 V − 0 − MΩ 1998 Nov 02 47 Philips Semiconductors Product specification Disk drive spindle and VCM with servo controller SYMBOL OM5193H PARAMETER CONDITIONS brake delay = 400 ms MIN. − TYP. − UNIT CBRAKED BRAKEDELAY capacitor RBRAKED BRAKEDELAY resistor brake delay = 400 ms − 650 − kΩ RPARKVOLT PARKVOLT resistor VPARKVOLT = 1.25 V; VCLAMP = 8 V − 250 − kΩ Notes 1. The description of the Power-On Reset (POR) circuit is given in Section “Power-on reset”. 2. The description of the spindle driver circuit is given in Section “Spindle driver”. 1998 Nov 02 48 330 MAX. nF Philips Semiconductors Product specification Disk drive spindle and VCM with servo controller CPOR 45 SLEW (1) CSPCCOUT SPCCOUT 22 23 19 15 20 44 18 BSTCP2 BSTCP1 CAPY VDDD VDDA2 25 VDDA1 CCAPY ZCROSS POR SCLOCK SDEN 21 CCAPX 5V 16 5V 17 CCHK5 12 RH5 (1) RL5 (1) CHK5 14 12 V BRAKEPOWER 48 (1) BRAKEADJH RPARKVOLT PARKVOLT (1) CBRAKED 13 12 V 46 RSLEW RBRAKEP 24 SPCC CLOCK CCPOR SDATA microcontroller handbook, full pagewidth CBRAKEP OM5193H BRAKEDELAY 47 49 CCHK12 9 50 72 74 29 53 MOTB spindle motor MOTC MOTSENSE3 MOTSENSE1/ SPSENSEH GNDS/SPSENSEL NIVCM VCMSENSEL 31 RVCMSENSE 32 52 33 CCLAMP 62 RVCMSEEK RVCMTRACKFW VCMIN 41 42 43 SEEKSELECT 34 DACOUT 10 55 56 57 77 GNDVCM3 8 1, 4 to 7, 58 to 61, 64 to 67, 70, 75, 39 27 54 78 to 80 26 71 68 63 TRACKFWSELECT two different options 69 30 CLAMP1 SWITCHGATE 11 GNDVCM2 VDDA2POWER MOTA 28 GNDVCM1 ADC[5] CT RSPSENSE SCANTEST ADC[4]/TEMP 35 HEATSINK ADC[3] 2 GNDV ADC[2]/SOUT 36 AGND ADC[1]/DIFOUT (1) MOTSENSE2 DGND ADC[0]/INTOUT 76 PWRBIAS2 PESAMPN 37 CLAMP3 PESAMP 73 PWRBIAS1 read channel 3 38 CLAMP2 INTIN RL12 40 OM5193H INTINN (1) 51 RBRAKED REF2V5 RH12 CHK12 VCMSENSEH IVCM voice coil motor M RVCMCOMPRC CVCMCOMPRC RFEEDBACK MGM993 (1) Optional components. Fig.24 Application diagram. 1998 Nov 02 49 Philips Semiconductors Product specification Disk drive spindle and VCM with servo controller OM5193H 14 PACKAGE OUTLINE QFP80: plastic quad flat package; 80 leads (lead length 1.95 mm); body 14 x 20 x 2.8 mm SOT318-2 c y X 64 A 41 40 65 ZE e E HE A A2 (A 3) A1 θ wM pin 1 index Lp bp 80 L 25 detail X 24 1 wM bp e ZD v M A D B HD v M B 0 5 10 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HD HE L Lp v w y mm 3.2 0.25 0.05 2.90 2.65 0.25 0.45 0.30 0.25 0.14 20.1 19.9 14.1 13.9 0.8 24.2 23.6 18.2 17.6 1.95 1.0 0.6 0.2 0.2 0.1 Z D (1) Z E (1) 1.0 0.6 1.2 0.8 θ o 7 0o Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION REFERENCES IEC JEDEC EIAJ ISSUE DATE 95-02-04 97-08-01 SOT318-2 1998 Nov 02 EUROPEAN PROJECTION 50 Philips Semiconductors Product specification Disk drive spindle and VCM with servo controller OM5193H If wave soldering cannot be avoided, for QFP packages with a pitch (e) larger than 0.5 mm, the following conditions must be observed: 15 SOLDERING 15.1 Introduction • A double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used. There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often used. • The footprint must be at an angle of 45° to the board direction and must incorporate solder thieves downstream and at the side corners. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our “Data Handbook IC26; Integrated Circuit Packages” (order code 9398 652 90011). 15.2 Maximum permissible solder temperature is 260 °C, and maximum duration of package immersion in solder is 10 seconds, if cooled to less than 150 °C within 6 seconds. Typical dwell time is 4 seconds at 250 °C. Reflow soldering Reflow soldering techniques are suitable for all QFP packages. The choice of heating method may be influenced by larger plastic QFP packages (44 leads, or more). If infrared or vapour phase heating is used and the large packages are not absolutely dry (less than 0.1% moisture content by weight), vaporization of the small amount of moisture in them can cause cracking of the plastic body. For details, refer to the Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. 15.4 Fix the component by first soldering two diagonallyopposite end leads. Use only a low voltage soldering iron (less than 24 V) applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 °C. Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Several methods exist for reflowing; for example, infrared/convection heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 50 and 300 seconds depending on heating method. Typical reflow peak temperatures range from 215 to 250 °C. 15.3 Wave soldering Wave soldering is not recommended for QFP packages. This is because of the likelihood of solder bridging due to closely-spaced leads and the possibility of incomplete solder penetration in multi-lead devices. CAUTION Wave soldering is NOT applicable for all QFP packages with a pitch (e) equal or less than 0.5 mm. 1998 Nov 02 Repairing soldered joints 51 Philips Semiconductors Product specification Disk drive spindle and VCM with servo controller OM5193H 16 DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. 17 LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. 1998 Nov 02 52 Philips Semiconductors Product specification Disk drive spindle and VCM with servo controller OM5193H NOTES 1998 Nov 02 53 Philips Semiconductors Product specification Disk drive spindle and VCM with servo controller OM5193H NOTES 1998 Nov 02 54 Philips Semiconductors Product specification Disk drive spindle and VCM with servo controller OM5193H NOTES 1998 Nov 02 55 Philips Semiconductors – a worldwide company Argentina: see South America Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113, Tel. +61 2 9805 4455, Fax. +61 2 9805 4466 Austria: Computerstr. 6, A-1101 WIEN, P.O. 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The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands 295102/750/01/pp56 Date of release: 1998 Nov 02 Document order number: 9397 750 03031