INTEGRATED CIRCUITS 74LVC646A Octal bus transceiver/register (3-State) Product specification Supercedes data of 1998 Mar 25 IC24 Data Handbook 1998 Jul 29 Philips Semiconductors Product specification Octal bus transceiver/register (3-State) 74LVC646A for multiplexed transmission of data directly from the internal registers. Data on the ‘A’ or ‘B’ bus will be clocked in the internal registers, as the appropriate clock (CPAB or CPBA) goes to a HIGH logic level. Output enable (OE) and direction (DIR) inputs are provided to control the transceiver function. In the transceiver mode, data present at the high-impedance port may be stored in either the ‘A’ or ‘B’ register, or in both. The select source inputs (SAB and SBA) can multiplex stored and real-time (transparent mode) data. FEATURES • Wide supply voltage range of 1.2V to 3.6V • Flow-through pin-out architecture • In accordance with JEDEC standard no. 8-1A • CMOS low power consumption • Direct interface with TTL levels • 5 Volt tolerant inputs/outputs, for interfacing with 5 Volt logic DESCRIPTION The direction (DIR) input determines which bus will receive data when OE is active (LOW). In the isolation mode (OE = HIGH), ‘A’ data may be stored in the ‘B’ register and/or ‘B’ data may be stored in the ‘A’ register. The 74LVC646A is a high performance, low-power, low-voltage Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. When an output function is disabled, the input function is still enabled and may be used to store and transmit data. Only one of the two buses, ‘A’ or ‘B’ may be driven at a time. Inputs can be driven from either 3.3V or 5.0V devices. In 3-State operation, outputs can handle 5V. This feature allows the use of these devices as translators in a mixed 3.3V/5V environment. The ‘646A’ is functionally identical to the ‘648A’ but has non-inverting data paths. The 74LVC646A consist of non-inverting bus transceiver circuits with 3-State outputs, D-type flip-flops and control circuitry arranged QUICK REFERENCE DATA GND = 0V; Tamb = 25°C; tr = tf ≤ 2.5 ns PARAMETER SYMBOL CONDITIONS TYPICAL CL = 50pF VCC = 3.3V UNIT tPHL/tPLH Propagation delay An to Yn fmax Maximum clock frequency 250 MHz CI Input capacitance 5.0 pF CI/O Input/output capacitance 10 pF CPD Power dissipation capacitance per gate 26 pF 3.9 Notes 1, 2 ns NOTES: 1. CPD is used to determine the dynamic power dissipation (PD in µW) PD = CPD VCC2 x fi Σ (CL VCC2 fo) where: fi = input frequency in MHz; CL = output load capacitance in pF; fo = output frequency in MHz; VCC = supply voltage in V; Σ (CL VCC2 fo) = sum of the outputs. 2. The condition is VI = GND to VCC. ORDERING AND PACKAGE INFORMATION TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA PKG. DWG. # 24-Pin Plastic SO –40°C to +85°C 74LVC646A D 74LVC646A D SOT137-1 24-Pin Plastic SSOP Type II –40°C to +85°C 74LVC646A DB 74LVC646A DB SOT340-1 24-Pin Plastic TSSOP Type I –40°C to +85°C 74LVC646A PW 7LVC646APW DH SOT355-1 PACKAGES 1998 Jul 29 2 853-2105 19803 Philips Semiconductors Product specification Octal bus transceiver/register (3-State) 74LVC646A PIN CONFIGURATION PIN DESCRIPTION PIN NUMBER SYMBOL FUNCTION 1 CPAB ‘A’ to ‘B’ clock input (LOW-to-HIGH, edge-triggered) CP AB 1 24 V CC 2 SAB Select ‘A’ to ‘B’ source input S AB 2 23 CP BA 3 DIR Direction control input DIR 3 22 S BA 4 A0 to A7 21 OE 4, 5, 6, 7, 8, 9, 10, 11 ‘A’ data inputs/outputs A0 A1 5 20 B0 12 GND Ground (0V) 20, 19, 18, 17, 16, 15, 14, 13 B0 to B7 ‘B’ data inputs/outputs 21 OE Output enable input (active LOW) 22 SBA Select ‘B’ to ‘A’ source input 23 CPBA ‘B’ to ‘A’ clock input (LOW-to-HIGH, edge-triggered) 24 VCC Positive supply voltage A2 6 19 B1 A3 7 18 B2 A4 8 17 B3 A5 9 16 B4 A 6 10 15 B5 11 14 B6 12 13 B7 A7 GND SV00766 FUNCTION TABLE INPUTS * DATA I/O * FUNCTION OE DIR CPAB CPBA SAB SBA A0 to A7 B0 to B7 X X X X ↑ X X ↑ X X X X input un * un * input store A, B unspecified * store B, A unspecified * H H X X ↑ H or L ↑ H or L X X X X input input store A and B data, isolation hold storage L L L L X X X H or L X X L H output input real-time B data to A bus stored B data to A bus L L H H X H or L X X L H X X input output real-time A data to B bus stored A data to B bus The data output functions may be enabled or disabled by various signals at the OE and DIR inputs. Data input functions are always enabled, i.e., data at the bus inputs will be stored on every LOW-to-HIGH transition on the clock inputs. un = unspecified H = HIGH voltage level L = LOW voltage level X = Don’t care ↑ = LOW-to-HIGH level transition 1998 Jul 29 3 Philips Semiconductors Product specification Octal bus transceiver/register (3-State) 74LVC646A LOGIC SYMBOL FUNCTIONAL DIAGRAM 21 OE 1 CP AB 2 S AB 4 4 A0 B0 20 5 A1 B1 19 6 A2 B2 18 7 A3 B3 17 8 A4 B4 16 9 A5 B5 15 10 A6 B6 14 11 A7 B7 13 CP BA 23 S BA 22 A0 B0 20 5 A1 B1 19 6 A2 B2 18 7 A3 B3 17 8 A4 B4 16 9 A5 B5 15 21 OE 10 A6 B6 14 3 DIR 11 A7 B7 13 2 S AB 22 S BA DIR 3 1 CPAB 23 CP BA SV00765 SV00763 LOGIC SYMBOL (IEEE/IEC) 23 1 21 22 2 3 C4 C5 G3 G6 G7 3EN2 3EN1 4 ≥ 1 1 5D 5 1 6 6 7 7 4D 1 ≥12 20 19 6 18 7 17 8 16 9 15 10 14 11 13 SV00764 1998 Jul 29 4 Philips Semiconductors Product specification Octal bus transceiver/register (3-State) 74LVC646A LOGIC DIAGRAM OE DIR S BA CP BA S AB CP AB V CC Y S D1 MUX An D2 Q D FF n CP V CC S D1 Y MUX D Q Bn D2 FF n CP 8 identical channels SV00762 1998 Jul 29 5 Philips Semiconductors Product specification Octal bus transceiver/register (3-State) 74LVC646A RECOMMENDED OPERATING CONDITIONS SYMBOL VCC VI VO Tamb tr, tf PARAMETER CONDITIONS LIMITS MIN MAX DC supply voltage (for max. speed performance) 2.7 3.6 DC supply voltage (for low-voltage applications) 1.2 3.6 UNIT V DC input voltage range 0 5.5 DC output voltage range; output HIGH or LOW state 0 VCC DC output voltage range; output 3-State 0 5.5 –40 +85 °C 0 0 20 10 ns/V Operating free-air temperature range VCC = 1.2 to 2.7V VCC = 2.7 to 3.6V Input rise and fall times V V ABSOLUTE MAXIMUM RATINGS1 In accordance with the Absolute Maximum Rating System (IEC 134) Voltages are referenced to GND (ground = 0V) SYMBOL VCC PARAMETER CONDITIONS DC supply voltage RATING UNIT –0.5 to +6.5 V IIK DC input diode current VI t0 –50 mA VI DC input voltage Note 2 –0.5 to +6.5 V IOK DC output diode current VO uVCC or VO t 0 "50 mA DC output voltage; output HIGH or LOW Note 2 –0.5 to VCC +0.5 DC output voltage; output 3-State Note 2 –0.5 to 6.5 IO DC output diode current VO = 0 to VCC IGND, ICC DC VCC or GND current VO Tstg PTOT Storage temperature range Power dissipation per package – plastic mini-pack (SO) – plastic shrink mini-pack (SSOP and TSSOP) V "50 mA "100 mA –65 to +150 °C above +70°C derate linearly with 8 mW/K 500 above +60°C derate linearly with 5.5 mW/K 500 mW NOTES: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 1998 Jul 29 6 Philips Semiconductors Product specification Octal bus transceiver/register (3-State) 74LVC646A DC ELECTRICAL CHARACTERISTICS Over recommended operating conditions voltages are referenced to GND (ground = 0V) LIMITS SYMBOL PARAMETER TEST CONDITIONS Temp = -40°C to +85°C MIN VIH HIGH level Input voltage VIL LOW level Input voltage VOH O VCC = 1.2V VCC VCC = 2.7 to 3.6V 2.0 TYP1 V VCC = 1.2V GND V VCC = 2.7 to 3.6V HIGH level output voltage 0.8 VCC = 2.7V; VI = VIH or VIL; IO = –12mA VCC*0.5 VCC = 3.0V; VI = VIH or VIL; IO = –100µA VCC*0.2 VCC = 3.0V; VI = VIH or VIL; IO = –18mA VCC*0.6 VCC = 3.0V; VI = VIH or VIL; IO = –24mA VCC*0.8 VCC VCC = 2.7V; VI = VIH or VIL; IO = 12mA VOL LOW level output voltage VCC = 3.0V; VI = VIH or VIL; IO = 100µA GND V 0.55 "5 µA "0.1 "15 µA VCC = 3.6V; VI = VIH or VIL; VO = 5.5V or GND 0.1 "10 µA Power off leakage current VCC = 0.0V; VI or VO = 5.5V 0.1 "10 µA Quiescent supply current VCC = 3.6V; VI = VCC or GND; IO = 0 0.1 10 µA Additional quiescent supply current per input pin VCC = 2.7V to 3.6V; VI = VCC –0.6V; IO = 0 5 500 µA VCC = 3.6V; VI = 5.5V or GND Input current for common I/O pins VCC = 3.6V; VI = VCC or GND IOZ 3-State output OFF-state current IOFF ICC NOTES: 1. All typical values are at VCC = 3.3V and Tamb = 25°C. 1998 Jul 29 0.20 "0.1 Input leakage current IIHZ/IILZ ∆ICC V 0.40 VCC = 3.0V; VI = VIH or VIL; IO = 24mA II UNIT MAX 7 Not for I/O pins Philips Semiconductors Product specification Octal bus transceiver/register (3-State) 74LVC646A AC CHARACTERISTICS GND = 0 V; tr = tf 2.5 ns; CL = 50 pF LIMITS SYMBOL PARAMETER VCC = 3.3V ±0.3V WAVEFORM VCC = 2.7V VCC = 1.2V UNIT MIN TYP1 MAX MIN MAX TYP Figures 1, 6 1.5 3.9 6.8 1.5 7.8 15 ns Propagation delay CPAB, CPBA to Bn, An Figures 2, 6 1.5 4.6 7.6 1.5 8.6 19 ns tPHL/tPLH Propagation delay SAB, SBA to Bn, An Figures 3, 6 1.5 4.9 8.5 1.5 9.5 19 ns tPZH/tPZL 3-State output enable time OEn to An, Bn Figures 4, 6 1.5 4.5 7.8 1.5 8.8 20 ns tPHZ/tPLZ 3-State output disable time OEn to An, Bn Figures 4, 6 1.5 3.9 6.1 1.5 7.1 10 ns tPZH/tPZL 3-State output enable time DIR to An, Bn Figures 5, 6 1.5 4.6 7.9 1.5 8.9 20 ns tPHZ/tPLZ 3-State output disable time DIR to An, Bn Figures 5, 6 1.5 3.5 6.0 1.5 7.0 12 ns tW Clock pulse width HIGH or LOW CPAB or CPBA Figure 1, 3 3.3 1.9 – 3.3 – – ns tsu Set-up time An, Bn to CPAB, CPBA Figure 2 1.6 0.35 – 1.6 – – ns th Hold time An, Bn to CPAB, CPBA Figure 2 1.0 –0.3 – 1.0 – – ns Maximum clock pulse frequency Figure 2 150 250 – 125 – – ns tPHL/tPLH Propagation delay An, Bn to Bn, An tPHL/tPLH fmax NOTE: 1. These typical values are at VCC = 3.3V and Tamb = 25°C. 1998 Jul 29 8 Philips Semiconductors Product specification Octal bus transceiver/register (3-State) 74LVC646A AC WAVEFORMS VM = 1.5V at VCC w 2.7V VM = 0.5V * VCC at VCC t 2.7V VOL and VOH are the typical output voltage drop that occur with the output load. VX = VOL + 0.3V at VCC w 2.7V VX = VOL + 0.1VCC at VCC < 2.7V VY = VOH – 0.3V at VCC w 2.7V VY = VOH – 0.1VCC at VCC < 2.7V VI S AB , S BA INPUT VM GND t PHL t PLH V OH Bn, A n VI VM OUTPUT An, B n VM INPUT V OL GND t PLH t PHL V OH Bn, A n OUTPUT VM SV00759 V OL Figure 3. Input SAB, SBA to output Bn, An propagation delay times. SV00761 VI Figure 1. Input An, Bn to output Bn, An propagation delays. OE INPUT VM GND tPLZ tPZL V CC OUTPUT LOW–to–OFF OFF–to–LOW VOL VI An, B n INPUT VM VOH CPAB , CP BA OUTPUT VOL tPZH tPHZ GND tsu VM VX th tsu VOH OUTPUT HIGH–to–OFF OFF–to–HIGH GND th VM VY VM outputs enabled outputs disabled outputs enabled tW 1/f max VOH B n, A n OUTPUT VOL SV00758 tPHL Figure 4. Input OE to output An, Bn 3-State enable and disable times. tPLH SV00760 Figure 2. An, Bn to CPAB, CPBA set-up and hold times, clock CPAB, CPBA pulse width, maximum clock pulse frequency and the CPAB, CPBA to output Bn, An propagation delays. 1998 Jul 29 9 Philips Semiconductors Product specification Octal bus transceiver/register (3-State) AC WAVEFORMS (Continued) 74LVC646A TEST CIRCUIT VM = 1.5V at VCC w 2.7V VM = 0.5V * VCC at VCC t 2.7V VOL and VOH are the typical output voltage drop that occur with the output load. VX = VOL + 0.3V at VCC w 2.7V VX = VOL + 0.1VCC at VCC < 2.7V VY = VOH – 0.3V at VCC w 2.7V VY = VOH – 0.1VCC at VCC < 2.7V PULSE GENERATOR VI tPZH tPHZ VOH VM VX tPZH Bn OUTPUT Bn OUTPUT VOL tPHZ VY VM tPZL tPHZ VM VX SV00757 Figure 5. Input DIR to output An, Bn 3-State enable and disable times. 1998 Jul 29 VI tPLH/tPHL Open t 2.7V VCC tPLZ/tPZL 2 x VCC 2.7V – 3.6V 2.7V tPHZ/tPZH GND Figure 6. Load circuitry for switching times. tPZL tPLZ An OUTPUT VOL S1 VCC SY00003 VM GND VOH 500Ω VY An OUTPUT VOL VOH 50pF CL Test GND VCC 500Ω VO RT VM 2 x VCC Open GND D.U.T. VI DIR INPUT S1 VCC 10 Philips Semiconductors Product specification Octal bus transceiver/register (3-State) 74LVC646A APPLICATION INFORMATION Real-time transfer; bus A to bus B BUS B BUS A BUS A BUS B Real-time transfer; bus B to bus A SV00777 SV00778 (1) (14) (28) (16) (27) (15) (1) (14) (28) (16) (27) (15) OE DIR CPAB CPBA SAB SBA OE DIR CPAB CPBA SAB SBA L L X X X L L H X X L X Storage from A, B or A and B BUS B BUS A BUS A BUS B Transfer storage data to A or B SV00779 SV00780 (1) (14) (28) (16) (27) (15) (1) (14) (28) (16) (27) (15) OE DIR CPAB CPBA SAB SBA DIR X ↑ OE X X X X CPAB CPBA SAB SBA X X X ↑ X L ↑ X H 1998 Jul 29 X ↑ X 11 L L X H or L X H L H H or L X H X Philips Semiconductors Product specification Octal bus transceiver/register (3-State) SO20: plastic small outline package; 20 leads; body width 7.5 mm 1998 Jul 29 12 74LVC646A SOT163-1 Philips Semiconductors Product specification Octal bus transceiver/register (3-State) SSOP20: plastic shrink small outline package; 20 leads; body width 5.3 mm 1998 Jul 29 13 74LVC646A SOT339-1 Philips Semiconductors Product specification Octal bus transceiver/register (3-State) TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm 1998 Jul 29 14 74LVC646A SOT360-1 Philips Semiconductors Product specification Octal bus transceiver/register (3-State) NOTES 1998 Jul 29 15 74LVC646A Philips Semiconductors Product specification Octal bus transceiver/register (3-State) 74LVC646A Data sheet status Data sheet status Product status Definition [1] Objective specification Development This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. Preliminary specification Qualification This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make chages at any time without notice in order to improve design and supply the best possible product. Product specification Production This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. [1] Please consult the most recently issued datasheet before initiating or completing a design. Definitions Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Disclaimers Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Copyright Philips Electronics North America Corporation 1998 All rights reserved. Printed in U.S.A. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381 print code Document order number: yyyy mmm dd 16 Date of release: 08-98 9397-750-04516