INTEGRATED CIRCUITS 74ALVCHT16835 18-bit registered driver (3-State) Product data 2002 Jun 05 Philips Semiconductors Product data 74ALVCHT16835 18-bit registered driver (3-State) FEATURES PIN CONFIGURATION • Wide supply voltage range of 2.3 V to 3.6 V • Complies with JEDEC standard no. 8-1A. • CMOS low power consumption • Direct interface with TTL levels • Current drive ± 24 mA at 3.0 V • MULTIBYTETM flow-through standard pin-out architecture • Low inductance multiple VCC and GND pins for minimum noise and ground bounce • Output drive capability 50 Ω transmission lines @ 85 °C • ESD protection exceeds 1500 V HBM per JESD22-A114, A115 and 1000 V CDM per JESD22-C101 • Bus hold on data inputs eliminates the need for external pullup/pulldown resistors DESCRIPTION The 74ALVCHT16835 is a 18-bit registered driver. Data flow is controlled by active low output enable (OE), active high latch enable (LE) and clock inputs (CP). When LE is HIGH, the A to Y data flow is transparent. When LE is LOW and CP is held at LOW or HIGH, the data is latched; on the LOW to HIGH transient of CP the A-data is stored in the latch/flip-flop. When OE is LOW the outputs are active. When OE is HIGH, the outputs go to the high impedance OFF-state. Operation of the OE input does not affect the state of the latch/flip-flop. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. NC 1 56 GND NC 2 55 NC Y1 3 54 A1 GND 4 53 GND Y2 5 52 A2 Y3 6 51 A3 VCC 7 50 VCC Y4 8 49 A4 Y5 9 48 A5 Y6 10 47 A6 GND 11 46 GND Y7 12 45 A7 Y8 13 44 A8 Y9 14 43 A9 Y10 15 42 A10 Y11 16 41 A11 Y12 17 40 A12 GND 18 39 GND Y13 19 38 A13 Y14 20 37 A14 Y15 21 36 A15 VCC 22 35 VCC Y16 23 34 A16 Y17 24 33 A17 GND 25 32 GND Y18 26 31 A18 OE 27 30 CP LE 28 29 GND SH00188 QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C; tr = tf ≤ 2.5 ns SYMBOL PARAMETER CONDITIONS TYPICAL UNIT tPHL/tPLH Propagation delay An to Yn; LE to Yn; CP to Yn VCC = 3.3 V, CL = 50 pF 2.3 2.7 2.2 fmax Maximum clock frequency VCC = 3.3 V, CL = 50 pF 350 MHz CI Input capacitance 4.0 pF CI/O Input/Output capacitance 8.0 pF CPD Power dissipation capacitance per buffer VI = GND to VCC1 transparent mode Output enabled Output disabled 13 3 Clocked mode Output enabled Output disabled 22 15 ns pF NOTES: 1. CPD is used to determine the dynamic power dissipation (PD in µW): PD = CPD × VCC2 × fi + S (CL × VCC2 × fo) where: fi = input frequency in MHz; CL = output load capacitance in pF; fo = output frequency in MHz; VCC = supply voltage in V; S (CL × VCC2 × fo) = sum of outputs. 2002 Jun 05 2 853-2350 28376 Philips Semiconductors Product data 74ALVCHT16835 18-bit registered driver (3-State) ORDERING INFORMATION PACKAGES 56-Pin Plastic TSSOP (TVSOP), 0.4 mm pitch PIN DESCRIPTION TEMPERATURE RANGE ORDER CODE DRAWING NUMBER –40 to +85 °C 74ALVCHT16835DGV SOT481-2 LOGIC SYMBOL PIN NUMBER SYMBOL NAME AND FUNCTION 1, 2, 55 NC 3, 5, 6, 8, 9, 10, 12, 13, 14, 15, 16, 17, 19, 20, 21, 23, 24, 26 Y1 to Y18 Data outputs 4, 11, 18, 25, 29, 32, 39, 46, 53, 56 GND Ground (0 V) 7, 22, 35, 50 VCC Positive supply voltage 27 OE Output enable input (active LOW) 28 LE Latch enable input 30 CP Clock input 54, 52, 51, 49, 48, 47, 45, 44, 43, 42, 41, 40, 38, 37, 36, 34, 33, 31 A1 to A18 Data inputs No connection OE CP LE A1 D LE Y1 CP TO THE 17 OTHER CHANNELS SH00203 2002 Jun 05 3 Philips Semiconductors Product data 74ALVCHT16835 18-bit registered driver (3-State) LOGIC SYMBOL (IEEE/IEC) FUNCTION TABLE INPUTS OE 27 CP 30 LE 28 Y1 3 Y2 OE EN5 3C4 G7 OUTPUTS LE CP A H X X X Z L H X L L L H X H H 54 A1 L L ↑ L L 5 52 A2 L L ↑ H H Y3 6 51 A3 L L H X Y01 Y4 8 49 A4 L L X 9 48 Y02 Y5 A5 Y6 10 47 A6 Y7 12 45 A7 Y8 13 44 A8 Y9 14 43 A9 Y10 15 42 A10 4D 1, 2 ∇ Y11 16 41 A11 Y12 17 40 A12 Y13 19 38 A13 Y14 20 37 A14 Y15 21 36 A15 Y16 23 34 A16 Y17 24 33 A17 Y18 25 31 A18 8D 5, 6 ∇ L H L X Z ↑ HIGH voltage level LOW voltage level Don’t care High impedance “off” state LOW-to-HIGH level transition NOTES: 1. Output level before the indicated steady-state input conditions were established, provided that CP is high before LE goes low. 2. Output level before the indicated steady-state input conditions were established. SH00190 2002 Jun 05 = = = = = 4 Philips Semiconductors Product data 74ALVCHT16835 18-bit registered driver (3-State) RECOMMENDED OPERATING CONDITIONS SYMBOL VCC PARAMETER CONDITIONS MIN MAX DC supply voltage 2.5 V range (for max. speed performance @ 30 pF output load) 2.3 2.7 DC supply voltage 3.3 V range (for max. speed performance @ 50 pF output load) 3.0 3.6 DC supply voltage (for low-voltage applications) UNIT V 2.3 3.6 VI DC Input voltage range 0 VCC V VO DC output voltage range 0 VCC V –40 +85 °C 0 0 20 10 ns/V Tamb tr, tf Operating free-air temperature range VCC = 2.3 to 3.0 V VCC = 3.0 to 3.6 V Input rise and fall times ABSOLUTE MAXIMUM RATINGS In accordance with the Absolute Maximum Rating System (IEC 134). Voltages are referenced to GND (ground = 0 V). SYMBOL VCC IIK PARAMETER CONDITIONS DC supply voltage DC input diode current VI t0 V -50 mA –0.5 to +4.6 For data inputs1 –0.5 to VCC +0.5 DC input voltage IOK DC output diode current VO uVCC or VO t 0 VO DC output voltage Note 1 IO DC output source or sink current VO = 0 to VCC Tstg UNIT For control pins1 VI IGND, ICC RATING –0.5 to +4.6 DC VCC or GND current Storage temperature range V "50 mA –0.5 to VCC +0.5 V "50 mA "100 mA –65 to +150 °C PTOT Power dissipation per package -plastic thin-medium-shrink (TSSOP) For temperature range: –40 to +125 °C above +55°C derate linearly with 8 mW/K 600 mW ΘJA Package thermal impedance See Note 2 93 °C/W NOTE: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. The package thermal impedance is calculated in accordance with JESD 51. 2002 Jun 05 5 Philips Semiconductors Product data 74ALVCHT16835 18-bit registered driver (3-State) DC ELECTRICAL CHARACTERISTICS Over recommended operating conditions. Voltage are referenced to GND (ground = 0 V). LIMITS SYMBOL PARAMETER VIH HIGH level Input voltage VIL LOW level Input voltage VOH HIGH level output voltage g Temp = –40 to +85 °C TEST CONDITIONS UNIT MIN TYP1 MAX VCC = 2.3 to 2.7 V 1.7 1.2 — VCC = 2.7 to 3.6 V 2.0 1.5 — VCC = 2.3 to 2.7 V — 1.2 0.7 VCC = 2.7 to 3.6 V — 1.5 0.8 VCC — V V VCC = 2.3 to 3.6 V; VI = VIH or VIL; IO = –100 µA VCC 02 0.2 VCC = 2.3 V; VI = VIH or VIL; IO = –6 mA VCC 0.3 VCC 0.08 — VCC = 2.3 V; VI = VIH or VIL; IO = –12 mA VCC 0.6 VCC 0.26 — VCC = 2.7 V; VI = VIH or VIL; IO = –12 mA VCC 0.5 VCC 0.14 — VCC = 3.0 V; VI = VIH or VIL; IO = –12 mA VCC 0.6 VCC 0.09 — VCC = 3.0 V; VI = VIH or VIL; IO = –24 mA VCC 1.0 VCC 0.28 — V VCC = 2.3 to 3.6 V; VI = VIH or VIL; IO = 100 µA — GND 0 20 0.20 V VCC = 2.3 V; VI = VIH or VIL; IO = 6 mA — 0.07 0.40 V VCC = 2.3 V; VI = VIH or VIL; IO = 12 mA — 0.15 0.70 VCC = 2.7 V; VI = VIH or VIL; IO = 12 mA — 0.14 0.40 VCC = 3.0 V; VI = VIH or VIL; IO = 24 mA — 0.27 0.55 VCC = 2 2.3 3 V; VI = 0 0.7 7V 45 — — VCC = 2.3 V; VI = 1.7 V –45 — — VCC = 3.0 V; VI = 0.8 V 75 — — VCC = 3.0 V; VI = 2.0 V –75 — — VCC = 3.6 V; VI = 0 to 3.6 V — — ±500 g current Input leakage 3 to 3 6 V; VCC = 2 2.3 3.6 VI = VCC or GND — 0.1 5 µ µA IOZ 3-State output OFF-state current VCC = 2.3 to 3.6 V; VI = VIH or VIL; VO = VCC or GND — 0.1 10 µA ICC Quiescent supply current VCC = 2.3 to 3.6 V; VI = VCC or GND; IO = 0 — 30 60 µA Additional quiescent supply current VCC = 2.3 V to 3.6 V; VI = VCC – 0.6 V; IO = 0 — 150 400 µA Control inputs VI = VCC or GND VCC = 3.3 V — 3.5 — — 6 — — 7 — VOL O level output voltage LOW II(hold) II ∆ICC Ci Co Data inputs Outputs µA pF VO = VCC or GND VCC = 3.3 V NOTE: 1. All typical values are at Tamb = 25 °C. 2002 Jun 05 V 6 pF Philips Semiconductors Product data 74ALVCHT16835 18-bit registered driver (3-State) AC CHARACTERISTICS FOR VCC = 2.3 V TO 2.7 V RANGE GND = 0 V; tr = tf ≤ 2.0 ns; CL = 30 pF LIMITS SYMBOL PARAMETER WAVEFORM VCC = 2.3 to 2.7 V UNIT MIN TYP1 MAX Propagation delay An to Yn 1, 7 1.3 3.0 4.7 Propagation delay LE to Yn 2, 7 1.4 3.6 5.7 Propagation delay CP to Yn 4, 7 1.2 3.0 4.7 tPZH/tPZL 3-State output enable time OE to Yn 6, 7 1.4 3.7 5.3 ns tPHZ/tPLZ 3-State output disable time OE to Yn 6, 7 1.0 2.5 3.7 ns CP pulse width HIGH or LOW 4, 7 3.3 — — LE pulse width HIGH 2, 7 3.3 — — Set-up time An to CP 5, 7 0.1 — — Set-up time An to LE 3, 7 0.7 — — Hold time An to CP 5, 7 0.4 — — Hold time An to LE 3, 7 0.1 — — — — 0.5 ns 4, 7 150 — — MHz tPHL/tPLH tW tSU S th tsk fmax Output skew Maximum clock pulse frequency ns ns ns ns NOTE: 1. All typical values are at VCC = 2.5 V and Tamb = 25 °C. 2. Output skew is not production tested AC CHARACTERISTICS FOR VCC = 3.0 V TO 3.6 V RANGE AND VCC = 2.7 V GND = 0 V; tr = tf ≤ 2.5 ns; CL = 50 pF SYMBOL PARAMETER LIMITS LIMITS VCC = 3.3 ± 0.3 V VCC = 2.7 V MIN TYP1, 2 MAX MIN TYP1 MAX WAVEFORM UNIT Propagation delay An to Yn 1, 7 1.2 2.3 3.6 1.3 2.7 3.8 Propagation delay LE to Yn 2, 7 1.3 2.7 4.2 1.4 3.0 4.9 Propagation delay CP to Yn 4, 7 1.0 2.2 3.7 1.2 2.3 3.7 tPZH/tPZL 3-State output enable time OE to Yn 6, 7 1.0 2.3 3.8 1.4 2.4 4.2 ns tPHZ/tPLZ 3-State output disable time OE to Yn 6, 7 1.0 2.5 3.7 1.0 2.5 3.7 ns CP pulse width HIGH or LOW 4, 7 2.0 — — 2.0 — — LE pulse width HIGH 2, 7 2.0 — — 2.0 — — Set-up time An to CP 5, 7 0.1 — — 0 — — Set-up time An to LE 3, 7 0.5 — — 0 — — Hold time An to CP 5, 7 0.4 — — 0.5 0.3 — Hold time An to LE 3, 7 0.1 — — 0.25 0.4 — — — — — — 0.5 ns 4, 7 150 — — 150 — — MHz tPHL/tPLH tW tSU S th tsk fmax Output skew3 Maximum clock pulse frequency NOTES: 1. All typical values are measured Tamb = 25 °C. 2. Typical value is measured at VCC = 3.3 V 3. Output skew is not production tested 2002 Jun 05 7 ns ns ns ns Philips Semiconductors Product data 74ALVCHT16835 18-bit registered driver (3-State) AC WAVEFORMS FOR VCC = 3.0 V TO 3.6 V AND VCC = 2.7 V RANGE 1/fMAX VI VM = 1.5 V VX = VOL + 0.3 V VY = VOH – 0.3 V VOL and VOH are the typical output voltage drop that occur with the output load. VI = 2.7 V VM CP INPUT VM tW GND tPHL tPLH VOH VM Yn OUTPUT AC WAVEFORMS FOR VCC = 2.3 V TO 2.7 V AND VCC < 2.3 V RANGE VOL NOTE: VM = 0.5VCC at VCC = 2.3 to 2.7 V VM = 0.5 VCC VX = VOL + 0.15 V VY = VOH – 0.15 V VOL and VOH are the typical output voltage drop that occur with the output load. VI = VCC SH00135 Waveform 4. The clock (CP) to Yn propagation delays, the clock pulse width and the maximum clock frequency. VI VM CP INPUT VI GND An INPUT VM ÉÉÉÉÉÉÉÉÉÉÉ ÉÉÉ ÉÉÉÉÉÉÉÉÉÉÉ ÉÉÉ ÉÉÉÉÉÉÉÉÉÉÉ ÉÉÉ tsu tsu th th GND VI tPLH tPHL An INPUT VOH GND Yn OUTPUT VM VOH VOL VM Yn OUTPUT NOTE: VM = 0.5VCC at VCC = 2.3 to 2.7 V SH00132 VOL Waveform 1. Input (An) to output (Yn) propagation delay NOTE: The shaded areas indicate when the input is permitted to change for predictable output performance. VM = 0.5VCC at VCC = 2.3 to 2.7 V SH00136 Waveform 5. Data set-up and hold times for the An input to the clock CP input VI VM LE INPUT VM tW GND tPHL tPLH VI VOH nOE INPUT VM Yn OUTPUT VM GND VOL NOTE: VM = 0.5VCC at VCC = 2.3 to 2.7V SH00134 tPLZ Waveform 2. Latch enable input (LE) pulse width, the latch enable input to output (Yn) propagation delays. OUTPUT LOW-to-OFF OFF-to-LOW ÉÉÉ ÉÉÉÉÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉÉÉÉÉ ÉÉÉ VOL VM tPHZ GND th tSU tPZH VOH th OUTPUT HIGH-to-OFF OFF-to-HIGH tSU VI LE INPUT VM VX VI An INPUT tPZL VCC VM VY VM GND outputs enabled GND NOTE: VM = 0.5VCC at VCC = 2.3 to 2.7 V NOTE: The shaded areas indicate when the input is permitted to change for predictable output performance. VM = 0.5VCC at VCC = 2.3 to 2.7V outputs enabled SH00137 Waveform 6. 3-State enable and disable times SH00133 Waveform 3. Data set-up and hold times for the An input to the LE input 2002 Jun 05 outputs disabled 8 Philips Semiconductors Product data 74ALVCHT16835 18-bit registered driver (3-State) TEST CIRCUIT S1 VCC RL = 500 Ω VO VI PULSE GENERATOR 2 * VCC Open GND D.U.T. RT RL = 500 Ω CL Test Circuit for switching times DEFINITIONS RL = Load resistor CL = Load capacitance includes jig and probe capacitance RT = Termination resistance should be equal to ZOUT of pulse generators. SWITCH POSITION TEST tPLH/tPHL tPLZ/tPZL tPHZ/tPZH S1 Open 2 VCC VCC VI < 2.7V VCC 2.7–3.6V 2.7V GND SV00906 Waveform 7. Load circuitry for switching times 2002 Jun 05 9 Philips Semiconductors Product data 74ALVCHT16835 18-bit registered driver (3-State) TSSOP56: plastic thin shrink small outline package; 56 leads; body width 4.4 mm SOT481–2 E D A X c y HE v M A Z 29 56 A A2 (A 3) A1 pin 1 index θ Lp L detail X 1 28 w M bp e 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (2) e HE L Lp v w y Z (1) θ mm 1.2 0.15 0.05 1.05 0.80 0.25 0.23 0.13 0.20 0.09 11.4 11.2 4.5 4.3 0.4 6.6 6.2 1 0.75 0.45 0.2 0.07 0.08 0.4 0.1 8o 0o Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic or metal protrusions of 0.25 mm maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC JEITA SOT481–2 ––– MO–194 ––– 2002 Jun 05 10 EUROPEAN PROJECTION ISSUE DATE 01–11–24 Philips Semiconductors Product data 74ALVCHT16835 18-bit registered driver (3-State) NOTES 2002 Jun 05 11 Philips Semiconductors Product data 74ALVCHT16835 18-bit registered driver (3-State) Data sheet status Data sheet status [1] Product status [2] Definitions Objective data Development This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. Preliminary data Qualification This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. Product data Production This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Changes will be communicated according to the Customer Product/Process Change Notification (CPCN) procedure SNW-SQ-650A. [1] Please consult the most recently issued data sheet before initiating or completing a design. [2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. Definitions Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Disclaimers Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Koninklijke Philips Electronics N.V. 2002 All rights reserved. Printed in U.S.A. Contact information For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825 Date of release: 06-02 For sales offices addresses send e-mail to: [email protected]. Document order number: 2002 Jun 05 12 9397 750 09943